
FEB_2388 30.04.25 09:10:03
TextEdit.txt
09:10:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:10:03:ST3_Shared:INFO: FEB-Microcable 09:10:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:10:03:febtest:INFO: Testing FEB with SN 2388 ==============================================OOO============================================== 09:10:05:smx_tester:INFO: Scanning setup 09:10:05:elinks:INFO: Disabling clock on downlink 0 09:10:05:elinks:INFO: Disabling clock on downlink 1 09:10:05:elinks:INFO: Disabling clock on downlink 2 09:10:05:elinks:INFO: Disabling clock on downlink 3 09:10:05:elinks:INFO: Disabling clock on downlink 4 09:10:05:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:10:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:10:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:10:05:elinks:INFO: Disabling clock on downlink 0 09:10:05:elinks:INFO: Disabling clock on downlink 1 09:10:05:elinks:INFO: Disabling clock on downlink 2 09:10:05:elinks:INFO: Disabling clock on downlink 3 09:10:05:elinks:INFO: Disabling clock on downlink 4 09:10:05:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:10:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:10:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:10:05:elinks:INFO: Disabling clock on downlink 0 09:10:05:elinks:INFO: Disabling clock on downlink 1 09:10:05:elinks:INFO: Disabling clock on downlink 2 09:10:05:elinks:INFO: Disabling clock on downlink 3 09:10:05:elinks:INFO: Disabling clock on downlink 4 09:10:05:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:10:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:10:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:10:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:10:05:elinks:INFO: Disabling clock on downlink 0 09:10:05:elinks:INFO: Disabling clock on downlink 1 09:10:05:elinks:INFO: Disabling clock on downlink 2 09:10:05:elinks:INFO: Disabling clock on downlink 3 09:10:05:elinks:INFO: Disabling clock on downlink 4 09:10:05:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:10:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:10:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:10:05:elinks:INFO: Disabling clock on downlink 0 09:10:05:elinks:INFO: Disabling clock on downlink 1 09:10:05:elinks:INFO: Disabling clock on downlink 2 09:10:05:elinks:INFO: Disabling clock on downlink 3 09:10:05:elinks:INFO: Disabling clock on downlink 4 09:10:05:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:10:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:10:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 09:10:05:setup_element:INFO: Scanning clock phase 09:10:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:10:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:10:06:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:10:06:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:10:06:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:10:06:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:10:06:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:10:06:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:10:06:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:10:06:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:10:06:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:10:06:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:10:06:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:10:06:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:10:06:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:10:06:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:10:06:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:10:06:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________ Clock Delay: 40 09:10:06:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________ Clock Delay: 40 09:10:06:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 ==============================================OOO============================================== 09:10:06:setup_element:INFO: Scanning data phases 09:10:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:10:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:10:11:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:10:11:setup_element:INFO: Eye window for uplink 16: __XXXXX_________________________________ Data delay found: 24 09:10:11:setup_element:INFO: Eye window for uplink 17: XXXXX__________________________________X Data delay found: 21 09:10:11:setup_element:INFO: Eye window for uplink 18: __XXXXXX________________________________ Data delay found: 24 09:10:11:setup_element:INFO: Eye window for uplink 19: ___XXXXX________________________________ Data delay found: 25 09:10:11:setup_element:INFO: Eye window for uplink 20: __XXXXX_________________________________ Data delay found: 24 09:10:11:setup_element:INFO: Eye window for uplink 21: ___XXXXXX_______________________________ Data delay found: 25 09:10:11:setup_element:INFO: Eye window for uplink 22: __XXXXX_________________________________ Data delay found: 24 09:10:11:setup_element:INFO: Eye window for uplink 23: XXXXX___________________________________ Data delay found: 22 09:10:11:setup_element:INFO: Eye window for uplink 24: _____________XXXXX______________________ Data delay found: 35 09:10:11:setup_element:INFO: Eye window for uplink 25: _______________XXXX_____________________ Data delay found: 36 09:10:11:setup_element:INFO: Eye window for uplink 26: ________________XXXXXX__________________ Data delay found: 38 09:10:11:setup_element:INFO: Eye window for uplink 27: __________________XXXXXX________________ Data delay found: 0 09:10:11:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXX_______________ Data delay found: 1 09:10:11:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________ Data delay found: 1 09:10:11:setup_element:INFO: Eye window for uplink 30: _______________________XXXXXX___________ Data delay found: 5 09:10:11:setup_element:INFO: Eye window for uplink 31: _____________________XXXXXX_____________ Data delay found: 3 09:10:11:setup_element:INFO: Setting the data phase to 24 for uplink 16 09:10:11:setup_element:INFO: Setting the data phase to 21 for uplink 17 09:10:11:setup_element:INFO: Setting the data phase to 24 for uplink 18 09:10:11:setup_element:INFO: Setting the data phase to 25 for uplink 19 09:10:11:setup_element:INFO: Setting the data phase to 24 for uplink 20 09:10:11:setup_element:INFO: Setting the data phase to 25 for uplink 21 09:10:11:setup_element:INFO: Setting the data phase to 24 for uplink 22 09:10:11:setup_element:INFO: Setting the data phase to 22 for uplink 23 09:10:11:setup_element:INFO: Setting the data phase to 35 for uplink 24 09:10:11:setup_element:INFO: Setting the data phase to 36 for uplink 25 09:10:11:setup_element:INFO: Setting the data phase to 38 for uplink 26 09:10:11:setup_element:INFO: Setting the data phase to 0 for uplink 27 09:10:11:setup_element:INFO: Setting the data phase to 1 for uplink 28 09:10:11:setup_element:INFO: Setting the data phase to 1 for uplink 29 09:10:11:setup_element:INFO: Setting the data phase to 5 for uplink 30 09:10:11:setup_element:INFO: Setting the data phase to 3 for uplink 31 ==============================================OOO============================================== 09:10:11:setup_element:INFO: Beginning SMX ASICs map scan 09:10:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:10:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:10:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:10:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:10:12:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:10:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 09:10:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 09:10:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:10:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:10:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 09:10:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 09:10:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:10:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:10:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 09:10:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 09:10:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:10:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:10:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 09:10:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 09:10:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:10:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:10:14:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 16: _____________________________________________________________________XXXXXXXX___ Uplink 17: _____________________________________________________________________XXXXXXXX___ Uplink 18: _______________________________________________________________________XXXXXXXX_ Uplink 19: _______________________________________________________________________XXXXXXXX_ Uplink 20: _____________________________________________________________________XXXXXXXX___ Uplink 21: _____________________________________________________________________XXXXXXXX___ Uplink 22: _____________________________________________________________________XXXXXXXXX__ Uplink 23: _____________________________________________________________________XXXXXXXXX__ Uplink 24: _____________________________________________________________________XXXXXXXX___ Uplink 25: _____________________________________________________________________XXXXXXXX___ Uplink 26: _____________________________________________________________________XXXXXXXXX__ Uplink 27: _____________________________________________________________________XXXXXXXXX__ Uplink 28: ______________________________________________________________________XXXXXXXX__ Uplink 29: ______________________________________________________________________XXXXXXXX__ Uplink 30: ________________________________________________________________________________ Uplink 31: ________________________________________________________________________________ Data phase characteristics: Uplink 16: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 17: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 18: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 19: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 20: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 21: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 22: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 23: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 24: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 25: Optimal Phase: 36 Window Length: 36 Eye Window: _______________XXXX_____________________ Uplink 26: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 27: Optimal Phase: 0 Window Length: 34 Eye Window: __________________XXXXXX________________ Uplink 28: Optimal Phase: 1 Window Length: 34 Eye Window: ___________________XXXXXX_______________ Uplink 29: Optimal Phase: 1 Window Length: 34 Eye Window: ___________________XXXXXX_______________ Uplink 30: Optimal Phase: 5 Window Length: 34 Eye Window: _______________________XXXXXX___________ Uplink 31: Optimal Phase: 3 Window Length: 34 Eye Window: _____________________XXXXXX_____________ ==============================================OOO============================================== 09:10:14:setup_element:INFO: Performing Elink synchronization 09:10:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:10:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:10:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:10:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 09:10:14:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:10:14:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 09:10:15:febtest:INFO: Init all SMX (CSA): 30 09:10:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:10:30:febtest:INFO: 23-00 | XA-000-09-004-013-006-004-13 | 34.6 | 1159.7 09:10:30:febtest:INFO: 30-01 | XA-000-09-004-011-003-008-04 | 37.7 | 1141.9 09:10:30:febtest:INFO: 21-02 | XA-000-09-004-013-005-004-03 | 37.7 | 1153.7 09:10:31:febtest:INFO: 28-03 | XA-000-09-004-011-006-008-15 | 37.7 | 1159.7 09:10:31:febtest:INFO: 19-04 | XA-000-09-004-013-005-005-03 | 37.7 | 1153.7 09:10:31:febtest:INFO: 26-05 | XA-000-09-004-011-003-007-04 | 37.7 | 1147.8 09:10:31:febtest:INFO: 17-06 | XA-000-09-004-013-007-007-00 | 47.3 | 1135.9 09:10:32:febtest:INFO: 24-07 | XA-000-09-004-013-006-005-13 | 40.9 | 1147.8 09:10:33:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 09:10:35:ST3_smx:INFO: chip: 23-0 37.726682 C 1171.483840 mV 09:10:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:10:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:10:35:ST3_smx:INFO: Electrons 09:10:35:ST3_smx:INFO: # loops 0 09:10:36:ST3_smx:INFO: # loops 1 09:10:38:ST3_smx:INFO: # loops 2 09:10:40:ST3_smx:INFO: Total # of broken channels: 0 09:10:40:ST3_smx:INFO: List of broken channels: [] 09:10:40:ST3_smx:INFO: Total # of broken channels: 0 09:10:40:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 09:10:42:ST3_smx:INFO: chip: 30-1 37.726682 C 1153.732915 mV 09:10:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:10:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:10:42:ST3_smx:INFO: Electrons 09:10:42:ST3_smx:INFO: # loops 0 09:10:43:ST3_smx:INFO: # loops 1 09:10:45:ST3_smx:INFO: # loops 2 09:10:47:ST3_smx:INFO: Total # of broken channels: 0 09:10:47:ST3_smx:INFO: List of broken channels: [] 09:10:47:ST3_smx:INFO: Total # of broken channels: 0 09:10:47:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 09:10:49:ST3_smx:INFO: chip: 21-2 37.726682 C 1165.571835 mV 09:10:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:10:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:10:49:ST3_smx:INFO: Electrons 09:10:49:ST3_smx:INFO: # loops 0 09:10:50:ST3_smx:INFO: # loops 1 09:10:52:ST3_smx:INFO: # loops 2 09:10:54:ST3_smx:INFO: Total # of broken channels: 0 09:10:54:ST3_smx:INFO: List of broken channels: [] 09:10:54:ST3_smx:INFO: Total # of broken channels: 0 09:10:54:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 09:10:56:ST3_smx:INFO: chip: 28-3 37.726682 C 1165.571835 mV 09:10:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:10:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:10:56:ST3_smx:INFO: Electrons 09:10:56:ST3_smx:INFO: # loops 0 09:10:57:ST3_smx:INFO: # loops 1 09:10:59:ST3_smx:INFO: # loops 2 09:11:01:ST3_smx:INFO: Total # of broken channels: 0 09:11:01:ST3_smx:INFO: List of broken channels: [] 09:11:01:ST3_smx:INFO: Total # of broken channels: 1 09:11:01:ST3_smx:INFO: List of broken channels: [6] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 09:11:03:ST3_smx:INFO: chip: 19-4 37.726682 C 1165.571835 mV 09:11:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:11:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:11:03:ST3_smx:INFO: Electrons 09:11:03:ST3_smx:INFO: # loops 0 09:11:04:ST3_smx:INFO: # loops 1 09:11:06:ST3_smx:INFO: # loops 2 09:11:08:ST3_smx:INFO: Total # of broken channels: 0 09:11:08:ST3_smx:INFO: List of broken channels: [] 09:11:08:ST3_smx:INFO: Total # of broken channels: 0 09:11:08:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 09:11:10:ST3_smx:INFO: chip: 26-5 37.726682 C 1159.654860 mV 09:11:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:11:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:11:10:ST3_smx:INFO: Electrons 09:11:10:ST3_smx:INFO: # loops 0 09:11:11:ST3_smx:INFO: # loops 1 09:11:13:ST3_smx:INFO: # loops 2 09:11:15:ST3_smx:INFO: Total # of broken channels: 0 09:11:15:ST3_smx:INFO: List of broken channels: [] 09:11:15:ST3_smx:INFO: Total # of broken channels: 1 09:11:15:ST3_smx:INFO: List of broken channels: [6] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 09:11:16:ST3_smx:INFO: chip: 17-6 47.250730 C 1147.806000 mV 09:11:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:11:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:11:16:ST3_smx:INFO: Electrons 09:11:16:ST3_smx:INFO: # loops 0 09:11:18:ST3_smx:INFO: # loops 1 09:11:20:ST3_smx:INFO: # loops 2 09:11:21:ST3_smx:INFO: Total # of broken channels: 0 09:11:21:ST3_smx:INFO: List of broken channels: [] 09:11:22:ST3_smx:INFO: Total # of broken channels: 0 09:11:22:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 09:11:23:ST3_smx:INFO: chip: 24-7 37.726682 C 1159.654860 mV 09:11:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:11:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:11:23:ST3_smx:INFO: Electrons 09:11:23:ST3_smx:INFO: # loops 0 09:11:25:ST3_smx:INFO: # loops 1 09:11:27:ST3_smx:INFO: # loops 2 09:11:28:ST3_smx:INFO: Total # of broken channels: 0 09:11:28:ST3_smx:INFO: List of broken channels: [] 09:11:28:ST3_smx:INFO: Total # of broken channels: 0 09:11:28:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 09:11:29:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:11:29:febtest:INFO: 23-00 | XA-000-09-004-013-006-004-13 | 34.6 | 1195.1 09:11:29:febtest:INFO: 30-01 | XA-000-09-004-011-003-008-04 | 37.7 | 1177.4 09:11:30:febtest:INFO: 21-02 | XA-000-09-004-013-005-004-03 | 37.7 | 1183.3 09:11:30:febtest:INFO: 28-03 | XA-000-09-004-011-006-008-15 | 37.7 | 1189.2 09:11:30:febtest:INFO: 19-04 | XA-000-09-004-013-005-005-03 | 37.7 | 1183.3 09:11:30:febtest:INFO: 26-05 | XA-000-09-004-011-003-007-04 | 37.7 | 1177.4 09:11:30:febtest:INFO: 17-06 | XA-000-09-004-013-007-007-00 | 47.3 | 1165.6 09:11:31:febtest:INFO: 24-07 | XA-000-09-004-013-006-005-13 | 40.9 | 1177.4 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_04_30-09_10_03 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2388| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.7500', '1.851', '1.9070'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0130', '1.850', '2.5760'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9800', '1.850', '0.5262']