
FEB_2404 16.04.25 12:55:47
TextEdit.txt
12:55:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:55:47:ST3_Shared:INFO: FEB-Microcable 12:55:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:55:47:febtest:INFO: Testing FEB with SN 2404 ==============================================OOO============================================== 12:55:49:smx_tester:INFO: Scanning setup 12:55:49:elinks:INFO: Disabling clock on downlink 0 12:55:49:elinks:INFO: Disabling clock on downlink 1 12:55:49:elinks:INFO: Disabling clock on downlink 2 12:55:49:elinks:INFO: Disabling clock on downlink 3 12:55:49:elinks:INFO: Disabling clock on downlink 4 12:55:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:55:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:55:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:55:49:elinks:INFO: Disabling clock on downlink 0 12:55:49:elinks:INFO: Disabling clock on downlink 1 12:55:49:elinks:INFO: Disabling clock on downlink 2 12:55:49:elinks:INFO: Disabling clock on downlink 3 12:55:49:elinks:INFO: Disabling clock on downlink 4 12:55:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:55:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:55:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:55:49:elinks:INFO: Disabling clock on downlink 0 12:55:49:elinks:INFO: Disabling clock on downlink 1 12:55:49:elinks:INFO: Disabling clock on downlink 2 12:55:49:elinks:INFO: Disabling clock on downlink 3 12:55:49:elinks:INFO: Disabling clock on downlink 4 12:55:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:55:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 12:55:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 12:55:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:55:49:elinks:INFO: Disabling clock on downlink 0 12:55:49:elinks:INFO: Disabling clock on downlink 1 12:55:49:elinks:INFO: Disabling clock on downlink 2 12:55:49:elinks:INFO: Disabling clock on downlink 3 12:55:49:elinks:INFO: Disabling clock on downlink 4 12:55:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:55:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:55:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:55:49:elinks:INFO: Disabling clock on downlink 0 12:55:49:elinks:INFO: Disabling clock on downlink 1 12:55:49:elinks:INFO: Disabling clock on downlink 2 12:55:49:elinks:INFO: Disabling clock on downlink 3 12:55:49:elinks:INFO: Disabling clock on downlink 4 12:55:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:55:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:55:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 12:55:50:setup_element:INFO: Scanning clock phase 12:55:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:55:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:55:50:setup_element:INFO: Clock phase scan results for group 0, downlink 2 12:55:50:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:55:50:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:55:50:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:55:50:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:55:50:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 12:55:50:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 12:55:50:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 12:55:50:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 12:55:50:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 12:55:50:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 12:55:50:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:55:50:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:55:50:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:55:50:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:55:50:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:55:50:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:55:50:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 ==============================================OOO============================================== 12:55:50:setup_element:INFO: Scanning data phases 12:55:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:55:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:55:55:setup_element:INFO: Data phase scan results for group 0, downlink 2 12:55:55:setup_element:INFO: Eye window for uplink 16: _____XXXX_______________________________ Data delay found: 26 12:55:55:setup_element:INFO: Eye window for uplink 17: ___XXXXX________________________________ Data delay found: 25 12:55:55:setup_element:INFO: Eye window for uplink 18: _XXXXXX_________________________________ Data delay found: 23 12:55:55:setup_element:INFO: Eye window for uplink 19: __XXXXXX________________________________ Data delay found: 24 12:55:55:setup_element:INFO: Eye window for uplink 20: ___XXXXXX_______________________________ Data delay found: 25 12:55:55:setup_element:INFO: Eye window for uplink 21: ____XXXXXX______________________________ Data delay found: 26 12:55:55:setup_element:INFO: Eye window for uplink 22: XXXXX__________________________________X Data delay found: 21 12:55:55:setup_element:INFO: Eye window for uplink 23: XXXX__________________________________XX Data delay found: 20 12:55:55:setup_element:INFO: Eye window for uplink 24: __________XXXXXX________________________ Data delay found: 32 12:55:55:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________ Data delay found: 34 12:55:55:setup_element:INFO: Eye window for uplink 26: ________________XXXXXX__________________ Data delay found: 38 12:55:55:setup_element:INFO: Eye window for uplink 27: _________________XXXXXX_________________ Data delay found: 39 12:55:55:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXX_______________ Data delay found: 1 12:55:55:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________ Data delay found: 1 12:55:55:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXX______________ Data delay found: 2 12:55:55:setup_element:INFO: Eye window for uplink 31: __________________XXXXXX________________ Data delay found: 0 12:55:55:setup_element:INFO: Setting the data phase to 26 for uplink 16 12:55:55:setup_element:INFO: Setting the data phase to 25 for uplink 17 12:55:55:setup_element:INFO: Setting the data phase to 23 for uplink 18 12:55:55:setup_element:INFO: Setting the data phase to 24 for uplink 19 12:55:55:setup_element:INFO: Setting the data phase to 25 for uplink 20 12:55:55:setup_element:INFO: Setting the data phase to 26 for uplink 21 12:55:55:setup_element:INFO: Setting the data phase to 21 for uplink 22 12:55:55:setup_element:INFO: Setting the data phase to 20 for uplink 23 12:55:55:setup_element:INFO: Setting the data phase to 32 for uplink 24 12:55:55:setup_element:INFO: Setting the data phase to 34 for uplink 25 12:55:55:setup_element:INFO: Setting the data phase to 38 for uplink 26 12:55:55:setup_element:INFO: Setting the data phase to 39 for uplink 27 12:55:55:setup_element:INFO: Setting the data phase to 1 for uplink 28 12:55:55:setup_element:INFO: Setting the data phase to 1 for uplink 29 12:55:56:setup_element:INFO: Setting the data phase to 2 for uplink 30 12:55:56:setup_element:INFO: Setting the data phase to 0 for uplink 31 ==============================================OOO============================================== 12:55:56:setup_element:INFO: Beginning SMX ASICs map scan 12:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:55:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:55:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:55:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:55:56:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 12:55:56:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 12:55:56:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 12:55:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 12:55:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 12:55:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 12:55:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 12:55:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 12:55:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 12:55:56:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 12:55:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 12:55:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 12:55:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 12:55:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 12:55:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 12:55:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 12:55:58:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 68 Eye Windows: Uplink 16: _______________________________________________________________________XXXXXXX__ Uplink 17: _______________________________________________________________________XXXXXXX__ Uplink 18: _____________________________________________________________________XXXXXXXXX__ Uplink 19: _____________________________________________________________________XXXXXXXXX__ Uplink 20: ______________________________________________________________________XXXXXXXXX_ Uplink 21: ______________________________________________________________________XXXXXXXXX_ Uplink 22: ____________________________________________________________________XXXXXXXXX___ Uplink 23: ____________________________________________________________________XXXXXXXXX___ Uplink 24: ___________________________________________________________________XXXXXXXXX____ Uplink 25: ___________________________________________________________________XXXXXXXXX____ Uplink 26: _____________________________________________________________________XXXXXXXX___ Uplink 27: _____________________________________________________________________XXXXXXXX___ Uplink 28: ______________________________________________________________________XXXXXXXX__ Uplink 29: ______________________________________________________________________XXXXXXXX__ Uplink 30: _____________________________________________________________________XXXXXXXX___ Uplink 31: _____________________________________________________________________XXXXXXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 26 Window Length: 36 Eye Window: _____XXXX_______________________________ Uplink 17: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 18: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 19: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 20: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 21: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 22: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 23: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 24: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 25: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 26: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 27: Optimal Phase: 39 Window Length: 34 Eye Window: _________________XXXXXX_________________ Uplink 28: Optimal Phase: 1 Window Length: 34 Eye Window: ___________________XXXXXX_______________ Uplink 29: Optimal Phase: 1 Window Length: 34 Eye Window: ___________________XXXXXX_______________ Uplink 30: Optimal Phase: 2 Window Length: 34 Eye Window: ____________________XXXXXX______________ Uplink 31: Optimal Phase: 0 Window Length: 34 Eye Window: __________________XXXXXX________________ ==============================================OOO============================================== 12:55:58:setup_element:INFO: Performing Elink synchronization 12:55:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:55:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:55:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:55:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 12:55:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 12:55:58:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 1 | [(0, 19)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 12:55:59:febtest:INFO: Init all SMX (CSA): 30 12:56:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:56:14:febtest:INFO: 23-00 | XA-000-09-004-011-007-021-05 | 28.2 | 1165.6 12:56:14:febtest:INFO: 30-01 | XA-000-09-004-011-013-021-10 | 37.7 | 1130.0 12:56:14:febtest:INFO: 21-02 | XA-000-09-004-011-016-019-01 | 18.7 | 1189.2 12:56:14:febtest:INFO: 28-03 | XA-000-09-004-011-013-019-10 | 31.4 | 1153.7 12:56:14:febtest:INFO: 19-04 | XA-000-09-004-011-010-020-02 | 37.7 | 1130.0 12:56:15:febtest:INFO: 26-05 | XA-000-09-004-011-007-020-05 | 37.7 | 1130.0 12:56:15:febtest:INFO: 17-06 | XA-000-09-004-011-004-020-11 | 18.7 | 1195.1 12:56:15:febtest:INFO: 24-07 | XA-000-09-004-011-010-021-02 | 12.4 | 1206.9 12:56:16:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 12:56:18:ST3_smx:INFO: chip: 23-0 28.225000 C 1177.390875 mV 12:56:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:56:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:56:18:ST3_smx:INFO: Electrons 12:56:18:ST3_smx:INFO: # loops 0 12:56:20:ST3_smx:INFO: # loops 1 12:56:22:ST3_smx:INFO: # loops 2 12:56:24:ST3_smx:INFO: Total # of broken channels: 0 12:56:24:ST3_smx:INFO: List of broken channels: [] 12:56:24:ST3_smx:INFO: Total # of broken channels: 0 12:56:24:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:56:26:ST3_smx:INFO: chip: 30-1 40.898880 C 1147.806000 mV 12:56:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:56:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:56:26:ST3_smx:INFO: Electrons 12:56:26:ST3_smx:INFO: # loops 0 12:56:28:ST3_smx:INFO: # loops 1 12:56:30:ST3_smx:INFO: # loops 2 12:56:31:ST3_smx:INFO: Total # of broken channels: 3 12:56:31:ST3_smx:INFO: List of broken channels: [9, 21, 105] 12:56:31:ST3_smx:INFO: Total # of broken channels: 6 12:56:31:ST3_smx:INFO: List of broken channels: [7, 9, 21, 62, 105, 107] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:56:33:ST3_smx:INFO: chip: 21-2 18.745682 C 1200.969315 mV 12:56:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:56:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:56:33:ST3_smx:INFO: Electrons 12:56:33:ST3_smx:INFO: # loops 0 12:56:35:ST3_smx:INFO: # loops 1 12:56:36:ST3_smx:INFO: # loops 2 12:56:38:ST3_smx:INFO: Total # of broken channels: 0 12:56:38:ST3_smx:INFO: List of broken channels: [] 12:56:38:ST3_smx:INFO: Total # of broken channels: 0 12:56:38:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:56:40:ST3_smx:INFO: chip: 28-3 31.389742 C 1171.483840 mV 12:56:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:56:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:56:40:ST3_smx:INFO: Electrons 12:56:40:ST3_smx:INFO: # loops 0 12:56:43:ST3_smx:INFO: # loops 1 12:56:45:ST3_smx:INFO: # loops 2 12:56:47:ST3_smx:INFO: Total # of broken channels: 0 12:56:47:ST3_smx:INFO: List of broken channels: [] 12:56:47:ST3_smx:INFO: Total # of broken channels: 0 12:56:47:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:56:49:ST3_smx:INFO: chip: 19-4 37.726682 C 1141.874115 mV 12:56:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:56:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:56:49:ST3_smx:INFO: Electrons 12:56:49:ST3_smx:INFO: # loops 0 12:56:51:ST3_smx:INFO: # loops 1 12:56:55:ST3_smx:INFO: # loops 2 12:56:57:ST3_smx:INFO: Total # of broken channels: 0 12:56:57:ST3_smx:INFO: List of broken channels: [] 12:56:57:ST3_smx:INFO: Total # of broken channels: 0 12:56:57:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:56:59:ST3_smx:INFO: chip: 26-5 40.898880 C 1141.874115 mV 12:57:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:57:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:57:00:ST3_smx:INFO: Electrons 12:57:00:ST3_smx:INFO: # loops 0 12:57:03:ST3_smx:INFO: # loops 1 12:57:06:ST3_smx:INFO: # loops 2 12:57:08:ST3_smx:INFO: Total # of broken channels: 1 12:57:08:ST3_smx:INFO: List of broken channels: [9] 12:57:08:ST3_smx:INFO: Total # of broken channels: 0 12:57:08:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:57:10:ST3_smx:INFO: chip: 17-6 18.745682 C 1206.851500 mV 12:57:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:57:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:57:10:ST3_smx:INFO: Electrons 12:57:10:ST3_smx:INFO: # loops 0 12:57:13:ST3_smx:INFO: # loops 1 12:57:15:ST3_smx:INFO: # loops 2 12:57:17:ST3_smx:INFO: Total # of broken channels: 0 12:57:17:ST3_smx:INFO: List of broken channels: [] 12:57:17:ST3_smx:INFO: Total # of broken channels: 0 12:57:17:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:57:19:ST3_smx:INFO: chip: 24-7 15.590880 C 1218.600960 mV 12:57:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:57:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:57:19:ST3_smx:INFO: Electrons 12:57:19:ST3_smx:INFO: # loops 0 12:57:21:ST3_smx:INFO: # loops 1 12:57:24:ST3_smx:INFO: # loops 2 12:57:26:ST3_smx:INFO: Total # of broken channels: 0 12:57:26:ST3_smx:INFO: List of broken channels: [] 12:57:26:ST3_smx:INFO: Total # of broken channels: 0 12:57:26:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:57:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:57:27:febtest:INFO: 23-00 | XA-000-09-004-011-007-021-05 | 31.4 | 1201.0 12:57:27:febtest:INFO: 30-01 | XA-000-09-004-011-013-021-10 | 40.9 | 1177.4 12:57:27:febtest:INFO: 21-02 | XA-000-09-004-011-016-019-01 | 21.9 | 1218.6 12:57:27:febtest:INFO: 28-03 | XA-000-09-004-011-013-019-10 | 31.4 | 1189.2 12:57:28:febtest:INFO: 19-04 | XA-000-09-004-011-010-020-02 | 37.7 | 1165.6 12:57:28:febtest:INFO: 26-05 | XA-000-09-004-011-007-020-05 | 40.9 | 1159.7 12:57:28:febtest:INFO: 17-06 | XA-000-09-004-011-004-020-11 | 18.7 | 1236.2 12:57:28:febtest:INFO: 24-07 | XA-000-09-004-011-010-021-02 | 15.6 | 1236.2 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_04_16-12_55_47 OPERATOR : Robert V.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2404| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9490', '1.848', '2.1960'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9910', '1.849', '2.5050'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9700', '1.850', '0.5272']