FEB_2409    09.05.25 09:54:51

TextEdit.txt
            09:54:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:54:51:ST3_Shared:INFO:	                       FEB-Microcable                       
09:54:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:54:51:febtest:INFO:	Testing FEB with SN 2409
==============================================OOO==============================================
09:54:53:smx_tester:INFO:	Scanning setup
09:54:53:elinks:INFO:	Disabling clock on downlink 0
09:54:53:elinks:INFO:	Disabling clock on downlink 1
09:54:53:elinks:INFO:	Disabling clock on downlink 2
09:54:53:elinks:INFO:	Disabling clock on downlink 3
09:54:53:elinks:INFO:	Disabling clock on downlink 4
09:54:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:54:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:54:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:54:53:elinks:INFO:	Disabling clock on downlink 0
09:54:53:elinks:INFO:	Disabling clock on downlink 1
09:54:53:elinks:INFO:	Disabling clock on downlink 2
09:54:53:elinks:INFO:	Disabling clock on downlink 3
09:54:53:elinks:INFO:	Disabling clock on downlink 4
09:54:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:54:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:54:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:54:53:elinks:INFO:	Disabling clock on downlink 0
09:54:53:elinks:INFO:	Disabling clock on downlink 1
09:54:53:elinks:INFO:	Disabling clock on downlink 2
09:54:53:elinks:INFO:	Disabling clock on downlink 3
09:54:53:elinks:INFO:	Disabling clock on downlink 4
09:54:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:54:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:54:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:54:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:54:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:54:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:54:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:54:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:54:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:54:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:54:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:54:53:elinks:INFO:	Disabling clock on downlink 0
09:54:53:elinks:INFO:	Disabling clock on downlink 1
09:54:53:elinks:INFO:	Disabling clock on downlink 2
09:54:53:elinks:INFO:	Disabling clock on downlink 3
09:54:53:elinks:INFO:	Disabling clock on downlink 4
09:54:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:54:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:54:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:54:53:elinks:INFO:	Disabling clock on downlink 0
09:54:53:elinks:INFO:	Disabling clock on downlink 1
09:54:53:elinks:INFO:	Disabling clock on downlink 2
09:54:53:elinks:INFO:	Disabling clock on downlink 3
09:54:53:elinks:INFO:	Disabling clock on downlink 4
09:54:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:54:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:54:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:54:54:setup_element:INFO:	Scanning clock phase
09:54:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:54:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:54:54:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:54:54:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:54:54:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:54:54:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:54:54:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:54:54:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:54:54:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:54:54:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:54:54:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:54:54:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
==============================================OOO==============================================
09:54:54:setup_element:INFO:	Scanning data phases
09:54:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:54:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:54:59:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:54:59:setup_element:INFO:	Eye window for uplink 24: _____XXXX_______________________________
Data delay found: 26
09:54:59:setup_element:INFO:	Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
09:54:59:setup_element:INFO:	Eye window for uplink 26: _______XXXX_____________________________
Data delay found: 28
09:54:59:setup_element:INFO:	Eye window for uplink 27: __________XXXX__________________________
Data delay found: 31
09:54:59:setup_element:INFO:	Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
09:54:59:setup_element:INFO:	Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
09:54:59:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
09:54:59:setup_element:INFO:	Eye window for uplink 31: ___________XXXXXX_______________________
Data delay found: 33
09:54:59:setup_element:INFO:	Setting the data phase to 26 for uplink 24
09:54:59:setup_element:INFO:	Setting the data phase to 29 for uplink 25
09:54:59:setup_element:INFO:	Setting the data phase to 28 for uplink 26
09:54:59:setup_element:INFO:	Setting the data phase to 31 for uplink 27
09:54:59:setup_element:INFO:	Setting the data phase to 34 for uplink 28
09:54:59:setup_element:INFO:	Setting the data phase to 35 for uplink 29
09:54:59:setup_element:INFO:	Setting the data phase to 35 for uplink 30
09:54:59:setup_element:INFO:	Setting the data phase to 33 for uplink 31
==============================================OOO==============================================
09:54:59:setup_element:INFO:	Beginning SMX ASICs map scan
09:54:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:54:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:54:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:54:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:54:59:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:54:59:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:54:59:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:55:00:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:55:00:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:55:00:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:55:00:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:55:00:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:55:00:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:55:02:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 72
    Eye Windows:
      Uplink 24: _______________________________________________________________________XXXXXXXX_
      Uplink 25: _______________________________________________________________________XXXXXXXX_
      Uplink 26: ________________________________________________________________________XXXXXXX_
      Uplink 27: ________________________________________________________________________XXXXXXX_
      Uplink 28: ________________________________________________________________________XXXXXXX_
      Uplink 29: ________________________________________________________________________XXXXXXX_
      Uplink 30: ________________________________________________________________________XXXXXX__
      Uplink 31: ________________________________________________________________________XXXXXX__
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 36
      Eye Window: __________XXXX__________________________
    Uplink 28:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________

==============================================OOO==============================================
09:55:02:setup_element:INFO:	Performing Elink synchronization
09:55:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:55:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:55:02:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:55:02:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
09:55:02:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:55:02:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:55:02:febtest:INFO:	Init all SMX (CSA): 30
09:55:09:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:55:09:febtest:INFO:	30-01 | XA-000-09-004-015-007-006-09 |  34.6 | 1147.8
09:55:10:febtest:INFO:	28-03 | XA-000-09-004-015-010-008-14 |  21.9 | 1177.4
09:55:10:febtest:INFO:	26-05 | XA-000-09-004-011-006-021-08 |  18.7 | 1189.2
09:55:10:febtest:INFO:	24-07 | XA-000-09-004-015-010-006-14 |  25.1 | 1165.6
09:55:11:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:55:13:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1153.732915 mV
09:55:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:13:ST3_smx:INFO:		Electrons
09:55:13:ST3_smx:INFO:	# loops 0
09:55:15:ST3_smx:INFO:	# loops 1
09:55:16:ST3_smx:INFO:	# loops 2
09:55:18:ST3_smx:INFO:	Total # of broken channels: 0
09:55:18:ST3_smx:INFO:	List of broken channels: []
09:55:18:ST3_smx:INFO:	Total # of broken channels: 0
09:55:18:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:55:20:ST3_smx:INFO:	chip: 28-3 	 21.902970 C 	 1189.190035 mV
09:55:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:20:ST3_smx:INFO:		Electrons
09:55:20:ST3_smx:INFO:	# loops 0
09:55:21:ST3_smx:INFO:	# loops 1
09:55:23:ST3_smx:INFO:	# loops 2
09:55:24:ST3_smx:INFO:	Total # of broken channels: 0
09:55:24:ST3_smx:INFO:	List of broken channels: []
09:55:24:ST3_smx:INFO:	Total # of broken channels: 0
09:55:24:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:55:26:ST3_smx:INFO:	chip: 26-5 	 18.745682 C 	 1200.969315 mV
09:55:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:26:ST3_smx:INFO:		Electrons
09:55:26:ST3_smx:INFO:	# loops 0
09:55:28:ST3_smx:INFO:	# loops 1
09:55:29:ST3_smx:INFO:	# loops 2
09:55:31:ST3_smx:INFO:	Total # of broken channels: 0
09:55:31:ST3_smx:INFO:	List of broken channels: []
09:55:31:ST3_smx:INFO:	Total # of broken channels: 0
09:55:31:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:55:33:ST3_smx:INFO:	chip: 24-7 	 25.062742 C 	 1171.483840 mV
09:55:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:33:ST3_smx:INFO:		Electrons
09:55:33:ST3_smx:INFO:	# loops 0
09:55:34:ST3_smx:INFO:	# loops 1
09:55:36:ST3_smx:INFO:	# loops 2
09:55:37:ST3_smx:INFO:	Total # of broken channels: 0
09:55:37:ST3_smx:INFO:	List of broken channels: []
09:55:37:ST3_smx:INFO:	Total # of broken channels: 0
09:55:37:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:55:38:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:55:38:febtest:INFO:	30-01 | XA-000-09-004-015-007-006-09 |  34.6 | 1177.4
09:55:38:febtest:INFO:	28-03 | XA-000-09-004-015-010-008-14 |  21.9 | 1206.9
09:55:38:febtest:INFO:	26-05 | XA-000-09-004-011-006-021-08 |  18.7 | 1218.6
09:55:39:febtest:INFO:	24-07 | XA-000-09-004-015-010-006-14 |  28.2 | 1189.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_05_09-09_54_51
OPERATOR  : Robert V.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 2409| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '0.7708', '1.849', '0.9362']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0190', '1.850', '1.2940']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9971', '1.850', '0.2677']