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FEB_2410 06.06.25 07:50:52
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07:50:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:50:52:ST3_Shared:INFO: FEB-Sensor
07:50:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:51:15:ST3_ModuleSelector:INFO: M7DR6T0000240B2
07:51:15:ST3_ModuleSelector:INFO: 03092
07:51:15:febtest:INFO: Testing FEB with SN 2410
==============================================OOO==============================================
07:51:17:smx_tester:INFO: Scanning setup
07:51:17:elinks:INFO: Disabling clock on downlink 0
07:51:17:elinks:INFO: Disabling clock on downlink 1
07:51:17:elinks:INFO: Disabling clock on downlink 2
07:51:17:elinks:INFO: Disabling clock on downlink 3
07:51:17:elinks:INFO: Disabling clock on downlink 4
07:51:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:51:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:51:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:51:17:elinks:INFO: Disabling clock on downlink 0
07:51:17:elinks:INFO: Disabling clock on downlink 1
07:51:17:elinks:INFO: Disabling clock on downlink 2
07:51:17:elinks:INFO: Disabling clock on downlink 3
07:51:17:elinks:INFO: Disabling clock on downlink 4
07:51:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:51:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:51:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:51:17:elinks:INFO: Disabling clock on downlink 0
07:51:17:elinks:INFO: Disabling clock on downlink 1
07:51:17:elinks:INFO: Disabling clock on downlink 2
07:51:17:elinks:INFO: Disabling clock on downlink 3
07:51:17:elinks:INFO: Disabling clock on downlink 4
07:51:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:51:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:51:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:51:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:51:17:elinks:INFO: Disabling clock on downlink 0
07:51:17:elinks:INFO: Disabling clock on downlink 1
07:51:17:elinks:INFO: Disabling clock on downlink 2
07:51:17:elinks:INFO: Disabling clock on downlink 3
07:51:17:elinks:INFO: Disabling clock on downlink 4
07:51:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:51:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:51:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:51:18:elinks:INFO: Disabling clock on downlink 0
07:51:18:elinks:INFO: Disabling clock on downlink 1
07:51:18:elinks:INFO: Disabling clock on downlink 2
07:51:18:elinks:INFO: Disabling clock on downlink 3
07:51:18:elinks:INFO: Disabling clock on downlink 4
07:51:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:51:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:51:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
07:51:18:setup_element:INFO: Scanning clock phase
07:51:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:51:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:51:18:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:51:18:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:51:18:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:51:18:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:51:18:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:51:18:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:51:18:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:51:18:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:51:18:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:51:18:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:51:18:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:51:18:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:51:18:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:51:18:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:51:18:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:51:18:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:51:18:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:51:18:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
07:51:18:setup_element:INFO: Scanning data phases
07:51:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:51:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:51:24:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:51:24:setup_element:INFO: Eye window for uplink 16: ___XXXXX________________________________
Data delay found: 25
07:51:24:setup_element:INFO: Eye window for uplink 17: XXXXXX__________________________________
Data delay found: 22
07:51:24:setup_element:INFO: Eye window for uplink 18: _XXXXXX_________________________________
Data delay found: 23
07:51:24:setup_element:INFO: Eye window for uplink 19: __XXXXXX________________________________
Data delay found: 24
07:51:24:setup_element:INFO: Eye window for uplink 20: _____XXXXXX_____________________________
Data delay found: 27
07:51:24:setup_element:INFO: Eye window for uplink 21: ______XXXXXX____________________________
Data delay found: 28
07:51:24:setup_element:INFO: Eye window for uplink 22: __XXXXX_________________________________
Data delay found: 24
07:51:24:setup_element:INFO: Eye window for uplink 23: _XXXX___________________________________
Data delay found: 22
07:51:24:setup_element:INFO: Eye window for uplink 24: ____________XXXXXX______________________
Data delay found: 34
07:51:24:setup_element:INFO: Eye window for uplink 25: ______________XXXXX_____________________
Data delay found: 36
07:51:24:setup_element:INFO: Eye window for uplink 26: _______________XXXXXX___________________
Data delay found: 37
07:51:24:setup_element:INFO: Eye window for uplink 27: ________________XXXXXX__________________
Data delay found: 38
07:51:24:setup_element:INFO: Eye window for uplink 28: __________________XXXXX_________________
Data delay found: 0
07:51:24:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________
Data delay found: 39
07:51:24:setup_element:INFO: Eye window for uplink 30: ______________________XXXXXX____________
Data delay found: 4
07:51:24:setup_element:INFO: Eye window for uplink 31: _____________________XXXXXX_____________
Data delay found: 3
07:51:24:setup_element:INFO: Setting the data phase to 25 for uplink 16
07:51:24:setup_element:INFO: Setting the data phase to 22 for uplink 17
07:51:24:setup_element:INFO: Setting the data phase to 23 for uplink 18
07:51:24:setup_element:INFO: Setting the data phase to 24 for uplink 19
07:51:24:setup_element:INFO: Setting the data phase to 27 for uplink 20
07:51:24:setup_element:INFO: Setting the data phase to 28 for uplink 21
07:51:24:setup_element:INFO: Setting the data phase to 24 for uplink 22
07:51:24:setup_element:INFO: Setting the data phase to 22 for uplink 23
07:51:24:setup_element:INFO: Setting the data phase to 34 for uplink 24
07:51:24:setup_element:INFO: Setting the data phase to 36 for uplink 25
07:51:24:setup_element:INFO: Setting the data phase to 37 for uplink 26
07:51:24:setup_element:INFO: Setting the data phase to 38 for uplink 27
07:51:24:setup_element:INFO: Setting the data phase to 0 for uplink 28
07:51:24:setup_element:INFO: Setting the data phase to 39 for uplink 29
07:51:24:setup_element:INFO: Setting the data phase to 4 for uplink 30
07:51:24:setup_element:INFO: Setting the data phase to 3 for uplink 31
==============================================OOO==============================================
07:51:24:setup_element:INFO: Beginning SMX ASICs map scan
07:51:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:51:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:51:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:51:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:51:24:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:51:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:51:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:51:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:51:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:51:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:51:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:51:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:51:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:51:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:51:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:51:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:51:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:51:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:51:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:51:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:51:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:51:27:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXXX_
Uplink 17: ______________________________________________________________________XXXXXXXXX_
Uplink 18: _____________________________________________________________________XXXXXXXXX__
Uplink 19: _____________________________________________________________________XXXXXXXXX__
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: _____________________________________________________________________XXXXXXXXX__
Uplink 27: _____________________________________________________________________XXXXXXXXX__
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _______________________________________________________________________XXXXXXX__
Uplink 31: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 17:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 18:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 19:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 20:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 21:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 22:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 23:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 24:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 25:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 26:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 27:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 28:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 29:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 30:
Optimal Phase: 4
Window Length: 34
Eye Window: ______________________XXXXXX____________
Uplink 31:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
==============================================OOO==============================================
07:51:27:setup_element:INFO: Performing Elink synchronization
07:51:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:51:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:51:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:51:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
07:51:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:51:27:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:51:27:ST3_emu_feb:DEBUG: Chip address: 0x0
07:51:27:ST3_emu_feb:DEBUG: Chip address: 0x1
07:51:27:ST3_emu_feb:DEBUG: Chip address: 0x2
07:51:27:ST3_emu_feb:DEBUG: Chip address: 0x3
07:51:27:ST3_emu_feb:DEBUG: Chip address: 0x4
07:51:27:ST3_emu_feb:DEBUG: Chip address: 0x5
07:51:27:ST3_emu_feb:DEBUG: Chip address: 0x6
07:51:27:ST3_emu_feb:DEBUG: Chip address: 0x7
07:51:27:febtest:INFO: Init all SMX (CSA): 30
07:51:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:51:41:febtest:INFO: 23-00 | XA-000-09-004-016-011-008-09 | 34.6 | 1141.9
07:51:41:febtest:INFO: 30-01 | XA-000-09-004-016-014-008-02 | 18.7 | 1201.0
07:51:42:febtest:INFO: 21-02 | XA-000-09-004-016-017-007-10 | 37.7 | 1141.9
07:51:42:febtest:INFO: 28-03 | XA-000-09-004-016-005-015-00 | 40.9 | 1124.0
07:51:42:febtest:INFO: 19-04 | XA-000-09-004-016-017-009-10 | 25.1 | 1177.4
07:51:42:febtest:INFO: 26-05 | XA-000-09-004-016-002-015-08 | 21.9 | 1189.2
07:51:43:febtest:INFO: 17-06 | XA-000-09-004-016-008-008-07 | 31.4 | 1153.7
07:51:43:febtest:INFO: 24-07 | XA-000-09-004-016-011-017-14 | 25.1 | 1165.6
07:51:44:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:51:46:ST3_smx:INFO: chip: 23-0 37.726682 C 1147.806000 mV
07:51:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:51:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:51:46:ST3_smx:INFO: Electrons
07:51:53:ST3_smx:INFO: Total # of broken channels: 7
07:51:53:ST3_smx:INFO: List of broken channels: [32, 78, 80, 97, 120, 122, 127]
07:51:53:ST3_smx:INFO: Total # of broken channels: 0
07:51:53:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:51:55:ST3_smx:INFO: chip: 30-1 21.902970 C 1212.728715 mV
07:51:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:51:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:51:55:ST3_smx:INFO: Electrons
07:52:01:ST3_smx:INFO: Total # of broken channels: 10
07:52:01:ST3_smx:INFO: List of broken channels: [14, 27, 50, 88, 92, 93, 95, 100, 109, 114]
07:52:01:ST3_smx:INFO: Total # of broken channels: 0
07:52:01:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:52:03:ST3_smx:INFO: chip: 21-2 37.726682 C 1147.806000 mV
07:52:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:03:ST3_smx:INFO: Electrons
07:52:10:ST3_smx:INFO: Total # of broken channels: 5
07:52:10:ST3_smx:INFO: List of broken channels: [15, 28, 44, 81, 104]
07:52:10:ST3_smx:INFO: Total # of broken channels: 2
07:52:10:ST3_smx:INFO: List of broken channels: [43, 63]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:52:12:ST3_smx:INFO: chip: 28-3 44.073563 C 1135.937260 mV
07:52:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:12:ST3_smx:INFO: Electrons
07:52:19:ST3_smx:INFO: Total # of broken channels: 3
07:52:19:ST3_smx:INFO: List of broken channels: [52, 56, 119]
07:52:19:ST3_smx:INFO: Total # of broken channels: 0
07:52:19:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:52:20:ST3_smx:INFO: chip: 19-4 25.062742 C 1189.190035 mV
07:52:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:20:ST3_smx:INFO: Electrons
07:52:27:ST3_smx:INFO: Total # of broken channels: 4
07:52:27:ST3_smx:INFO: List of broken channels: [22, 23, 60, 97]
07:52:27:ST3_smx:INFO: Total # of broken channels: 1
07:52:27:ST3_smx:INFO: List of broken channels: [3]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:52:29:ST3_smx:INFO: chip: 26-5 25.062742 C 1200.969315 mV
07:52:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:29:ST3_smx:INFO: Electrons
07:52:35:ST3_smx:INFO: Total # of broken channels: 3
07:52:35:ST3_smx:INFO: List of broken channels: [4, 31, 54]
07:52:35:ST3_smx:INFO: Total # of broken channels: 1
07:52:35:ST3_smx:INFO: List of broken channels: [60]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:52:37:ST3_smx:INFO: chip: 17-6 34.556970 C 1165.571835 mV
07:52:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:37:ST3_smx:INFO: Electrons
07:52:44:ST3_smx:INFO: Total # of broken channels: 3
07:52:44:ST3_smx:INFO: List of broken channels: [0, 12, 88]
07:52:44:ST3_smx:INFO: Total # of broken channels: 1
07:52:44:ST3_smx:INFO: List of broken channels: [5]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:52:46:ST3_smx:INFO: chip: 24-7 28.225000 C 1177.390875 mV
07:52:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:46:ST3_smx:INFO: Electrons
07:52:53:ST3_smx:INFO: Total # of broken channels: 5
07:52:53:ST3_smx:INFO: List of broken channels: [36, 47, 64, 72, 114]
07:52:53:ST3_smx:INFO: Total # of broken channels: 0
07:52:53:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:52:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:52:53:febtest:INFO: 23-00 | XA-000-09-004-016-011-008-09 | 40.9 | 1171.5
07:52:53:febtest:INFO: 30-01 | XA-000-09-004-016-014-008-02 | 25.1 | 1236.2
07:52:54:febtest:INFO: 21-02 | XA-000-09-004-016-017-007-10 | 40.9 | 1171.5
07:52:54:febtest:INFO: 28-03 | XA-000-09-004-016-005-015-00 | 47.3 | 1153.7
07:52:54:febtest:INFO: 19-04 | XA-000-09-004-016-017-009-10 | 28.2 | 1212.7
07:52:54:febtest:INFO: 26-05 | XA-000-09-004-016-002-015-08 | 25.1 | 1224.5
07:52:55:febtest:INFO: 17-06 | XA-000-09-004-016-008-008-07 | 34.6 | 1183.3
07:52:55:febtest:INFO: 24-07 | XA-000-09-004-016-011-017-14 | 28.2 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_06_06-07_50_52
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2410| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 03092 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M7DR6T0000240B2
LADDER_NAME: L7DR600024
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4510', '1.848', '2.3580']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0120', '1.850', '2.5300']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9680', '1.850', '0.5237']