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FEB_2427 13.06.25 08:54:10
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08:54:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:54:10:ST3_Shared:INFO: FEB-Sensor
08:54:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:54:52:ST3_ModuleSelector:INFO: M7DR6T3000243B2
08:54:52:ST3_ModuleSelector:INFO: 11264
08:54:52:febtest:INFO: Testing FEB with SN 2427
==============================================OOO==============================================
08:54:54:smx_tester:INFO: Scanning setup
08:54:54:elinks:INFO: Disabling clock on downlink 0
08:54:54:elinks:INFO: Disabling clock on downlink 1
08:54:54:elinks:INFO: Disabling clock on downlink 2
08:54:54:elinks:INFO: Disabling clock on downlink 3
08:54:54:elinks:INFO: Disabling clock on downlink 4
08:54:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:54:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:54:elinks:INFO: Disabling clock on downlink 0
08:54:54:elinks:INFO: Disabling clock on downlink 1
08:54:54:elinks:INFO: Disabling clock on downlink 2
08:54:54:elinks:INFO: Disabling clock on downlink 3
08:54:54:elinks:INFO: Disabling clock on downlink 4
08:54:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:54:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:54:elinks:INFO: Disabling clock on downlink 0
08:54:54:elinks:INFO: Disabling clock on downlink 1
08:54:54:elinks:INFO: Disabling clock on downlink 2
08:54:54:elinks:INFO: Disabling clock on downlink 3
08:54:54:elinks:INFO: Disabling clock on downlink 4
08:54:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:54:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:54:elinks:INFO: Disabling clock on downlink 0
08:54:54:elinks:INFO: Disabling clock on downlink 1
08:54:54:elinks:INFO: Disabling clock on downlink 2
08:54:54:elinks:INFO: Disabling clock on downlink 3
08:54:54:elinks:INFO: Disabling clock on downlink 4
08:54:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:54:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:54:elinks:INFO: Disabling clock on downlink 0
08:54:54:elinks:INFO: Disabling clock on downlink 1
08:54:54:elinks:INFO: Disabling clock on downlink 2
08:54:54:elinks:INFO: Disabling clock on downlink 3
08:54:54:elinks:INFO: Disabling clock on downlink 4
08:54:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:54:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:54:55:setup_element:INFO: Scanning clock phase
08:54:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:55:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:54:55:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:54:55:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:54:55:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:54:55:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:54:55:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:54:55:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:54:55:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:54:55:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:54:55:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:54:55:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:54:55:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:54:55:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:54:55:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:54:55:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:54:55:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:54:55:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:54:55:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
08:54:55:setup_element:INFO: Scanning data phases
08:54:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:55:01:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:55:01:setup_element:INFO: Eye window for uplink 16: XXXXX___________________________________
Data delay found: 22
08:55:01:setup_element:INFO: Eye window for uplink 17: XXXX__________________________________XX
Data delay found: 20
08:55:01:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
08:55:01:setup_element:INFO: Eye window for uplink 19: XXXX_________________________________XXX
Data delay found: 20
08:55:01:setup_element:INFO: Eye window for uplink 20: ___XXXXX________________________________
Data delay found: 25
08:55:01:setup_element:INFO: Eye window for uplink 21: ___XXXXXX_______________________________
Data delay found: 25
08:55:01:setup_element:INFO: Eye window for uplink 22: _XXXXX_________________________________X
Data delay found: 22
08:55:01:setup_element:INFO: Eye window for uplink 23: XXXX__________________________________XX
Data delay found: 20
08:55:01:setup_element:INFO: Eye window for uplink 24: __________XXXXXX________________________
Data delay found: 32
08:55:01:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
08:55:01:setup_element:INFO: Eye window for uplink 26: __________________XXXXXX________________
Data delay found: 0
08:55:01:setup_element:INFO: Eye window for uplink 27: ___________________XXXXXX_______________
Data delay found: 1
08:55:01:setup_element:INFO: Eye window for uplink 28: __________________XXXXXX________________
Data delay found: 0
08:55:01:setup_element:INFO: Eye window for uplink 29: __________________XXXXX_________________
Data delay found: 0
08:55:01:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXXX_____________
Data delay found: 3
08:55:01:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXX_______________
Data delay found: 1
08:55:01:setup_element:INFO: Setting the data phase to 22 for uplink 16
08:55:01:setup_element:INFO: Setting the data phase to 20 for uplink 17
08:55:01:setup_element:INFO: Setting the data phase to 19 for uplink 18
08:55:01:setup_element:INFO: Setting the data phase to 20 for uplink 19
08:55:01:setup_element:INFO: Setting the data phase to 25 for uplink 20
08:55:01:setup_element:INFO: Setting the data phase to 25 for uplink 21
08:55:01:setup_element:INFO: Setting the data phase to 22 for uplink 22
08:55:01:setup_element:INFO: Setting the data phase to 20 for uplink 23
08:55:01:setup_element:INFO: Setting the data phase to 32 for uplink 24
08:55:01:setup_element:INFO: Setting the data phase to 34 for uplink 25
08:55:01:setup_element:INFO: Setting the data phase to 0 for uplink 26
08:55:01:setup_element:INFO: Setting the data phase to 1 for uplink 27
08:55:01:setup_element:INFO: Setting the data phase to 0 for uplink 28
08:55:01:setup_element:INFO: Setting the data phase to 0 for uplink 29
08:55:01:setup_element:INFO: Setting the data phase to 3 for uplink 30
08:55:01:setup_element:INFO: Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
08:55:01:setup_element:INFO: Beginning SMX ASICs map scan
08:55:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:55:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:55:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:55:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:55:01:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:55:01:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:55:01:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:55:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:55:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:55:01:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:55:01:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:55:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:55:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:55:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:55:02:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:55:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:55:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:55:02:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:55:02:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:55:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:55:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:55:03:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXX___
Uplink 17: ______________________________________________________________________XXXXXXX___
Uplink 18: ____________________________________________________________________XXXXXXXX____
Uplink 19: ____________________________________________________________________XXXXXXXX____
Uplink 20: ______________________________________________________________________XXXXXXXX__
Uplink 21: ______________________________________________________________________XXXXXXXX__
Uplink 22: _____________________________________________________________________XXXXXXXXX__
Uplink 23: _____________________________________________________________________XXXXXXXXX__
Uplink 24: ____________________________________________________________________XXXXXXXX____
Uplink 25: ____________________________________________________________________XXXXXXXX____
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: _____________________________________________________________________XXXXXXXXX__
Uplink 29: _____________________________________________________________________XXXXXXXXX__
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 22
Window Length: 35
Eye Window: XXXXX___________________________________
Uplink 17:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 18:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 19:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 20:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 21:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 22:
Optimal Phase: 22
Window Length: 33
Eye Window: _XXXXX_________________________________X
Uplink 23:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 24:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 25:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 26:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 27:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 28:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 29:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 30:
Optimal Phase: 3
Window Length: 33
Eye Window: ____________________XXXXXXX_____________
Uplink 31:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
==============================================OOO==============================================
08:55:03:setup_element:INFO: Performing Elink synchronization
08:55:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:55:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:55:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:55:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
08:55:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:55:04:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x0
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x1
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x2
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x3
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x4
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x5
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x6
08:55:04:ST3_emu_feb:DEBUG: Chip address: 0x7
08:55:04:febtest:INFO: Init all SMX (CSA): 30
08:55:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:55:18:febtest:INFO: 23-00 | XA-000-09-004-016-005-017-07 | 37.7 | 1147.8
08:55:18:febtest:INFO: 30-01 | XA-000-09-004-015-014-021-15 | 34.6 | 1153.7
08:55:18:febtest:INFO: 21-02 | XA-000-09-004-015-014-023-15 | 40.9 | 1141.9
08:55:19:febtest:INFO: 28-03 | XA-000-09-004-015-005-021-13 | 44.1 | 1130.0
08:55:19:febtest:INFO: 19-04 | XA-000-09-004-016-011-018-14 | 47.3 | 1112.1
08:55:19:febtest:INFO: 26-05 | XA-000-09-004-015-017-022-07 | 18.7 | 1218.6
08:55:19:febtest:INFO: 17-06 | XA-000-09-004-015-008-021-10 | 37.7 | 1153.7
08:55:20:febtest:INFO: 24-07 | XA-000-09-004-016-017-018-13 | 21.9 | 1189.2
08:55:21:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:55:23:ST3_smx:INFO: chip: 23-0 37.726682 C 1165.571835 mV
08:55:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:23:ST3_smx:INFO: Electrons
08:55:30:ST3_smx:INFO: Total # of broken channels: 5
08:55:30:ST3_smx:INFO: List of broken channels: [2, 17, 25, 61, 117]
08:55:30:ST3_smx:INFO: Total # of broken channels: 0
08:55:30:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:31:ST3_smx:INFO: chip: 30-1 34.556970 C 1171.483840 mV
08:55:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:31:ST3_smx:INFO: Electrons
08:55:38:ST3_smx:INFO: Total # of broken channels: 4
08:55:38:ST3_smx:INFO: List of broken channels: [0, 6, 30, 55]
08:55:38:ST3_smx:INFO: Total # of broken channels: 0
08:55:38:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:40:ST3_smx:INFO: chip: 21-2 40.898880 C 1147.806000 mV
08:55:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:40:ST3_smx:INFO: Electrons
08:55:47:ST3_smx:INFO: Total # of broken channels: 4
08:55:47:ST3_smx:INFO: List of broken channels: [46, 52, 72, 102]
08:55:47:ST3_smx:INFO: Total # of broken channels: 0
08:55:47:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:48:ST3_smx:INFO: chip: 28-3 44.073563 C 1141.874115 mV
08:55:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:49:ST3_smx:INFO: Electrons
08:55:55:ST3_smx:INFO: Total # of broken channels: 3
08:55:55:ST3_smx:INFO: List of broken channels: [52, 91, 101]
08:55:55:ST3_smx:INFO: Total # of broken channels: 0
08:55:55:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:57:ST3_smx:INFO: chip: 19-4 47.250730 C 1124.048640 mV
08:55:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:57:ST3_smx:INFO: Electrons
08:56:04:ST3_smx:INFO: Total # of broken channels: 6
08:56:04:ST3_smx:INFO: List of broken channels: [6, 7, 57, 72, 84, 88]
08:56:04:ST3_smx:INFO: Total # of broken channels: 0
08:56:04:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:56:06:ST3_smx:INFO: chip: 26-5 18.745682 C 1236.187875 mV
08:56:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:06:ST3_smx:INFO: Electrons
08:56:12:ST3_smx:INFO: Total # of broken channels: 7
08:56:12:ST3_smx:INFO: List of broken channels: [2, 3, 27, 34, 79, 91, 103]
08:56:12:ST3_smx:INFO: Total # of broken channels: 0
08:56:12:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:56:14:ST3_smx:INFO: chip: 17-6 37.726682 C 1165.571835 mV
08:56:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:14:ST3_smx:INFO: Electrons
08:56:21:ST3_smx:INFO: Total # of broken channels: 4
08:56:21:ST3_smx:INFO: List of broken channels: [25, 49, 51, 53]
08:56:21:ST3_smx:INFO: Total # of broken channels: 1
08:56:21:ST3_smx:INFO: List of broken channels: [27]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:56:23:ST3_smx:INFO: chip: 24-7 25.062742 C 1200.969315 mV
08:56:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:23:ST3_smx:INFO: Electrons
08:56:29:ST3_smx:INFO: Total # of broken channels: 5
08:56:29:ST3_smx:INFO: List of broken channels: [33, 41, 58, 67, 80]
08:56:29:ST3_smx:INFO: Total # of broken channels: 10
08:56:29:ST3_smx:INFO: List of broken channels: [11, 32, 51, 55, 65, 77, 101, 109, 117, 123]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:56:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:56:30:febtest:INFO: 23-00 | XA-000-09-004-016-005-017-07 | 40.9 | 1195.1
08:56:30:febtest:INFO: 30-01 | XA-000-09-004-015-014-021-15 | 37.7 | 1189.2
08:56:31:febtest:INFO: 21-02 | XA-000-09-004-015-014-023-15 | 40.9 | 1171.5
08:56:31:febtest:INFO: 28-03 | XA-000-09-004-015-005-021-13 | 47.3 | 1165.6
08:56:31:febtest:INFO: 19-04 | XA-000-09-004-016-011-018-14 | 50.4 | 1141.9
08:56:31:febtest:INFO: 26-05 | XA-000-09-004-015-017-022-07 | 15.6 | 1329.2
08:56:32:febtest:INFO: 17-06 | XA-000-09-004-015-008-021-10 | 37.7 | 1183.3
08:56:32:febtest:INFO: 24-07 | XA-000-09-004-016-017-018-13 | 25.1 | 1218.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_06_13-08_54_10
OPERATOR : Hannah M.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2427| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 11264 | SIZE: 62x124 | GRADE: C
MODULE_NAME: M7DR6T3000243B2
LADDER_NAME: L7DR600024
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.4860', '1.848', '2.4890']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0380', '1.850', '2.5740']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9860', '1.850', '0.5290']