Go Back
FEB_2428 13.06.25 08:39:54
Info
08:39:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:39:54:ST3_Shared:INFO: FEB-Sensor
08:39:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:40:03:ST3_ModuleSelector:INFO: M7DR6B2000242A2
08:40:03:ST3_ModuleSelector:INFO: 20094
08:40:03:febtest:INFO: Testing FEB with SN 2428
==============================================OOO==============================================
08:40:05:smx_tester:INFO: Scanning setup
08:40:05:elinks:INFO: Disabling clock on downlink 0
08:40:05:elinks:INFO: Disabling clock on downlink 1
08:40:05:elinks:INFO: Disabling clock on downlink 2
08:40:05:elinks:INFO: Disabling clock on downlink 3
08:40:05:elinks:INFO: Disabling clock on downlink 4
08:40:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:40:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:40:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:40:05:elinks:INFO: Disabling clock on downlink 0
08:40:05:elinks:INFO: Disabling clock on downlink 1
08:40:05:elinks:INFO: Disabling clock on downlink 2
08:40:05:elinks:INFO: Disabling clock on downlink 3
08:40:05:elinks:INFO: Disabling clock on downlink 4
08:40:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:40:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:40:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:40:05:elinks:INFO: Disabling clock on downlink 0
08:40:05:elinks:INFO: Disabling clock on downlink 1
08:40:05:elinks:INFO: Disabling clock on downlink 2
08:40:05:elinks:INFO: Disabling clock on downlink 3
08:40:05:elinks:INFO: Disabling clock on downlink 4
08:40:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:40:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:40:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:40:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:40:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:40:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:40:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:40:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:40:06:elinks:INFO: Disabling clock on downlink 0
08:40:06:elinks:INFO: Disabling clock on downlink 1
08:40:06:elinks:INFO: Disabling clock on downlink 2
08:40:06:elinks:INFO: Disabling clock on downlink 3
08:40:06:elinks:INFO: Disabling clock on downlink 4
08:40:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:40:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:40:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:40:06:elinks:INFO: Disabling clock on downlink 0
08:40:06:elinks:INFO: Disabling clock on downlink 1
08:40:06:elinks:INFO: Disabling clock on downlink 2
08:40:06:elinks:INFO: Disabling clock on downlink 3
08:40:06:elinks:INFO: Disabling clock on downlink 4
08:40:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:40:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:40:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:40:06:setup_element:INFO: Scanning clock phase
08:40:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:40:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:40:06:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:40:06:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:40:06:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:40:06:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:40:06:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:40:06:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:40:06:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:40:06:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:40:06:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:40:06:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:40:06:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:40:06:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:40:06:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:40:06:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:40:06:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:40:06:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:40:06:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:40:06:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
08:40:06:setup_element:INFO: Scanning data phases
08:40:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:40:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:40:12:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:40:12:setup_element:INFO: Eye window for uplink 16: ____XXXX________________________________
Data delay found: 25
08:40:12:setup_element:INFO: Eye window for uplink 17: __XXXX__________________________________
Data delay found: 23
08:40:12:setup_element:INFO: Eye window for uplink 18: __XXXXX_________________________________
Data delay found: 24
08:40:12:setup_element:INFO: Eye window for uplink 19: ___XXXXX________________________________
Data delay found: 25
08:40:12:setup_element:INFO: Eye window for uplink 20: ___XXXXX________________________________
Data delay found: 25
08:40:12:setup_element:INFO: Eye window for uplink 21: ____XXXXXX______________________________
Data delay found: 26
08:40:12:setup_element:INFO: Eye window for uplink 22: __XXXXX_________________________________
Data delay found: 24
08:40:12:setup_element:INFO: Eye window for uplink 23: _XXXX___________________________________
Data delay found: 22
08:40:12:setup_element:INFO: Eye window for uplink 24: ____________XXXXXX______________________
Data delay found: 34
08:40:12:setup_element:INFO: Eye window for uplink 25: ______________XXXXXX____________________
Data delay found: 36
08:40:12:setup_element:INFO: Eye window for uplink 26: ____________XXXXXX______________________
Data delay found: 34
08:40:12:setup_element:INFO: Eye window for uplink 27: ______________XXXXXX____________________
Data delay found: 36
08:40:12:setup_element:INFO: Eye window for uplink 28: ____________________XXXXXX______________
Data delay found: 2
08:40:12:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________
Data delay found: 1
08:40:12:setup_element:INFO: Eye window for uplink 30: _______________________XXXXX____________
Data delay found: 5
08:40:12:setup_element:INFO: Eye window for uplink 31: ______________________XXXXX_____________
Data delay found: 4
08:40:12:setup_element:INFO: Setting the data phase to 25 for uplink 16
08:40:12:setup_element:INFO: Setting the data phase to 23 for uplink 17
08:40:12:setup_element:INFO: Setting the data phase to 24 for uplink 18
08:40:12:setup_element:INFO: Setting the data phase to 25 for uplink 19
08:40:12:setup_element:INFO: Setting the data phase to 25 for uplink 20
08:40:12:setup_element:INFO: Setting the data phase to 26 for uplink 21
08:40:12:setup_element:INFO: Setting the data phase to 24 for uplink 22
08:40:12:setup_element:INFO: Setting the data phase to 22 for uplink 23
08:40:12:setup_element:INFO: Setting the data phase to 34 for uplink 24
08:40:12:setup_element:INFO: Setting the data phase to 36 for uplink 25
08:40:12:setup_element:INFO: Setting the data phase to 34 for uplink 26
08:40:12:setup_element:INFO: Setting the data phase to 36 for uplink 27
08:40:12:setup_element:INFO: Setting the data phase to 2 for uplink 28
08:40:12:setup_element:INFO: Setting the data phase to 1 for uplink 29
08:40:12:setup_element:INFO: Setting the data phase to 5 for uplink 30
08:40:12:setup_element:INFO: Setting the data phase to 4 for uplink 31
==============================================OOO==============================================
08:40:12:setup_element:INFO: Beginning SMX ASICs map scan
08:40:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:40:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:40:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:40:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:40:12:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:40:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:40:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:40:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:40:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:40:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:40:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:40:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:40:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:40:13:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:40:13:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:40:13:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:40:13:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:40:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:40:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:40:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:40:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:40:14:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXX_
Uplink 17: _______________________________________________________________________XXXXXXXX_
Uplink 18: ______________________________________________________________________XXXXXXXXX_
Uplink 19: ______________________________________________________________________XXXXXXXXX_
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: _____________________________________________________________________XXXXXXXXX__
Uplink 23: _____________________________________________________________________XXXXXXXXX__
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXXXX_
Uplink 29: ______________________________________________________________________XXXXXXXXX_
Uplink 30: _______________________________________________________________________XXXXXXX__
Uplink 31: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
Uplink 17:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 18:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 19:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 20:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 21:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 22:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 23:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 24:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 25:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 26:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 27:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 28:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 29:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 30:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 31:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
==============================================OOO==============================================
08:40:15:setup_element:INFO: Performing Elink synchronization
08:40:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:40:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:40:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:40:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
08:40:15:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:40:15:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:40:15:ST3_emu_feb:DEBUG: Chip address: 0x0
08:40:15:ST3_emu_feb:DEBUG: Chip address: 0x1
08:40:15:ST3_emu_feb:DEBUG: Chip address: 0x2
08:40:15:ST3_emu_feb:DEBUG: Chip address: 0x3
08:40:15:ST3_emu_feb:DEBUG: Chip address: 0x4
08:40:15:ST3_emu_feb:DEBUG: Chip address: 0x5
08:40:15:ST3_emu_feb:DEBUG: Chip address: 0x6
08:40:15:ST3_emu_feb:DEBUG: Chip address: 0x7
08:40:15:febtest:INFO: Init all SMX (CSA): 30
08:40:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:40:30:febtest:INFO: 23-00 | XA-000-09-004-010-007-023-13 | 28.2 | 1159.7
08:40:31:febtest:INFO: 30-01 | XA-000-09-004-010-010-025-10 | 28.2 | 1159.7
08:40:31:febtest:INFO: 21-02 | XA-000-09-004-010-007-026-13 | 31.4 | 1153.7
08:40:31:febtest:INFO: 28-03 | XA-000-09-004-010-007-025-13 | 28.2 | 1159.7
08:40:31:febtest:INFO: 19-04 | XA-000-09-004-010-013-025-02 | 15.6 | 1201.0
08:40:31:febtest:INFO: 26-05 | XA-000-09-004-015-011-021-04 | 28.2 | 1147.8
08:40:32:febtest:INFO: 17-06 | XA-000-09-004-010-004-022-03 | 15.6 | 1201.0
08:40:32:febtest:INFO: 24-07 | XA-000-09-004-016-017-019-13 | -3.3 | 1259.6
08:40:33:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:40:35:ST3_smx:INFO: chip: 23-0 31.389742 C 1171.483840 mV
08:40:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:35:ST3_smx:INFO: Electrons
08:40:42:ST3_smx:INFO: Total # of broken channels: 4
08:40:42:ST3_smx:INFO: List of broken channels: [21, 72, 83, 89]
08:40:42:ST3_smx:INFO: Total # of broken channels: 2
08:40:42:ST3_smx:INFO: List of broken channels: [41, 43]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:40:44:ST3_smx:INFO: chip: 30-1 31.389742 C 1171.483840 mV
08:40:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:44:ST3_smx:INFO: Electrons
08:40:50:ST3_smx:INFO: Total # of broken channels: 7
08:40:50:ST3_smx:INFO: List of broken channels: [34, 56, 78, 79, 100, 106, 107]
08:40:50:ST3_smx:INFO: Total # of broken channels: 0
08:40:50:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:40:52:ST3_smx:INFO: chip: 21-2 31.389742 C 1165.571835 mV
08:40:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:52:ST3_smx:INFO: Electrons
08:40:59:ST3_smx:INFO: Total # of broken channels: 2
08:40:59:ST3_smx:INFO: List of broken channels: [87, 117]
08:40:59:ST3_smx:INFO: Total # of broken channels: 0
08:40:59:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:41:01:ST3_smx:INFO: chip: 28-3 31.389742 C 1171.483840 mV
08:41:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:01:ST3_smx:INFO: Electrons
08:41:07:ST3_smx:INFO: Total # of broken channels: 6
08:41:07:ST3_smx:INFO: List of broken channels: [7, 44, 46, 94, 96, 102]
08:41:07:ST3_smx:INFO: Total # of broken channels: 0
08:41:07:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:41:09:ST3_smx:INFO: chip: 19-4 15.590880 C 1212.728715 mV
08:41:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:09:ST3_smx:INFO: Electrons
08:41:16:ST3_smx:INFO: Total # of broken channels: 6
08:41:16:ST3_smx:INFO: List of broken channels: [18, 41, 46, 73, 76, 110]
08:41:16:ST3_smx:INFO: Total # of broken channels: 1
08:41:16:ST3_smx:INFO: List of broken channels: [47]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:41:18:ST3_smx:INFO: chip: 26-5 31.389742 C 1159.654860 mV
08:41:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:18:ST3_smx:INFO: Electrons
08:41:24:ST3_smx:INFO: Total # of broken channels: 9
08:41:24:ST3_smx:INFO: List of broken channels: [7, 20, 27, 47, 59, 68, 76, 117, 124]
08:41:24:ST3_smx:INFO: Total # of broken channels: 0
08:41:24:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:41:26:ST3_smx:INFO: chip: 17-6 15.590880 C 1212.728715 mV
08:41:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:26:ST3_smx:INFO: Electrons
08:41:33:ST3_smx:INFO: Total # of broken channels: 7
08:41:33:ST3_smx:INFO: List of broken channels: [5, 22, 24, 62, 101, 115, 123]
08:41:33:ST3_smx:INFO: Total # of broken channels: 0
08:41:33:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:41:35:ST3_smx:INFO: chip: 24-7 -3.285750 C 1271.227515 mV
08:41:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:35:ST3_smx:INFO: Electrons
08:41:42:ST3_smx:INFO: Total # of broken channels: 9
08:41:42:ST3_smx:INFO: List of broken channels: [1, 4, 29, 45, 79, 97, 100, 114, 124]
08:41:42:ST3_smx:INFO: Total # of broken channels: 2
08:41:42:ST3_smx:INFO: List of broken channels: [124, 127]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:41:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:41:42:febtest:INFO: 23-00 | XA-000-09-004-010-007-023-13 | 31.4 | 1189.2
08:41:42:febtest:INFO: 30-01 | XA-000-09-004-010-010-025-10 | 31.4 | 1189.2
08:41:43:febtest:INFO: 21-02 | XA-000-09-004-010-007-026-13 | 34.6 | 1183.3
08:41:43:febtest:INFO: 28-03 | XA-000-09-004-010-007-025-13 | 31.4 | 1195.1
08:41:43:febtest:INFO: 19-04 | XA-000-09-004-010-013-025-02 | 18.7 | 1230.3
08:41:43:febtest:INFO: 26-05 | XA-000-09-004-015-011-021-04 | 31.4 | 1177.4
08:41:44:febtest:INFO: 17-06 | XA-000-09-004-010-004-022-03 | 18.7 | 1230.3
08:41:44:febtest:INFO: 24-07 | XA-000-09-004-016-017-019-13 | -0.1 | 1288.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_06_13-08_39_54
OPERATOR : Hannah M.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2428| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 20094 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M7DR6B2000242A2
LADDER_NAME: L7DR600024
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4440', '1.848', '1.8680']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9750', '1.850', '2.5700']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9360', '1.850', '0.5198']