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FEB_2431 06.06.25 10:39:00
Info
10:39:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:39:00:ST3_Shared:INFO: FEB-Microcable
10:39:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:39:00:febtest:INFO: Testing FEB with SN 2431
==============================================OOO==============================================
10:39:02:smx_tester:INFO: Scanning setup
10:39:02:elinks:INFO: Disabling clock on downlink 0
10:39:02:elinks:INFO: Disabling clock on downlink 1
10:39:02:elinks:INFO: Disabling clock on downlink 2
10:39:02:elinks:INFO: Disabling clock on downlink 3
10:39:02:elinks:INFO: Disabling clock on downlink 4
10:39:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:39:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:39:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:39:02:elinks:INFO: Disabling clock on downlink 0
10:39:02:elinks:INFO: Disabling clock on downlink 1
10:39:02:elinks:INFO: Disabling clock on downlink 2
10:39:02:elinks:INFO: Disabling clock on downlink 3
10:39:02:elinks:INFO: Disabling clock on downlink 4
10:39:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:39:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:39:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:39:02:elinks:INFO: Disabling clock on downlink 0
10:39:02:elinks:INFO: Disabling clock on downlink 1
10:39:02:elinks:INFO: Disabling clock on downlink 2
10:39:02:elinks:INFO: Disabling clock on downlink 3
10:39:02:elinks:INFO: Disabling clock on downlink 4
10:39:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:39:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:39:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:39:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:39:03:elinks:INFO: Disabling clock on downlink 0
10:39:03:elinks:INFO: Disabling clock on downlink 1
10:39:03:elinks:INFO: Disabling clock on downlink 2
10:39:03:elinks:INFO: Disabling clock on downlink 3
10:39:03:elinks:INFO: Disabling clock on downlink 4
10:39:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:39:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:39:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:39:03:elinks:INFO: Disabling clock on downlink 0
10:39:03:elinks:INFO: Disabling clock on downlink 1
10:39:03:elinks:INFO: Disabling clock on downlink 2
10:39:03:elinks:INFO: Disabling clock on downlink 3
10:39:03:elinks:INFO: Disabling clock on downlink 4
10:39:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:39:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:39:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:39:03:setup_element:INFO: Scanning clock phase
10:39:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:39:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:39:03:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:39:03:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:39:03:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:39:03:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:39:03:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:39:03:setup_element:INFO: Eye window for uplink 20: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
10:39:03:setup_element:INFO: Eye window for uplink 21: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
10:39:03:setup_element:INFO: Eye window for uplink 22: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
10:39:03:setup_element:INFO: Eye window for uplink 23: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
10:39:03:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:39:03:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:39:03:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:39:03:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:39:03:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:39:03:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:39:03:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:39:03:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:39:03:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
10:39:03:setup_element:INFO: Scanning data phases
10:39:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:39:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:39:09:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:39:09:setup_element:INFO: Eye window for uplink 16: __XXXXX_________________________________
Data delay found: 24
10:39:09:setup_element:INFO: Eye window for uplink 17: _XXXX___________________________________
Data delay found: 22
10:39:09:setup_element:INFO: Eye window for uplink 18: XXXX__________________________________XX
Data delay found: 20
10:39:09:setup_element:INFO: Eye window for uplink 19: XXXXX_________________________________XX
Data delay found: 21
10:39:09:setup_element:INFO: Eye window for uplink 20: XXXX___________________________________X
Data delay found: 21
10:39:09:setup_element:INFO: Eye window for uplink 21: XXXXXX__________________________________
Data delay found: 22
10:39:09:setup_element:INFO: Eye window for uplink 22: XXXX__________________________________XX
Data delay found: 20
10:39:09:setup_element:INFO: Eye window for uplink 23: XX___________________________________XXX
Data delay found: 19
10:39:09:setup_element:INFO: Eye window for uplink 24: ____________XXXXXX______________________
Data delay found: 34
10:39:09:setup_element:INFO: Eye window for uplink 25: ______________XXXXXX____________________
Data delay found: 36
10:39:09:setup_element:INFO: Eye window for uplink 26: _______________XXXXXX___________________
Data delay found: 37
10:39:09:setup_element:INFO: Eye window for uplink 27: ________________XXXXXX__________________
Data delay found: 38
10:39:09:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXX_______________
Data delay found: 1
10:39:09:setup_element:INFO: Eye window for uplink 29: __________________XXXXXXX_______________
Data delay found: 1
10:39:09:setup_element:INFO: Eye window for uplink 30: _____________________XXXXXX_____________
Data delay found: 3
10:39:09:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXX_______________
Data delay found: 1
10:39:09:setup_element:INFO: Setting the data phase to 24 for uplink 16
10:39:09:setup_element:INFO: Setting the data phase to 22 for uplink 17
10:39:09:setup_element:INFO: Setting the data phase to 20 for uplink 18
10:39:09:setup_element:INFO: Setting the data phase to 21 for uplink 19
10:39:09:setup_element:INFO: Setting the data phase to 21 for uplink 20
10:39:09:setup_element:INFO: Setting the data phase to 22 for uplink 21
10:39:09:setup_element:INFO: Setting the data phase to 20 for uplink 22
10:39:09:setup_element:INFO: Setting the data phase to 19 for uplink 23
10:39:09:setup_element:INFO: Setting the data phase to 34 for uplink 24
10:39:09:setup_element:INFO: Setting the data phase to 36 for uplink 25
10:39:09:setup_element:INFO: Setting the data phase to 37 for uplink 26
10:39:09:setup_element:INFO: Setting the data phase to 38 for uplink 27
10:39:09:setup_element:INFO: Setting the data phase to 1 for uplink 28
10:39:09:setup_element:INFO: Setting the data phase to 1 for uplink 29
10:39:09:setup_element:INFO: Setting the data phase to 3 for uplink 30
10:39:09:setup_element:INFO: Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
10:39:09:setup_element:INFO: Beginning SMX ASICs map scan
10:39:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:39:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:39:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:39:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:39:09:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:39:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:39:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:39:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:39:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:39:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:39:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:39:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:39:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:39:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:39:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:39:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:39:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:39:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:39:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:39:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:39:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:39:12:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 69
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: ____________________________________________________________________XXXXXXXX____
Uplink 19: ____________________________________________________________________XXXXXXXX____
Uplink 20: ___________________________________________________________________XXXXXXXXX____
Uplink 21: ___________________________________________________________________XXXXXXXXX____
Uplink 22: ___________________________________________________________________XXXXXXXXX____
Uplink 23: ___________________________________________________________________XXXXXXXXX____
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 17:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 18:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 19:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 20:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 21:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 22:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 23:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 24:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 25:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 26:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 27:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 28:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 29:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
Uplink 30:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 31:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
==============================================OOO==============================================
10:39:12:setup_element:INFO: Performing Elink synchronization
10:39:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:39:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:39:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:39:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:39:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:39:12:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:39:12:ST3_emu_feb:DEBUG: Chip address: 0x0
10:39:12:ST3_emu_feb:DEBUG: Chip address: 0x1
10:39:12:ST3_emu_feb:DEBUG: Chip address: 0x2
10:39:12:ST3_emu_feb:DEBUG: Chip address: 0x3
10:39:12:ST3_emu_feb:DEBUG: Chip address: 0x4
10:39:12:ST3_emu_feb:DEBUG: Chip address: 0x5
10:39:12:ST3_emu_feb:DEBUG: Chip address: 0x6
10:39:12:ST3_emu_feb:DEBUG: Chip address: 0x7
10:39:13:febtest:INFO: Init all SMX (CSA): 30
10:39:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:39:26:febtest:INFO: 23-00 | XA-000-09-004-009-009-012-02 | 37.7 | 1153.7
10:39:26:febtest:INFO: 30-01 | XA-000-09-004-009-007-017-12 | 37.7 | 1141.9
10:39:27:febtest:INFO: 21-02 | XA-000-09-004-009-008-009-15 | 44.1 | 1130.0
10:39:27:febtest:INFO: 28-03 | XA-000-09-004-009-007-008-11 | 44.1 | 1118.1
10:39:27:febtest:INFO: 19-04 | XA-000-09-004-009-009-009-02 | 25.1 | 1189.2
10:39:27:febtest:INFO: 26-05 | XA-000-09-004-009-008-008-15 | 50.4 | 1100.2
10:39:28:febtest:INFO: 17-06 | XA-000-09-004-009-009-010-02 | 37.7 | 1153.7
10:39:28:febtest:INFO: 24-07 | XA-000-09-004-009-009-008-02 | 34.6 | 1165.6
10:39:29:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:39:31:ST3_smx:INFO: chip: 23-0 37.726682 C 1177.390875 mV
10:39:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:31:ST3_smx:INFO: Electrons
10:39:36:ST3_smx:INFO: Total # of broken channels: 5
10:39:36:ST3_smx:INFO: List of broken channels: [28, 41, 49, 52, 99]
10:39:36:ST3_smx:INFO: Total # of broken channels: 0
10:39:36:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:39:38:ST3_smx:INFO: chip: 30-1 37.726682 C 1159.654860 mV
10:39:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:38:ST3_smx:INFO: Electrons
10:39:43:ST3_smx:INFO: Total # of broken channels: 4
10:39:43:ST3_smx:INFO: List of broken channels: [96, 109, 125, 127]
10:39:43:ST3_smx:INFO: Total # of broken channels: 0
10:39:43:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:39:44:ST3_smx:INFO: chip: 21-2 44.073563 C 1147.806000 mV
10:39:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:44:ST3_smx:INFO: Electrons
10:39:49:ST3_smx:INFO: Total # of broken channels: 7
10:39:49:ST3_smx:INFO: List of broken channels: [31, 43, 51, 73, 91, 94, 108]
10:39:49:ST3_smx:INFO: Total # of broken channels: 0
10:39:49:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:39:51:ST3_smx:INFO: chip: 28-3 44.073563 C 1141.874115 mV
10:39:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:51:ST3_smx:INFO: Electrons
10:39:56:ST3_smx:INFO: Total # of broken channels: 7
10:39:56:ST3_smx:INFO: List of broken channels: [11, 23, 45, 57, 68, 81, 103]
10:39:56:ST3_smx:INFO: Total # of broken channels: 0
10:39:56:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:39:57:ST3_smx:INFO: chip: 19-4 25.062742 C 1206.851500 mV
10:39:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:57:ST3_smx:INFO: Electrons
10:40:02:ST3_smx:INFO: Total # of broken channels: 4
10:40:02:ST3_smx:INFO: List of broken channels: [48, 67, 96, 116]
10:40:02:ST3_smx:INFO: Total # of broken channels: 0
10:40:02:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:40:04:ST3_smx:INFO: chip: 26-5 50.430383 C 1118.096875 mV
10:40:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:40:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:40:04:ST3_smx:INFO: Electrons
10:40:09:ST3_smx:INFO: Total # of broken channels: 5
10:40:09:ST3_smx:INFO: List of broken channels: [27, 44, 50, 113, 124]
10:40:09:ST3_smx:INFO: Total # of broken channels: 0
10:40:09:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:40:11:ST3_smx:INFO: chip: 17-6 40.898880 C 1171.483840 mV
10:40:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:40:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:40:11:ST3_smx:INFO: Electrons
10:40:15:ST3_smx:INFO: Total # of broken channels: 7
10:40:15:ST3_smx:INFO: List of broken channels: [34, 42, 53, 66, 68, 89, 103]
10:40:15:ST3_smx:INFO: Total # of broken channels: 0
10:40:15:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:40:17:ST3_smx:INFO: chip: 24-7 34.556970 C 1183.292940 mV
10:40:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:40:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:40:17:ST3_smx:INFO: Electrons
10:40:22:ST3_smx:INFO: Total # of broken channels: 8
10:40:22:ST3_smx:INFO: List of broken channels: [7, 15, 22, 60, 64, 75, 78, 116]
10:40:22:ST3_smx:INFO: Total # of broken channels: 0
10:40:22:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:40:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:40:22:febtest:INFO: 23-00 | XA-000-09-004-009-009-012-02 | 37.7 | 1201.0
10:40:23:febtest:INFO: 30-01 | XA-000-09-004-009-007-017-12 | 37.7 | 1183.3
10:40:23:febtest:INFO: 21-02 | XA-000-09-004-009-008-009-15 | 44.1 | 1171.5
10:40:23:febtest:INFO: 28-03 | XA-000-09-004-009-007-008-11 | 47.3 | 1165.6
10:40:23:febtest:INFO: 19-04 | XA-000-09-004-009-009-009-02 | 28.2 | 1224.5
10:40:23:febtest:INFO: 26-05 | XA-000-09-004-009-008-008-15 | 50.4 | 1135.9
10:40:24:febtest:INFO: 17-06 | XA-000-09-004-009-009-010-02 | 40.9 | 1189.2
10:40:24:febtest:INFO: 24-07 | XA-000-09-004-009-009-008-02 | 34.6 | 1201.0
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_06-10_39_00
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2431| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5410', '1.848', '2.4290']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0290', '1.850', '2.5480']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9960', '1.850', '0.5309']