
FEB_2432 10.06.25 14:26:12
TextEdit.txt
14:26:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:26:12:ST3_Shared:INFO: FEB-Microcable 14:26:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:26:12:febtest:INFO: Testing FEB with SN 2432 ==============================================OOO============================================== 14:26:13:smx_tester:INFO: Scanning setup 14:26:13:elinks:INFO: Disabling clock on downlink 0 14:26:13:elinks:INFO: Disabling clock on downlink 1 14:26:13:elinks:INFO: Disabling clock on downlink 2 14:26:13:elinks:INFO: Disabling clock on downlink 3 14:26:13:elinks:INFO: Disabling clock on downlink 4 14:26:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:26:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:26:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:26:13:elinks:INFO: Disabling clock on downlink 0 14:26:13:elinks:INFO: Disabling clock on downlink 1 14:26:13:elinks:INFO: Disabling clock on downlink 2 14:26:13:elinks:INFO: Disabling clock on downlink 3 14:26:13:elinks:INFO: Disabling clock on downlink 4 14:26:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:26:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:26:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:26:13:elinks:INFO: Disabling clock on downlink 0 14:26:14:elinks:INFO: Disabling clock on downlink 1 14:26:14:elinks:INFO: Disabling clock on downlink 2 14:26:14:elinks:INFO: Disabling clock on downlink 3 14:26:14:elinks:INFO: Disabling clock on downlink 4 14:26:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:26:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:26:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:26:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:26:14:elinks:INFO: Disabling clock on downlink 0 14:26:14:elinks:INFO: Disabling clock on downlink 1 14:26:14:elinks:INFO: Disabling clock on downlink 2 14:26:14:elinks:INFO: Disabling clock on downlink 3 14:26:14:elinks:INFO: Disabling clock on downlink 4 14:26:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:26:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:26:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:26:14:elinks:INFO: Disabling clock on downlink 0 14:26:14:elinks:INFO: Disabling clock on downlink 1 14:26:14:elinks:INFO: Disabling clock on downlink 2 14:26:14:elinks:INFO: Disabling clock on downlink 3 14:26:14:elinks:INFO: Disabling clock on downlink 4 14:26:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:26:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:26:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 14:26:14:setup_element:INFO: Scanning clock phase 14:26:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:26:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:26:14:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:26:14:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:26:14:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:26:14:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:26:14:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:26:14:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:26:14:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:26:14:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:26:14:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:26:14:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:26:14:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:26:14:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 14:26:14:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 14:26:14:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:26:14:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:26:14:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:26:14:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:26:14:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 ==============================================OOO============================================== 14:26:14:setup_element:INFO: Scanning data phases 14:26:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:26:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:26:20:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:26:20:setup_element:INFO: Eye window for uplink 16: ____XXXX________________________________ Data delay found: 25 14:26:20:setup_element:INFO: Eye window for uplink 17: __XXXXX_________________________________ Data delay found: 24 14:26:20:setup_element:INFO: Eye window for uplink 18: __XXXXXX________________________________ Data delay found: 24 14:26:20:setup_element:INFO: Eye window for uplink 19: ___XXXXX________________________________ Data delay found: 25 14:26:20:setup_element:INFO: Eye window for uplink 20: ____XXXXXX______________________________ Data delay found: 26 14:26:20:setup_element:INFO: Eye window for uplink 21: _____XXXXXX_____________________________ Data delay found: 27 14:26:20:setup_element:INFO: Eye window for uplink 22: __XXXXXX________________________________ Data delay found: 24 14:26:20:setup_element:INFO: Eye window for uplink 23: _XXXXX__________________________________ Data delay found: 23 14:26:20:setup_element:INFO: Eye window for uplink 24: _____________XXXXX______________________ Data delay found: 35 14:26:20:setup_element:INFO: Eye window for uplink 25: _______________XXXX_____________________ Data delay found: 36 14:26:20:setup_element:INFO: Eye window for uplink 26: ______________XXXXXXX___________________ Data delay found: 37 14:26:20:setup_element:INFO: Eye window for uplink 27: ________________XXXXXXX_________________ Data delay found: 39 14:26:20:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXXX______________ Data delay found: 2 14:26:20:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXXX______________ Data delay found: 2 14:26:20:setup_element:INFO: Eye window for uplink 30: ______________________XXXXXX____________ Data delay found: 4 14:26:20:setup_element:INFO: Eye window for uplink 31: ____________________XXXXXXX_____________ Data delay found: 3 14:26:20:setup_element:INFO: Setting the data phase to 25 for uplink 16 14:26:20:setup_element:INFO: Setting the data phase to 24 for uplink 17 14:26:20:setup_element:INFO: Setting the data phase to 24 for uplink 18 14:26:20:setup_element:INFO: Setting the data phase to 25 for uplink 19 14:26:20:setup_element:INFO: Setting the data phase to 26 for uplink 20 14:26:20:setup_element:INFO: Setting the data phase to 27 for uplink 21 14:26:20:setup_element:INFO: Setting the data phase to 24 for uplink 22 14:26:20:setup_element:INFO: Setting the data phase to 23 for uplink 23 14:26:20:setup_element:INFO: Setting the data phase to 35 for uplink 24 14:26:20:setup_element:INFO: Setting the data phase to 36 for uplink 25 14:26:20:setup_element:INFO: Setting the data phase to 37 for uplink 26 14:26:20:setup_element:INFO: Setting the data phase to 39 for uplink 27 14:26:20:setup_element:INFO: Setting the data phase to 2 for uplink 28 14:26:20:setup_element:INFO: Setting the data phase to 2 for uplink 29 14:26:20:setup_element:INFO: Setting the data phase to 4 for uplink 30 14:26:20:setup_element:INFO: Setting the data phase to 3 for uplink 31 ==============================================OOO============================================== 14:26:20:setup_element:INFO: Beginning SMX ASICs map scan 14:26:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:26:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:26:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:26:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:26:20:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 14:26:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 14:26:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 14:26:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:26:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:26:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 14:26:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 14:26:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:26:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:26:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 14:26:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 14:26:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:26:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:26:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 14:26:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 14:26:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:26:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:26:23:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 16: _______________________________________________________________________XXXXXXXX_ Uplink 17: _______________________________________________________________________XXXXXXXX_ Uplink 18: ______________________________________________________________________XXXXXXXX__ Uplink 19: ______________________________________________________________________XXXXXXXX__ Uplink 20: _______________________________________________________________________XXXXXXXX_ Uplink 21: _______________________________________________________________________XXXXXXXX_ Uplink 22: ______________________________________________________________________XXXXXXXX__ Uplink 23: ______________________________________________________________________XXXXXXXX__ Uplink 24: _____________________________________________________________________XXXXXXXX___ Uplink 25: _____________________________________________________________________XXXXXXXX___ Uplink 26: _____________________________________________________________________XXXXXXXXX__ Uplink 27: _____________________________________________________________________XXXXXXXXX__ Uplink 28: ______________________________________________________________________XXXXXXXX__ Uplink 29: ______________________________________________________________________XXXXXXXX__ Uplink 30: _______________________________________________________________________XXXXXXXX_ Uplink 31: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 25 Window Length: 36 Eye Window: ____XXXX________________________________ Uplink 17: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 18: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 19: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 20: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 21: Optimal Phase: 27 Window Length: 34 Eye Window: _____XXXXXX_____________________________ Uplink 22: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 23: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 24: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 25: Optimal Phase: 36 Window Length: 36 Eye Window: _______________XXXX_____________________ Uplink 26: Optimal Phase: 37 Window Length: 33 Eye Window: ______________XXXXXXX___________________ Uplink 27: Optimal Phase: 39 Window Length: 33 Eye Window: ________________XXXXXXX_________________ Uplink 28: Optimal Phase: 2 Window Length: 33 Eye Window: ___________________XXXXXXX______________ Uplink 29: Optimal Phase: 2 Window Length: 33 Eye Window: ___________________XXXXXXX______________ Uplink 30: Optimal Phase: 4 Window Length: 34 Eye Window: ______________________XXXXXX____________ Uplink 31: Optimal Phase: 3 Window Length: 33 Eye Window: ____________________XXXXXXX_____________ ==============================================OOO============================================== 14:26:23:setup_element:INFO: Performing Elink synchronization 14:26:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:26:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:26:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:26:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 14:26:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:26:23:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 14:26:23:ST3_emu_feb:DEBUG: Chip address: 0x0 14:26:23:ST3_emu_feb:DEBUG: Chip address: 0x1 14:26:23:ST3_emu_feb:DEBUG: Chip address: 0x2 14:26:23:ST3_emu_feb:DEBUG: Chip address: 0x3 14:26:23:ST3_emu_feb:DEBUG: Chip address: 0x4 14:26:23:ST3_emu_feb:DEBUG: Chip address: 0x5 14:26:23:ST3_emu_feb:DEBUG: Chip address: 0x6 14:26:24:ST3_emu_feb:DEBUG: Chip address: 0x7 14:26:24:febtest:INFO: Init all SMX (CSA): 30 14:26:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:26:38:febtest:INFO: 23-00 | XA-000-09-004-015-009-023-07 | 37.7 | 1153.7 14:26:39:febtest:INFO: 30-01 | XA-000-09-004-015-012-022-12 | 31.4 | 1165.6 14:26:39:febtest:INFO: 21-02 | XA-000-09-004-015-003-022-08 | 47.3 | 1130.0 14:26:39:febtest:INFO: 28-03 | XA-000-09-004-015-012-023-12 | 31.4 | 1159.7 14:26:39:febtest:INFO: 19-04 | XA-000-09-004-015-006-022-03 | 47.3 | 1130.0 14:26:39:febtest:INFO: 26-05 | XA-000-09-004-015-003-021-08 | 44.1 | 1130.0 14:26:40:febtest:INFO: 17-06 | XA-000-09-004-015-006-023-03 | 44.1 | 1141.9 14:26:40:febtest:INFO: 24-07 | XA-000-09-004-015-009-022-07 | 44.1 | 1130.0 14:26:41:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 14:26:43:ST3_smx:INFO: chip: 23-0 37.726682 C 1165.571835 mV 14:26:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:26:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:26:43:ST3_smx:INFO: Electrons 14:26:48:ST3_smx:INFO: Total # of broken channels: 8 14:26:48:ST3_smx:INFO: List of broken channels: [0, 32, 51, 104, 108, 110, 114, 123] 14:26:48:ST3_smx:INFO: Total # of broken channels: 0 14:26:48:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:26:50:ST3_smx:INFO: chip: 30-1 31.389742 C 1177.390875 mV 14:26:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:26:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:26:50:ST3_smx:INFO: Electrons 14:26:54:ST3_smx:INFO: Total # of broken channels: 6 14:26:54:ST3_smx:INFO: List of broken channels: [8, 60, 65, 80, 106, 112] 14:26:54:ST3_smx:INFO: Total # of broken channels: 0 14:26:54:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:26:56:ST3_smx:INFO: chip: 21-2 47.250730 C 1147.806000 mV 14:26:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:26:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:26:56:ST3_smx:INFO: Electrons 14:27:01:ST3_smx:INFO: Total # of broken channels: 7 14:27:01:ST3_smx:INFO: List of broken channels: [10, 18, 25, 26, 45, 51, 118] 14:27:01:ST3_smx:INFO: Total # of broken channels: 1 14:27:01:ST3_smx:INFO: List of broken channels: [38] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:27:03:ST3_smx:INFO: chip: 28-3 31.389742 C 1177.390875 mV 14:27:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:27:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:27:03:ST3_smx:INFO: Electrons 14:27:08:ST3_smx:INFO: Total # of broken channels: 4 14:27:08:ST3_smx:INFO: List of broken channels: [54, 63, 79, 91] 14:27:08:ST3_smx:INFO: Total # of broken channels: 2 14:27:08:ST3_smx:INFO: List of broken channels: [58, 90] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:27:09:ST3_smx:INFO: chip: 19-4 50.430383 C 1135.937260 mV 14:27:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:27:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:27:09:ST3_smx:INFO: Electrons 14:27:14:ST3_smx:INFO: Total # of broken channels: 9 14:27:14:ST3_smx:INFO: List of broken channels: [0, 2, 6, 11, 28, 46, 62, 118, 120] 14:27:14:ST3_smx:INFO: Total # of broken channels: 0 14:27:14:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:27:16:ST3_smx:INFO: chip: 26-5 31.389742 C 1177.390875 mV 14:27:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:27:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:27:16:ST3_smx:INFO: Electrons 14:27:21:ST3_smx:INFO: Total # of broken channels: 4 14:27:21:ST3_smx:INFO: List of broken channels: [0, 65, 108, 110] 14:27:21:ST3_smx:INFO: Total # of broken channels: 1 14:27:21:ST3_smx:INFO: List of broken channels: [84] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:27:22:ST3_smx:INFO: chip: 17-6 44.073563 C 1153.732915 mV 14:27:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:27:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:27:22:ST3_smx:INFO: Electrons 14:27:27:ST3_smx:INFO: Total # of broken channels: 5 14:27:27:ST3_smx:INFO: List of broken channels: [28, 38, 66, 106, 125] 14:27:27:ST3_smx:INFO: Total # of broken channels: 1 14:27:27:ST3_smx:INFO: List of broken channels: [66] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:27:29:ST3_smx:INFO: chip: 24-7 44.073563 C 1141.874115 mV 14:27:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:27:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:27:29:ST3_smx:INFO: Electrons 14:27:34:ST3_smx:INFO: Total # of broken channels: 7 14:27:34:ST3_smx:INFO: List of broken channels: [7, 65, 69, 81, 96, 106, 115] 14:27:34:ST3_smx:INFO: Total # of broken channels: 0 14:27:34:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:27:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:27:34:febtest:INFO: 23-00 | XA-000-09-004-015-009-023-07 | 34.6 | 1189.2 14:27:35:febtest:INFO: 30-01 | XA-000-09-004-015-012-022-12 | 31.4 | 1212.7 14:27:35:febtest:INFO: 21-02 | XA-000-09-004-015-003-022-08 | 44.1 | 1189.2 14:27:35:febtest:INFO: 28-03 | XA-000-09-004-015-012-023-12 | 28.2 | 1212.7 14:27:35:febtest:INFO: 19-04 | XA-000-09-004-015-006-022-03 | 44.1 | 1177.4 14:27:35:febtest:INFO: 26-05 | XA-000-09-004-015-003-021-08 | 40.9 | 1177.4 14:27:36:febtest:INFO: 17-06 | XA-000-09-004-015-006-023-03 | 40.9 | 1201.0 14:27:36:febtest:INFO: 24-07 | XA-000-09-004-015-009-022-07 | 37.7 | 1177.4 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_06_10-14_26_12 OPERATOR : Alois Alzheimer SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2432| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4400', '1.848', '2.3820'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0260', '1.850', '2.5910'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9400', '1.850', '0.5295'] 14:27:37:ST3_Shared:INFO: Listo of operators:Robert V.;