FEB_2437    28.07.25 12:34:06

TextEdit.txt
            12:34:06:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:34:06:ST3_Shared:INFO:	                       FEB-Microcable                       
12:34:06:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:34:06:febtest:INFO:	Testing FEB with SN 2437
==============================================OOO==============================================
12:34:07:smx_tester:INFO:	Scanning setup
12:34:07:elinks:INFO:	Disabling clock on downlink 0
12:34:07:elinks:INFO:	Disabling clock on downlink 1
12:34:07:elinks:INFO:	Disabling clock on downlink 2
12:34:07:elinks:INFO:	Disabling clock on downlink 3
12:34:07:elinks:INFO:	Disabling clock on downlink 4
12:34:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:34:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:34:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:34:07:elinks:INFO:	Disabling clock on downlink 0
12:34:07:elinks:INFO:	Disabling clock on downlink 1
12:34:07:elinks:INFO:	Disabling clock on downlink 2
12:34:07:elinks:INFO:	Disabling clock on downlink 3
12:34:07:elinks:INFO:	Disabling clock on downlink 4
12:34:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:34:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:34:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:34:07:elinks:INFO:	Disabling clock on downlink 0
12:34:07:elinks:INFO:	Disabling clock on downlink 1
12:34:07:elinks:INFO:	Disabling clock on downlink 2
12:34:07:elinks:INFO:	Disabling clock on downlink 3
12:34:07:elinks:INFO:	Disabling clock on downlink 4
12:34:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:34:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:34:08:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:34:08:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:34:08:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:34:08:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:34:08:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:34:08:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:34:08:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:34:08:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:34:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:34:08:elinks:INFO:	Disabling clock on downlink 0
12:34:08:elinks:INFO:	Disabling clock on downlink 1
12:34:08:elinks:INFO:	Disabling clock on downlink 2
12:34:08:elinks:INFO:	Disabling clock on downlink 3
12:34:08:elinks:INFO:	Disabling clock on downlink 4
12:34:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:34:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:34:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:34:08:elinks:INFO:	Disabling clock on downlink 0
12:34:08:elinks:INFO:	Disabling clock on downlink 1
12:34:08:elinks:INFO:	Disabling clock on downlink 2
12:34:08:elinks:INFO:	Disabling clock on downlink 3
12:34:08:elinks:INFO:	Disabling clock on downlink 4
12:34:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:34:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:34:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
12:34:08:setup_element:INFO:	Scanning clock phase
12:34:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:34:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:34:08:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:34:08:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
12:34:08:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
12:34:08:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:34:08:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:34:08:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:34:08:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:34:08:setup_element:INFO:	Eye window for uplink 30: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
12:34:08:setup_element:INFO:	Eye window for uplink 31: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
12:34:08:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
12:34:08:setup_element:INFO:	Scanning data phases
12:34:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:34:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:34:14:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:34:14:setup_element:INFO:	Eye window for uplink 24: ______________XXXXX_____________________
Data delay found: 36
12:34:14:setup_element:INFO:	Eye window for uplink 25: _______________XXXXXX___________________
Data delay found: 37
12:34:14:setup_element:INFO:	Eye window for uplink 26: _________________XXXXXX_________________
Data delay found: 39
12:34:14:setup_element:INFO:	Eye window for uplink 27: __________________XXXXXXX_______________
Data delay found: 1
12:34:14:setup_element:INFO:	Eye window for uplink 28: _____________________XXXXX______________
Data delay found: 3
12:34:14:setup_element:INFO:	Eye window for uplink 29: _____________________XXXXX______________
Data delay found: 3
12:34:14:setup_element:INFO:	Eye window for uplink 30: ______________________XXXXX_____________
Data delay found: 4
12:34:14:setup_element:INFO:	Eye window for uplink 31: ___________________XXXXXX_______________
Data delay found: 1
12:34:14:setup_element:INFO:	Setting the data phase to 36 for uplink 24
12:34:14:setup_element:INFO:	Setting the data phase to 37 for uplink 25
12:34:14:setup_element:INFO:	Setting the data phase to 39 for uplink 26
12:34:14:setup_element:INFO:	Setting the data phase to 1 for uplink 27
12:34:14:setup_element:INFO:	Setting the data phase to 3 for uplink 28
12:34:14:setup_element:INFO:	Setting the data phase to 3 for uplink 29
12:34:14:setup_element:INFO:	Setting the data phase to 4 for uplink 30
12:34:14:setup_element:INFO:	Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
12:34:14:setup_element:INFO:	Beginning SMX ASICs map scan
12:34:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:34:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:34:14:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:34:14:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:34:14:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
12:34:14:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:34:14:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:34:14:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:34:14:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:34:15:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:34:15:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:34:15:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:34:15:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:34:17:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 71
    Eye Windows:
      Uplink 24: ____________________________________________________________________XXXXXXXXX___
      Uplink 25: ____________________________________________________________________XXXXXXXXX___
      Uplink 26: ____________________________________________________________________XXXXXXXX____
      Uplink 27: ____________________________________________________________________XXXXXXXX____
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: ____________________________________________________________________XXXXXXXXX___
      Uplink 31: ____________________________________________________________________XXXXXXXXX___
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 25:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 26:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________
    Uplink 27:
      Optimal Phase: 1
      Window Length: 33
      Eye Window: __________________XXXXXXX_______________
    Uplink 28:
      Optimal Phase: 3
      Window Length: 35
      Eye Window: _____________________XXXXX______________
    Uplink 29:
      Optimal Phase: 3
      Window Length: 35
      Eye Window: _____________________XXXXX______________
    Uplink 30:
      Optimal Phase: 4
      Window Length: 35
      Eye Window: ______________________XXXXX_____________
    Uplink 31:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________

==============================================OOO==============================================
12:34:17:setup_element:INFO:	Performing Elink synchronization
12:34:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:34:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:34:17:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:34:17:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
12:34:17:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:34:17:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
12:34:17:ST3_emu_feb:DEBUG:	Chip address:  	0x1
12:34:17:ST3_emu_feb:DEBUG:	Chip address:  	0x3
12:34:17:ST3_emu_feb:DEBUG:	Chip address:  	0x5
12:34:17:ST3_emu_feb:DEBUG:	Chip address:  	0x7
12:34:17:febtest:INFO:	Init all SMX (CSA): 30
12:34:24:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:34:24:febtest:INFO:	30-01 | XA-000-09-004-025-014-007-05 |  12.4 | 1201.0
12:34:25:febtest:INFO:	28-03 | XA-000-09-004-025-014-005-05 |  15.6 | 1189.2
12:34:25:febtest:INFO:	26-05 | XA-000-09-004-025-011-005-14 |  28.2 | 1147.8
12:34:25:febtest:INFO:	24-07 | XA-000-09-004-025-011-007-14 |  18.7 | 1171.5
12:34:26:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:34:28:ST3_smx:INFO:	chip: 30-1 	 12.438562 C 	 1212.728715 mV
12:34:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:34:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:34:28:ST3_smx:INFO:		Electrons
12:34:33:ST3_smx:INFO:	Total # of broken channels: 9
12:34:33:ST3_smx:INFO:	List of broken channels: [0, 11, 24, 49, 52, 55, 72, 96, 105]
12:34:33:ST3_smx:INFO:	Total # of broken channels: 0
12:34:33:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:34:35:ST3_smx:INFO:	chip: 28-3 	 15.590880 C 	 1200.969315 mV
12:34:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:34:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:34:35:ST3_smx:INFO:		Electrons
12:34:39:ST3_smx:INFO:	Total # of broken channels: 7
12:34:39:ST3_smx:INFO:	List of broken channels: [2, 11, 27, 41, 69, 88, 99]
12:34:39:ST3_smx:INFO:	Total # of broken channels: 0
12:34:39:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:34:41:ST3_smx:INFO:	chip: 26-5 	 25.062742 C 	 1153.732915 mV
12:34:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:34:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:34:41:ST3_smx:INFO:		Electrons
12:34:46:ST3_smx:INFO:	Total # of broken channels: 7
12:34:46:ST3_smx:INFO:	List of broken channels: [14, 18, 27, 54, 77, 110, 122]
12:34:46:ST3_smx:INFO:	Total # of broken channels: 0
12:34:46:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:34:48:ST3_smx:INFO:	chip: 24-7 	 21.902970 C 	 1177.390875 mV
12:34:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:34:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:34:48:ST3_smx:INFO:		Electrons
12:34:53:ST3_smx:INFO:	Total # of broken channels: 6
12:34:53:ST3_smx:INFO:	List of broken channels: [8, 48, 56, 87, 101, 126]
12:34:53:ST3_smx:INFO:	Total # of broken channels: 0
12:34:53:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:34:53:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:34:53:febtest:INFO:	30-01 | XA-000-09-004-025-014-007-05 |  12.4 | 1236.2
12:34:53:febtest:INFO:	28-03 | XA-000-09-004-025-014-005-05 |  15.6 | 1218.6
12:34:54:febtest:INFO:	26-05 | XA-000-09-004-025-011-005-14 |  28.2 | 1177.4
12:34:54:febtest:INFO:	24-07 | XA-000-09-004-025-011-007-14 |  21.9 | 1201.0
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_28-12_34_06
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2437| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9142', '1.848', '1.1080']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0290', '1.850', '1.2230']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0030', '1.850', '0.2693']