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FEB_2437 28.07.25 15:03:52
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15:03:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:03:52:ST3_Shared:INFO: FEB-Microcable
15:03:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:03:52:febtest:INFO: Testing FEB with SN 2437
==============================================OOO==============================================
15:03:54:smx_tester:INFO: Scanning setup
15:03:54:elinks:INFO: Disabling clock on downlink 0
15:03:54:elinks:INFO: Disabling clock on downlink 1
15:03:54:elinks:INFO: Disabling clock on downlink 2
15:03:54:elinks:INFO: Disabling clock on downlink 3
15:03:54:elinks:INFO: Disabling clock on downlink 4
15:03:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:03:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:03:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:03:54:elinks:INFO: Disabling clock on downlink 0
15:03:54:elinks:INFO: Disabling clock on downlink 1
15:03:54:elinks:INFO: Disabling clock on downlink 2
15:03:54:elinks:INFO: Disabling clock on downlink 3
15:03:54:elinks:INFO: Disabling clock on downlink 4
15:03:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:03:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:03:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:03:54:elinks:INFO: Disabling clock on downlink 0
15:03:54:elinks:INFO: Disabling clock on downlink 1
15:03:54:elinks:INFO: Disabling clock on downlink 2
15:03:54:elinks:INFO: Disabling clock on downlink 3
15:03:54:elinks:INFO: Disabling clock on downlink 4
15:03:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:03:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:03:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:03:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:03:55:elinks:INFO: Disabling clock on downlink 0
15:03:55:elinks:INFO: Disabling clock on downlink 1
15:03:55:elinks:INFO: Disabling clock on downlink 2
15:03:55:elinks:INFO: Disabling clock on downlink 3
15:03:55:elinks:INFO: Disabling clock on downlink 4
15:03:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:03:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:03:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:03:55:elinks:INFO: Disabling clock on downlink 0
15:03:55:elinks:INFO: Disabling clock on downlink 1
15:03:55:elinks:INFO: Disabling clock on downlink 2
15:03:55:elinks:INFO: Disabling clock on downlink 3
15:03:55:elinks:INFO: Disabling clock on downlink 4
15:03:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:03:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:03:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
15:03:55:setup_element:INFO: Scanning clock phase
15:03:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:03:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:03:55:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:03:55:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:03:55:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:03:55:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXXX_
Clock Delay: 33
15:03:55:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXXX_
Clock Delay: 33
15:03:55:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:03:55:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:03:55:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
15:03:55:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
15:03:55:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:03:55:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:03:55:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:03:55:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:03:55:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
15:03:55:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
15:03:55:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
15:03:55:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
15:03:55:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
15:03:55:setup_element:INFO: Scanning data phases
15:03:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:03:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:04:01:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:04:01:setup_element:INFO: Eye window for uplink 16: XXXXX__________________________________X
Data delay found: 21
15:04:01:setup_element:INFO: Eye window for uplink 17: XXXX_________________________________XXX
Data delay found: 20
15:04:01:setup_element:INFO: Eye window for uplink 18: _XXXXXX_________________________________
Data delay found: 23
15:04:01:setup_element:INFO: Eye window for uplink 19: __XXXXX_________________________________
Data delay found: 24
15:04:01:setup_element:INFO: Eye window for uplink 20: _XXXXX__________________________________
Data delay found: 23
15:04:01:setup_element:INFO: Eye window for uplink 21: __XXXXXX________________________________
Data delay found: 24
15:04:01:setup_element:INFO: Eye window for uplink 22: XXXX__________________________________XX
Data delay found: 20
15:04:01:setup_element:INFO: Eye window for uplink 23: XX___________________________________XXX
Data delay found: 19
15:04:01:setup_element:INFO: Eye window for uplink 24: ___________XXXXXX_______________________
Data delay found: 33
15:04:01:setup_element:INFO: Eye window for uplink 25: _____________XXXXX______________________
Data delay found: 35
15:04:01:setup_element:INFO: Eye window for uplink 26: _______________XXXXXX___________________
Data delay found: 37
15:04:01:setup_element:INFO: Eye window for uplink 27: _________________XXXXXX_________________
Data delay found: 39
15:04:01:setup_element:INFO: Eye window for uplink 28: ____________________XXXXX_______________
Data delay found: 2
15:04:01:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________
Data delay found: 1
15:04:01:setup_element:INFO: Eye window for uplink 30: _____________________XXXXXX_____________
Data delay found: 3
15:04:01:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXX_______________
Data delay found: 1
15:04:01:setup_element:INFO: Setting the data phase to 21 for uplink 16
15:04:01:setup_element:INFO: Setting the data phase to 20 for uplink 17
15:04:01:setup_element:INFO: Setting the data phase to 23 for uplink 18
15:04:01:setup_element:INFO: Setting the data phase to 24 for uplink 19
15:04:01:setup_element:INFO: Setting the data phase to 23 for uplink 20
15:04:01:setup_element:INFO: Setting the data phase to 24 for uplink 21
15:04:01:setup_element:INFO: Setting the data phase to 20 for uplink 22
15:04:01:setup_element:INFO: Setting the data phase to 19 for uplink 23
15:04:01:setup_element:INFO: Setting the data phase to 33 for uplink 24
15:04:01:setup_element:INFO: Setting the data phase to 35 for uplink 25
15:04:01:setup_element:INFO: Setting the data phase to 37 for uplink 26
15:04:01:setup_element:INFO: Setting the data phase to 39 for uplink 27
15:04:01:setup_element:INFO: Setting the data phase to 2 for uplink 28
15:04:01:setup_element:INFO: Setting the data phase to 1 for uplink 29
15:04:01:setup_element:INFO: Setting the data phase to 3 for uplink 30
15:04:01:setup_element:INFO: Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
15:04:01:setup_element:INFO: Beginning SMX ASICs map scan
15:04:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:04:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:04:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:04:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:04:01:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:04:01:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:04:01:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:04:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:04:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:04:01:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:04:01:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:04:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:04:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:04:02:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:04:02:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:04:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:04:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:04:02:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:04:02:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:04:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:04:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:04:04:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXXX__
Uplink 17: _____________________________________________________________________XXXXXXXXX__
Uplink 18: _____________________________________________________________________XXXXXXXXXX_
Uplink 19: _____________________________________________________________________XXXXXXXXXX_
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: _____________________________________________________________________XXXXXXXXX__
Uplink 27: _____________________________________________________________________XXXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXXXX_
Uplink 29: ______________________________________________________________________XXXXXXXXX_
Uplink 30: ______________________________________________________________________XXXXXXXXX_
Uplink 31: ______________________________________________________________________XXXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 17:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 18:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 19:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 20:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 21:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 22:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 23:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 24:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 25:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 26:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 27:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 28:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 29:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 30:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 31:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
==============================================OOO==============================================
15:04:04:setup_element:INFO: Performing Elink synchronization
15:04:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:04:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:04:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:04:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
15:04:04:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:04:04:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:04:04:ST3_emu_feb:DEBUG: Chip address: 0x0
15:04:04:ST3_emu_feb:DEBUG: Chip address: 0x1
15:04:04:ST3_emu_feb:DEBUG: Chip address: 0x2
15:04:04:ST3_emu_feb:DEBUG: Chip address: 0x3
15:04:04:ST3_emu_feb:DEBUG: Chip address: 0x4
15:04:04:ST3_emu_feb:DEBUG: Chip address: 0x5
15:04:04:ST3_emu_feb:DEBUG: Chip address: 0x6
15:04:04:ST3_emu_feb:DEBUG: Chip address: 0x7
15:04:04:febtest:INFO: Init all SMX (CSA): 30
15:04:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:04:18:febtest:INFO: 23-00 | XA-000-09-004-025-011-006-14 | 28.2 | 1206.9
15:04:18:febtest:INFO: 30-01 | XA-000-09-004-025-014-007-05 | 31.4 | 1183.3
15:04:19:febtest:INFO: 21-02 | XA-000-09-004-025-008-007-00 | 53.6 | 1112.1
15:04:19:febtest:INFO: 28-03 | XA-000-09-004-025-014-005-05 | 31.4 | 1183.3
15:04:19:febtest:INFO: 19-04 | XA-000-09-004-025-008-005-00 | 47.3 | 1124.0
15:04:19:febtest:INFO: 26-05 | XA-000-09-004-025-011-005-14 | 44.1 | 1135.9
15:04:20:febtest:INFO: 17-06 | XA-000-09-004-025-014-006-05 | 31.4 | 1177.4
15:04:20:febtest:INFO: 24-07 | XA-000-09-004-025-011-007-14 | 34.6 | 1159.7
15:04:21:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:04:23:ST3_smx:INFO: chip: 23-0 28.225000 C 1218.600960 mV
15:04:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:23:ST3_smx:INFO: Electrons
15:04:27:ST3_smx:INFO: Total # of broken channels: 8
15:04:27:ST3_smx:INFO: List of broken channels: [28, 36, 38, 45, 48, 54, 69, 109]
15:04:27:ST3_smx:INFO: Total # of broken channels: 1
15:04:27:ST3_smx:INFO: List of broken channels: [33]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
15:04:29:ST3_smx:INFO: chip: 30-1 34.556970 C 1195.082160 mV
15:04:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:29:ST3_smx:INFO: Electrons
15:04:34:ST3_smx:INFO: Total # of broken channels: 8
15:04:34:ST3_smx:INFO: List of broken channels: [33, 34, 45, 50, 57, 60, 61, 101]
15:04:34:ST3_smx:INFO: Total # of broken channels: 0
15:04:34:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
15:04:36:ST3_smx:INFO: chip: 21-2 53.612520 C 1124.048640 mV
15:04:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:36:ST3_smx:INFO: Electrons
15:04:40:ST3_smx:INFO: Total # of broken channels: 6
15:04:40:ST3_smx:INFO: List of broken channels: [5, 13, 54, 62, 97, 102]
15:04:40:ST3_smx:INFO: Total # of broken channels: 0
15:04:40:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
15:04:42:ST3_smx:INFO: chip: 28-3 34.556970 C 1200.969315 mV
15:04:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:42:ST3_smx:INFO: Electrons
15:04:47:ST3_smx:INFO: Total # of broken channels: 11
15:04:47:ST3_smx:INFO: List of broken channels: [7, 18, 23, 37, 52, 60, 61, 83, 90, 100, 102]
15:04:47:ST3_smx:INFO: Total # of broken channels: 0
15:04:47:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
15:04:48:ST3_smx:INFO: chip: 19-4 50.430383 C 1141.874115 mV
15:04:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:48:ST3_smx:INFO: Electrons
15:04:53:ST3_smx:INFO: Total # of broken channels: 8
15:04:53:ST3_smx:INFO: List of broken channels: [16, 37, 41, 67, 79, 81, 90, 103]
15:04:53:ST3_smx:INFO: Total # of broken channels: 0
15:04:53:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
15:04:55:ST3_smx:INFO: chip: 26-5 44.073563 C 1147.806000 mV
15:04:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:55:ST3_smx:INFO: Electrons
15:04:59:ST3_smx:INFO: Total # of broken channels: 9
15:04:59:ST3_smx:INFO: List of broken channels: [1, 13, 14, 17, 81, 90, 110, 120, 125]
15:04:59:ST3_smx:INFO: Total # of broken channels: 0
15:04:59:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
15:05:01:ST3_smx:INFO: chip: 17-6 34.556970 C 1189.190035 mV
15:05:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:05:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:05:01:ST3_smx:INFO: Electrons
15:05:06:ST3_smx:INFO: Total # of broken channels: 12
15:05:06:ST3_smx:INFO: List of broken channels: [20, 27, 38, 43, 47, 66, 75, 87, 102, 120, 124, 127]
15:05:06:ST3_smx:INFO: Total # of broken channels: 0
15:05:06:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
15:05:08:ST3_smx:INFO: chip: 24-7 34.556970 C 1171.483840 mV
15:05:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:05:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:05:08:ST3_smx:INFO: Electrons
15:05:12:ST3_smx:INFO: Total # of broken channels: 6
15:05:12:ST3_smx:INFO: List of broken channels: [40, 63, 97, 99, 103, 108]
15:05:12:ST3_smx:INFO: Total # of broken channels: 0
15:05:12:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
15:05:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:05:13:febtest:INFO: 23-00 | XA-000-09-004-025-011-006-14 | 31.4 | 1242.0
15:05:13:febtest:INFO: 30-01 | XA-000-09-004-025-014-007-05 | 37.7 | 1218.6
15:05:14:febtest:INFO: 21-02 | XA-000-09-004-025-008-007-00 | 56.8 | 1147.8
15:05:14:febtest:INFO: 28-03 | XA-000-09-004-025-014-005-05 | 34.6 | 1224.5
15:05:14:febtest:INFO: 19-04 | XA-000-09-004-025-008-005-00 | 50.4 | 1159.7
15:05:14:febtest:INFO: 26-05 | XA-000-09-004-025-011-005-14 | 47.3 | 1171.5
15:05:14:febtest:INFO: 17-06 | XA-000-09-004-025-014-006-05 | 34.6 | 1212.7
15:05:15:febtest:INFO: 24-07 | XA-000-09-004-025-011-007-14 | 37.7 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_28-15_03_52
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2437| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.6210', '1.848', '1.9780']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0550', '1.850', '2.6140']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0090', '1.850', '0.5301']