
FEB_2438 25.07.25 14:11:00
TextEdit.txt
14:11:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:11:00:ST3_Shared:INFO: FEB-Microcable 14:11:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:11:01:febtest:INFO: Testing FEB with SN 2438 ==============================================OOO============================================== 14:11:02:smx_tester:INFO: Scanning setup 14:11:02:elinks:INFO: Disabling clock on downlink 0 14:11:02:elinks:INFO: Disabling clock on downlink 1 14:11:02:elinks:INFO: Disabling clock on downlink 2 14:11:02:elinks:INFO: Disabling clock on downlink 3 14:11:02:elinks:INFO: Disabling clock on downlink 4 14:11:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:11:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:11:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:11:02:elinks:INFO: Disabling clock on downlink 0 14:11:02:elinks:INFO: Disabling clock on downlink 1 14:11:02:elinks:INFO: Disabling clock on downlink 2 14:11:02:elinks:INFO: Disabling clock on downlink 3 14:11:02:elinks:INFO: Disabling clock on downlink 4 14:11:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:11:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:11:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:11:02:elinks:INFO: Disabling clock on downlink 0 14:11:02:elinks:INFO: Disabling clock on downlink 1 14:11:02:elinks:INFO: Disabling clock on downlink 2 14:11:02:elinks:INFO: Disabling clock on downlink 3 14:11:02:elinks:INFO: Disabling clock on downlink 4 14:11:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:11:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:11:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:11:03:elinks:INFO: Disabling clock on downlink 0 14:11:03:elinks:INFO: Disabling clock on downlink 1 14:11:03:elinks:INFO: Disabling clock on downlink 2 14:11:03:elinks:INFO: Disabling clock on downlink 3 14:11:03:elinks:INFO: Disabling clock on downlink 4 14:11:03:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:11:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:11:03:elinks:INFO: Disabling clock on downlink 0 14:11:03:elinks:INFO: Disabling clock on downlink 1 14:11:03:elinks:INFO: Disabling clock on downlink 2 14:11:03:elinks:INFO: Disabling clock on downlink 3 14:11:03:elinks:INFO: Disabling clock on downlink 4 14:11:03:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:11:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 14:11:03:setup_element:INFO: Scanning clock phase 14:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:11:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:11:03:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:11:03:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 14:11:03:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 14:11:03:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:11:03:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:11:03:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 14:11:03:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 14:11:03:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:11:03:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:11:03:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:11:03:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:11:03:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 14:11:03:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 14:11:03:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 14:11:03:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 14:11:03:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:11:03:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:11:03:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 ==============================================OOO============================================== 14:11:03:setup_element:INFO: Scanning data phases 14:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:11:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:11:09:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:11:09:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX Data delay found: 20 14:11:09:setup_element:INFO: Eye window for uplink 17: XX__________________________________XXXX Data delay found: 18 14:11:09:setup_element:INFO: Eye window for uplink 18: XXXXX__________________________________X Data delay found: 21 14:11:09:setup_element:INFO: Eye window for uplink 19: _XXXXX_________________________________X Data delay found: 22 14:11:09:setup_element:INFO: Eye window for uplink 20: XXXX___________________________________X Data delay found: 21 14:11:09:setup_element:INFO: Eye window for uplink 21: XXXXXX_________________________________X Data delay found: 22 14:11:09:setup_element:INFO: Eye window for uplink 22: _XXXXX_________________________________X Data delay found: 22 14:11:09:setup_element:INFO: Eye window for uplink 23: XXXX__________________________________XX Data delay found: 20 14:11:09:setup_element:INFO: Eye window for uplink 24: ___________XXXXX________________________ Data delay found: 33 14:11:09:setup_element:INFO: Eye window for uplink 25: ______________XXXX______________________ Data delay found: 35 14:11:09:setup_element:INFO: Eye window for uplink 26: ____________XXXXX_______________________ Data delay found: 34 14:11:09:setup_element:INFO: Eye window for uplink 27: _____________XXXXX______________________ Data delay found: 35 14:11:09:setup_element:INFO: Eye window for uplink 28: ____________________XXXXXX______________ Data delay found: 2 14:11:09:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________ Data delay found: 1 14:11:09:setup_element:INFO: Eye window for uplink 30: _____________________XXXXXXX____________ Data delay found: 4 14:11:09:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXXX______________ Data delay found: 2 14:11:09:setup_element:INFO: Setting the data phase to 20 for uplink 16 14:11:09:setup_element:INFO: Setting the data phase to 18 for uplink 17 14:11:09:setup_element:INFO: Setting the data phase to 21 for uplink 18 14:11:09:setup_element:INFO: Setting the data phase to 22 for uplink 19 14:11:09:setup_element:INFO: Setting the data phase to 21 for uplink 20 14:11:09:setup_element:INFO: Setting the data phase to 22 for uplink 21 14:11:09:setup_element:INFO: Setting the data phase to 22 for uplink 22 14:11:09:setup_element:INFO: Setting the data phase to 20 for uplink 23 14:11:09:setup_element:INFO: Setting the data phase to 33 for uplink 24 14:11:09:setup_element:INFO: Setting the data phase to 35 for uplink 25 14:11:09:setup_element:INFO: Setting the data phase to 34 for uplink 26 14:11:09:setup_element:INFO: Setting the data phase to 35 for uplink 27 14:11:09:setup_element:INFO: Setting the data phase to 2 for uplink 28 14:11:09:setup_element:INFO: Setting the data phase to 1 for uplink 29 14:11:09:setup_element:INFO: Setting the data phase to 4 for uplink 30 14:11:09:setup_element:INFO: Setting the data phase to 2 for uplink 31 ==============================================OOO============================================== 14:11:09:setup_element:INFO: Beginning SMX ASICs map scan 14:11:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:11:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:11:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:11:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:11:09:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 14:11:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 14:11:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 14:11:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:11:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:11:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 14:11:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 14:11:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:11:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:11:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 14:11:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 14:11:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:11:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:11:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 14:11:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 14:11:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:11:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:11:12:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 69 Eye Windows: Uplink 16: ____________________________________________________________________XXXXXXXXX___ Uplink 17: ____________________________________________________________________XXXXXXXXX___ Uplink 18: _____________________________________________________________________XXXXXXXX___ Uplink 19: _____________________________________________________________________XXXXXXXX___ Uplink 20: ____________________________________________________________________XXXXXXXXX___ Uplink 21: ____________________________________________________________________XXXXXXXXX___ Uplink 22: _____________________________________________________________________XXXXXXXX___ Uplink 23: _____________________________________________________________________XXXXXXXX___ Uplink 24: ____________________________________________________________________XXXXXXXX____ Uplink 25: ____________________________________________________________________XXXXXXXX____ Uplink 26: ____________________________________________________________________XXXXXXX_____ Uplink 27: ____________________________________________________________________XXXXXXX_____ Uplink 28: ______________________________________________________________________XXXXXXXXX_ Uplink 29: ______________________________________________________________________XXXXXXXXX_ Uplink 30: _______________________________________________________________________XXXXXXXX_ Uplink 31: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 17: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 18: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 19: Optimal Phase: 22 Window Length: 33 Eye Window: _XXXXX_________________________________X Uplink 20: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 21: Optimal Phase: 22 Window Length: 33 Eye Window: XXXXXX_________________________________X Uplink 22: Optimal Phase: 22 Window Length: 33 Eye Window: _XXXXX_________________________________X Uplink 23: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 24: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 25: Optimal Phase: 35 Window Length: 36 Eye Window: ______________XXXX______________________ Uplink 26: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 27: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 28: Optimal Phase: 2 Window Length: 34 Eye Window: ____________________XXXXXX______________ Uplink 29: Optimal Phase: 1 Window Length: 34 Eye Window: ___________________XXXXXX_______________ Uplink 30: Optimal Phase: 4 Window Length: 33 Eye Window: _____________________XXXXXXX____________ Uplink 31: Optimal Phase: 2 Window Length: 33 Eye Window: ___________________XXXXXXX______________ ==============================================OOO============================================== 14:11:12:setup_element:INFO: Performing Elink synchronization 14:11:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:11:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:11:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:11:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 14:11:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:11:12:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 14:11:12:ST3_emu_feb:DEBUG: Chip address: 0x0 14:11:12:ST3_emu_feb:DEBUG: Chip address: 0x1 14:11:12:ST3_emu_feb:DEBUG: Chip address: 0x2 14:11:12:ST3_emu_feb:DEBUG: Chip address: 0x3 14:11:12:ST3_emu_feb:DEBUG: Chip address: 0x4 14:11:12:ST3_emu_feb:DEBUG: Chip address: 0x5 14:11:12:ST3_emu_feb:DEBUG: Chip address: 0x6 14:11:12:ST3_emu_feb:DEBUG: Chip address: 0x7 14:11:12:febtest:INFO: Init all SMX (CSA): 30 14:11:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:11:27:febtest:INFO: 23-00 | XA-000-09-004-025-007-011-04 | 40.9 | 1147.8 14:11:27:febtest:INFO: 30-01 | XA-000-09-004-025-016-011-00 | 28.2 | 1189.2 14:11:27:febtest:INFO: 21-02 | XA-000-09-004-025-004-012-10 | 34.6 | 1159.7 14:11:28:febtest:INFO: 28-03 | XA-000-09-004-025-016-010-00 | 28.2 | 1189.2 14:11:28:febtest:INFO: 19-04 | XA-000-09-004-025-010-010-03 | 47.3 | 1130.0 14:11:28:febtest:INFO: 26-05 | XA-000-09-004-025-010-012-03 | 44.1 | 1135.9 14:11:28:febtest:INFO: 17-06 | XA-000-09-004-025-007-012-04 | 40.9 | 1165.6 14:11:28:febtest:INFO: 24-07 | XA-000-09-004-025-013-010-11 | 31.4 | 1177.4 14:11:29:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 14:11:31:ST3_smx:INFO: chip: 23-0 40.898880 C 1165.571835 mV 14:11:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:31:ST3_smx:INFO: Electrons 14:11:36:ST3_smx:INFO: Total # of broken channels: 8 14:11:36:ST3_smx:INFO: List of broken channels: [6, 11, 16, 41, 89, 101, 114, 122] 14:11:36:ST3_smx:INFO: Total # of broken channels: 0 14:11:36:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:11:38:ST3_smx:INFO: chip: 30-1 28.225000 C 1206.851500 mV 14:11:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:38:ST3_smx:INFO: Electrons 14:11:43:ST3_smx:INFO: Total # of broken channels: 3 14:11:43:ST3_smx:INFO: List of broken channels: [78, 84, 85] 14:11:43:ST3_smx:INFO: Total # of broken channels: 0 14:11:43:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:11:45:ST3_smx:INFO: chip: 21-2 34.556970 C 1177.390875 mV 14:11:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:45:ST3_smx:INFO: Electrons 14:11:49:ST3_smx:INFO: Total # of broken channels: 7 14:11:49:ST3_smx:INFO: List of broken channels: [0, 14, 24, 52, 55, 68, 71] 14:11:49:ST3_smx:INFO: Total # of broken channels: 0 14:11:49:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:11:51:ST3_smx:INFO: chip: 28-3 28.225000 C 1206.851500 mV 14:11:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:51:ST3_smx:INFO: Electrons 14:11:56:ST3_smx:INFO: Total # of broken channels: 1 14:11:56:ST3_smx:INFO: List of broken channels: [62] 14:11:56:ST3_smx:INFO: Total # of broken channels: 0 14:11:56:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:11:58:ST3_smx:INFO: chip: 19-4 47.250730 C 1141.874115 mV 14:11:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:58:ST3_smx:INFO: Electrons 14:12:02:ST3_smx:INFO: Total # of broken channels: 3 14:12:02:ST3_smx:INFO: List of broken channels: [25, 34, 85] 14:12:02:ST3_smx:INFO: Total # of broken channels: 0 14:12:02:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:12:04:ST3_smx:INFO: chip: 26-5 44.073563 C 1153.732915 mV 14:12:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:04:ST3_smx:INFO: Electrons 14:12:09:ST3_smx:INFO: Total # of broken channels: 6 14:12:09:ST3_smx:INFO: List of broken channels: [6, 11, 23, 33, 113, 114] 14:12:09:ST3_smx:INFO: Total # of broken channels: 0 14:12:09:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:12:11:ST3_smx:INFO: chip: 17-6 40.898880 C 1183.292940 mV 14:12:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:11:ST3_smx:INFO: Electrons 14:12:15:ST3_smx:INFO: Total # of broken channels: 3 14:12:15:ST3_smx:INFO: List of broken channels: [4, 76, 91] 14:12:15:ST3_smx:INFO: Total # of broken channels: 0 14:12:15:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:12:17:ST3_smx:INFO: chip: 24-7 34.556970 C 1189.190035 mV 14:12:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:17:ST3_smx:INFO: Electrons 14:12:22:ST3_smx:INFO: Total # of broken channels: 7 14:12:22:ST3_smx:INFO: List of broken channels: [24, 28, 61, 71, 78, 96, 110] 14:12:22:ST3_smx:INFO: Total # of broken channels: 2 14:12:22:ST3_smx:INFO: List of broken channels: [88, 110] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:12:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:12:23:febtest:INFO: 23-00 | XA-000-09-004-025-007-011-04 | 40.9 | 1183.3 14:12:23:febtest:INFO: 30-01 | XA-000-09-004-025-016-011-00 | 28.2 | 1236.2 14:12:23:febtest:INFO: 21-02 | XA-000-09-004-025-004-012-10 | 37.7 | 1195.1 14:12:23:febtest:INFO: 28-03 | XA-000-09-004-025-016-010-00 | 28.2 | 1230.3 14:12:24:febtest:INFO: 19-04 | XA-000-09-004-025-010-010-03 | 47.3 | 1159.7 14:12:24:febtest:INFO: 26-05 | XA-000-09-004-025-010-012-03 | 44.1 | 1171.5 14:12:24:febtest:INFO: 17-06 | XA-000-09-004-025-007-012-04 | 40.9 | 1201.0 14:12:24:febtest:INFO: 24-07 | XA-000-09-004-025-013-010-11 | 34.6 | 1212.7 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_07_25-14_11_00 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2438| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.6240', '1.847', '2.8120'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0420', '1.850', '2.5230'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9970', '1.850', '0.5265']