09:39:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:39:51:ST3_Shared:INFO:	                       FEB-Microcable                       
09:39:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:39:51:febtest:INFO:	Testing FEB with SN 2439
==============================================OOO==============================================
09:39:53:smx_tester:INFO:	Scanning setup
09:39:53:elinks:INFO:	Disabling clock on downlink 0
09:39:53:elinks:INFO:	Disabling clock on downlink 1
09:39:53:elinks:INFO:	Disabling clock on downlink 2
09:39:53:elinks:INFO:	Disabling clock on downlink 3
09:39:53:elinks:INFO:	Disabling clock on downlink 4
09:39:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:39:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:39:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:39:53:elinks:INFO:	Disabling clock on downlink 0
09:39:53:elinks:INFO:	Disabling clock on downlink 1
09:39:53:elinks:INFO:	Disabling clock on downlink 2
09:39:53:elinks:INFO:	Disabling clock on downlink 3
09:39:53:elinks:INFO:	Disabling clock on downlink 4
09:39:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:39:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:39:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:39:53:elinks:INFO:	Disabling clock on downlink 0
09:39:53:elinks:INFO:	Disabling clock on downlink 1
09:39:53:elinks:INFO:	Disabling clock on downlink 2
09:39:53:elinks:INFO:	Disabling clock on downlink 3
09:39:53:elinks:INFO:	Disabling clock on downlink 4
09:39:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:39:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:39:53:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:39:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:39:53:elinks:INFO:	Disabling clock on downlink 0
09:39:53:elinks:INFO:	Disabling clock on downlink 1
09:39:53:elinks:INFO:	Disabling clock on downlink 2
09:39:53:elinks:INFO:	Disabling clock on downlink 3
09:39:53:elinks:INFO:	Disabling clock on downlink 4
09:39:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:39:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:39:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:39:53:elinks:INFO:	Disabling clock on downlink 0
09:39:53:elinks:INFO:	Disabling clock on downlink 1
09:39:53:elinks:INFO:	Disabling clock on downlink 2
09:39:53:elinks:INFO:	Disabling clock on downlink 3
09:39:54:elinks:INFO:	Disabling clock on downlink 4
09:39:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:39:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:39:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:39:54:setup_element:INFO:	Scanning clock phase
09:39:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:39:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:39:54:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:39:54:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:39:54:setup_element:INFO:	Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:39:54:setup_element:INFO:	Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:39:54:setup_element:INFO:	Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:39:54:setup_element:INFO:	Eye window for uplink 20: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:39:54:setup_element:INFO:	Eye window for uplink 21: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:39:54:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:39:54:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:39:54:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:39:54:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:39:54:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:39:54:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:39:54:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:39:54:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:39:54:setup_element:INFO:	Eye window for uplink 30: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:39:54:setup_element:INFO:	Eye window for uplink 31: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:39:54:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
09:39:54:setup_element:INFO:	Scanning data phases
09:39:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:39:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:40:00:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:40:00:setup_element:INFO:	Eye window for uplink 16: ___XXXX_________________________________
Data delay found: 24
09:40:00:setup_element:INFO:	Eye window for uplink 17: _XXXXX__________________________________
Data delay found: 23
09:40:00:setup_element:INFO:	Eye window for uplink 18: XXXXXX_________________________________X
Data delay found: 22
09:40:00:setup_element:INFO:	Eye window for uplink 19: XXXXXX_________________________________X
Data delay found: 22
09:40:00:setup_element:INFO:	Eye window for uplink 20: ___XXXXXX_______________________________
Data delay found: 25
09:40:00:setup_element:INFO:	Eye window for uplink 21: ____XXXXXXX_____________________________
Data delay found: 27
09:40:00:setup_element:INFO:	Eye window for uplink 22: _XXXXXX_________________________________
Data delay found: 23
09:40:00:setup_element:INFO:	Eye window for uplink 23: XXXXX__________________________________X
Data delay found: 21
09:40:00:setup_element:INFO:	Eye window for uplink 24: ___________XXXXXXX______________________
Data delay found: 34
09:40:00:setup_element:INFO:	Eye window for uplink 25: _____________XXXXXX_____________________
Data delay found: 35
09:40:00:setup_element:INFO:	Eye window for uplink 26: _____________XXXXXX_____________________
Data delay found: 35
09:40:00:setup_element:INFO:	Eye window for uplink 27: ______________XXXXXXX___________________
Data delay found: 37
09:40:00:setup_element:INFO:	Eye window for uplink 28: __________________XXXXXXX_______________
Data delay found: 1
09:40:00:setup_element:INFO:	Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
09:40:00:setup_element:INFO:	Eye window for uplink 30: ____________________XXXXXX______________
Data delay found: 2
09:40:00:setup_element:INFO:	Eye window for uplink 31: __________________XXXXXX________________
Data delay found: 0
09:40:00:setup_element:INFO:	Setting the data phase to 24 for uplink 16
09:40:00:setup_element:INFO:	Setting the data phase to 23 for uplink 17
09:40:00:setup_element:INFO:	Setting the data phase to 22 for uplink 18
09:40:00:setup_element:INFO:	Setting the data phase to 22 for uplink 19
09:40:00:setup_element:INFO:	Setting the data phase to 25 for uplink 20
09:40:00:setup_element:INFO:	Setting the data phase to 27 for uplink 21
09:40:00:setup_element:INFO:	Setting the data phase to 23 for uplink 22
09:40:00:setup_element:INFO:	Setting the data phase to 21 for uplink 23
09:40:00:setup_element:INFO:	Setting the data phase to 34 for uplink 24
09:40:00:setup_element:INFO:	Setting the data phase to 35 for uplink 25
09:40:00:setup_element:INFO:	Setting the data phase to 35 for uplink 26
09:40:00:setup_element:INFO:	Setting the data phase to 37 for uplink 27
09:40:00:setup_element:INFO:	Setting the data phase to 1 for uplink 28
09:40:00:setup_element:INFO:	Setting the data phase to 0 for uplink 29
09:40:00:setup_element:INFO:	Setting the data phase to 2 for uplink 30
09:40:00:setup_element:INFO:	Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
09:40:00:setup_element:INFO:	Beginning SMX ASICs map scan
09:40:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:40:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:40:00:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:40:00:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:40:00:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:40:00:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:40:00:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:40:00:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:40:00:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:40:00:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:40:00:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:40:00:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:40:00:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:40:00:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:40:01:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:40:01:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:40:01:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:40:01:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:40:01:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:40:01:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:40:01:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:40:02:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXXXX__
      Uplink 17: ______________________________________________________________________XXXXXXXX__
      Uplink 18: ______________________________________________________________________XXXXXXXX__
      Uplink 19: ______________________________________________________________________XXXXXXXX__
      Uplink 20: _______________________________________________________________________XXXXXXX__
      Uplink 21: _______________________________________________________________________XXXXXXX__
      Uplink 22: ______________________________________________________________________XXXXXXXX__
      Uplink 23: ______________________________________________________________________XXXXXXXX__
      Uplink 24: ______________________________________________________________________XXXXXXX___
      Uplink 25: ______________________________________________________________________XXXXXXX___
      Uplink 26: _____________________________________________________________________XXXXXXXX___
      Uplink 27: _____________________________________________________________________XXXXXXXX___
      Uplink 28: ______________________________________________________________________XXXXXXXXX_
      Uplink 29: ______________________________________________________________________XXXXXXXXX_
      Uplink 30: ______________________________________________________________________XXXXXXXXX_
      Uplink 31: ______________________________________________________________________XXXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 17:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 18:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: XXXXXX_________________________________X
    Uplink 19:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: XXXXXX_________________________________X
    Uplink 20:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 21:
      Optimal Phase: 27
      Window Length: 33
      Eye Window: ____XXXXXXX_____________________________
    Uplink 22:
      Optimal Phase: 23
      Window Length: 34
      Eye Window: _XXXXXX_________________________________
    Uplink 23:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 24:
      Optimal Phase: 34
      Window Length: 33
      Eye Window: ___________XXXXXXX______________________
    Uplink 25:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 26:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 27:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 28:
      Optimal Phase: 1
      Window Length: 33
      Eye Window: __________________XXXXXXX_______________
    Uplink 29:
      Optimal Phase: 0
      Window Length: 34
      Eye Window: __________________XXXXXX________________
    Uplink 30:
      Optimal Phase: 2
      Window Length: 34
      Eye Window: ____________________XXXXXX______________
    Uplink 31:
      Optimal Phase: 0
      Window Length: 34
      Eye Window: __________________XXXXXX________________

==============================================OOO==============================================
09:40:02:setup_element:INFO:	Performing Elink synchronization
09:40:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:40:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:40:02:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:40:03:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
09:40:03:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:40:03:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:40:03:ST3_emu_feb:DEBUG:	Chip address:  	0x0
09:40:03:ST3_emu_feb:DEBUG:	Chip address:  	0x1
09:40:03:ST3_emu_feb:DEBUG:	Chip address:  	0x2
09:40:03:ST3_emu_feb:DEBUG:	Chip address:  	0x3
09:40:03:ST3_emu_feb:DEBUG:	Chip address:  	0x4
09:40:03:ST3_emu_feb:DEBUG:	Chip address:  	0x5
09:40:03:ST3_emu_feb:DEBUG:	Chip address:  	0x6
09:40:03:ST3_emu_feb:DEBUG:	Chip address:  	0x7
09:40:03:febtest:INFO:	Init all SMX (CSA): 30
09:40:17:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:40:17:febtest:INFO:	23-00 | XA-000-09-004-032-011-026-06 |  28.2 | 1195.1
09:40:17:febtest:INFO:	30-01 | XA-000-09-004-032-011-020-06 |  37.7 | 1153.7
09:40:17:febtest:INFO:	21-02 | XA-000-09-004-032-012-002-09 |  47.3 | 1147.8
09:40:18:febtest:INFO:	28-03 | XA-000-09-004-032-014-020-13 |  37.7 | 1159.7
09:40:18:febtest:INFO:	19-04 | -000-00-000-000-000-000-00 |  31.4 | 1183.3
09:40:18:febtest:INFO:	26-05 | XA-000-09-004-032-002-018-07 |  31.4 | 1171.5
09:40:18:febtest:INFO:	17-06 | XA-000-09-004-032-008-026-08 |  37.7 | 1165.6
09:40:19:febtest:INFO:	24-07 | XA-000-09-004-032-014-023-13 |  15.6 | 1224.5
09:40:20:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:40:20:febtest:WARNING:	Chip address is 0!!!
09:40:20:febtest:ERROR:	addres 0
09:40:43:ST3_smx:INFO:	chip: 23-0 	 28.225000 C 	 1212.728715 mV
09:40:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:40:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:40:43:ST3_smx:INFO:		Electrons
09:40:48:ST3_smx:INFO:	Total # of broken channels: 8
09:40:48:ST3_smx:INFO:	List of broken channels: [1, 8, 28, 29, 33, 44, 91, 107]
09:40:48:ST3_smx:INFO:	Total # of broken channels: 0
09:40:48:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:40:50:ST3_smx:INFO:	chip: 30-1 	 37.726682 C 	 1165.571835 mV
09:40:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:40:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:40:50:ST3_smx:INFO:		Electrons
09:40:55:ST3_smx:INFO:	Total # of broken channels: 5
09:40:55:ST3_smx:INFO:	List of broken channels: [43, 58, 73, 110, 114]
09:40:55:ST3_smx:INFO:	Total # of broken channels: 2
09:40:55:ST3_smx:INFO:	List of broken channels: [26, 28]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:40:57:ST3_smx:INFO:	chip: 21-2 	 47.250730 C 	 1159.654860 mV
09:40:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:40:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:40:57:ST3_smx:INFO:		Electrons
09:41:01:ST3_smx:INFO:	Total # of broken channels: 8
09:41:01:ST3_smx:INFO:	List of broken channels: [12, 73, 79, 102, 104, 113, 118, 123]
09:41:01:ST3_smx:INFO:	Total # of broken channels: 2
09:41:01:ST3_smx:INFO:	List of broken channels: [92, 98]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:41:03:ST3_smx:INFO:	chip: 28-3 	 34.556970 C 	 1171.483840 mV
09:41:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:41:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:41:03:ST3_smx:INFO:		Electrons
09:41:08:ST3_smx:INFO:	Total # of broken channels: 7
09:41:08:ST3_smx:INFO:	List of broken channels: [2, 31, 60, 71, 92, 98, 104]
09:41:08:ST3_smx:INFO:	Total # of broken channels: 0
09:41:08:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:41:09:ST3_smx:INFO:	chip: 19-4 	 31.389742 C 	 1200.969315 mV
09:41:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:41:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:41:10:ST3_smx:INFO:		Electrons
09:41:14:ST3_smx:INFO:	Total # of broken channels: 9
09:41:14:ST3_smx:INFO:	List of broken channels: [7, 22, 63, 66, 67, 81, 95, 121, 122]
09:41:14:ST3_smx:INFO:	Total # of broken channels: 0
09:41:14:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:41:16:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1189.190035 mV
09:41:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:41:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:41:16:ST3_smx:INFO:		Electrons
09:41:21:ST3_smx:INFO:	Total # of broken channels: 8
09:41:21:ST3_smx:INFO:	List of broken channels: [2, 20, 29, 47, 74, 75, 115, 117]
09:41:21:ST3_smx:INFO:	Total # of broken channels: 0
09:41:21:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:41:23:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1177.390875 mV
09:41:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:41:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:41:23:ST3_smx:INFO:		Electrons
09:41:27:ST3_smx:INFO:	Total # of broken channels: 6
09:41:27:ST3_smx:INFO:	List of broken channels: [5, 12, 23, 30, 31, 93]
09:41:27:ST3_smx:INFO:	Total # of broken channels: 0
09:41:27:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:41:29:ST3_smx:INFO:	chip: 24-7 	 18.745682 C 	 1242.040240 mV
09:41:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:41:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:41:29:ST3_smx:INFO:		Electrons
09:41:34:ST3_smx:INFO:	Total # of broken channels: 4
09:41:34:ST3_smx:INFO:	List of broken channels: [7, 40, 79, 80]
09:41:34:ST3_smx:INFO:	Total # of broken channels: 0
09:41:34:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:41:34:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:41:34:febtest:INFO:	23-00 | XA-000-09-004-032-011-026-06 |  28.2 | 1230.3
09:41:34:febtest:INFO:	30-01 | XA-000-09-004-032-011-020-06 |  37.7 | 1189.2
09:41:35:febtest:INFO:	21-02 | XA-000-09-004-032-012-002-09 |  47.3 | 1177.4
09:41:35:febtest:INFO:	28-03 | XA-000-09-004-032-014-020-13 |  37.7 | 1195.1
09:41:35:febtest:INFO:	19-04 | -000-00-000-000-000-000-00 |  34.6 | 1218.6
09:41:35:febtest:INFO:	26-05 | XA-000-09-004-032-002-018-07 |  34.6 | 1212.7
09:41:35:febtest:INFO:	17-06 | XA-000-09-004-032-008-026-08 |  40.9 | 1195.1
09:41:36:febtest:INFO:	24-07 | XA-000-09-004-032-014-023-13 |  18.7 | 1259.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_23-09_39_51
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2439| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5860', '1.848', '2.1290']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0090', '1.850', '2.5200']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9710', '1.850', '0.5183']