
FEB_2440 20.06.25 13:00:57
TextEdit.txt
13:00:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:00:57:ST3_Shared:INFO: FEB-Microcable 13:00:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:00:57:febtest:INFO: Testing FEB with SN 2440 ==============================================OOO============================================== 13:00:59:smx_tester:INFO: Scanning setup 13:00:59:elinks:INFO: Disabling clock on downlink 0 13:00:59:elinks:INFO: Disabling clock on downlink 1 13:00:59:elinks:INFO: Disabling clock on downlink 2 13:00:59:elinks:INFO: Disabling clock on downlink 3 13:00:59:elinks:INFO: Disabling clock on downlink 4 13:00:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:00:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:00:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:00:59:elinks:INFO: Disabling clock on downlink 0 13:00:59:elinks:INFO: Disabling clock on downlink 1 13:00:59:elinks:INFO: Disabling clock on downlink 2 13:00:59:elinks:INFO: Disabling clock on downlink 3 13:00:59:elinks:INFO: Disabling clock on downlink 4 13:00:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:00:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:00:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:00:59:elinks:INFO: Disabling clock on downlink 0 13:00:59:elinks:INFO: Disabling clock on downlink 1 13:00:59:elinks:INFO: Disabling clock on downlink 2 13:00:59:elinks:INFO: Disabling clock on downlink 3 13:00:59:elinks:INFO: Disabling clock on downlink 4 13:00:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:00:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:00:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:00:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:00:59:elinks:INFO: Disabling clock on downlink 0 13:00:59:elinks:INFO: Disabling clock on downlink 1 13:00:59:elinks:INFO: Disabling clock on downlink 2 13:00:59:elinks:INFO: Disabling clock on downlink 3 13:00:59:elinks:INFO: Disabling clock on downlink 4 13:00:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:00:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:00:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:00:59:elinks:INFO: Disabling clock on downlink 0 13:00:59:elinks:INFO: Disabling clock on downlink 1 13:00:59:elinks:INFO: Disabling clock on downlink 2 13:00:59:elinks:INFO: Disabling clock on downlink 3 13:00:59:elinks:INFO: Disabling clock on downlink 4 13:00:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:00:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:00:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 13:00:59:setup_element:INFO: Scanning clock phase 13:00:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:00:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:01:00:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:01:00:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:01:00:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:01:00:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:01:00:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:01:00:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:01:00:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:01:00:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXXX__ Clock Delay: 32 13:01:00:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXXX__ Clock Delay: 32 13:01:00:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 13:01:00:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 13:01:00:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 13:01:00:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 13:01:00:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 13:01:00:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 13:01:00:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:01:00:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:01:00:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 ==============================================OOO============================================== 13:01:00:setup_element:INFO: Scanning data phases 13:01:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:01:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:01:05:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:01:05:setup_element:INFO: Eye window for uplink 16: ___XXXXX________________________________ Data delay found: 25 13:01:05:setup_element:INFO: Eye window for uplink 17: _XXXXXX_________________________________ Data delay found: 23 13:01:05:setup_element:INFO: Eye window for uplink 18: ___XXXXX________________________________ Data delay found: 25 13:01:05:setup_element:INFO: Eye window for uplink 19: ___XXXXXX_______________________________ Data delay found: 25 13:01:05:setup_element:INFO: Eye window for uplink 20: ___XXXXXX_______________________________ Data delay found: 25 13:01:05:setup_element:INFO: Eye window for uplink 21: ____XXXXXXX_____________________________ Data delay found: 27 13:01:05:setup_element:INFO: Eye window for uplink 22: __XXXXX_________________________________ Data delay found: 24 13:01:05:setup_element:INFO: Eye window for uplink 23: _XXXXX__________________________________ Data delay found: 23 13:01:05:setup_element:INFO: Eye window for uplink 24: ___________XXXXXX_______________________ Data delay found: 33 13:01:05:setup_element:INFO: Eye window for uplink 25: _____________XXXXX______________________ Data delay found: 35 13:01:05:setup_element:INFO: Eye window for uplink 26: _________________XXXXXX_________________ Data delay found: 39 13:01:05:setup_element:INFO: Eye window for uplink 27: __________________XXXXXXX_______________ Data delay found: 1 13:01:05:setup_element:INFO: Eye window for uplink 28: _____________________XXXXXX_____________ Data delay found: 3 13:01:05:setup_element:INFO: Eye window for uplink 29: _____________________XXXXX______________ Data delay found: 3 13:01:05:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXX______________ Data delay found: 2 13:01:05:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXX_______________ Data delay found: 1 13:01:05:setup_element:INFO: Setting the data phase to 25 for uplink 16 13:01:05:setup_element:INFO: Setting the data phase to 23 for uplink 17 13:01:05:setup_element:INFO: Setting the data phase to 25 for uplink 18 13:01:05:setup_element:INFO: Setting the data phase to 25 for uplink 19 13:01:05:setup_element:INFO: Setting the data phase to 25 for uplink 20 13:01:05:setup_element:INFO: Setting the data phase to 27 for uplink 21 13:01:05:setup_element:INFO: Setting the data phase to 24 for uplink 22 13:01:05:setup_element:INFO: Setting the data phase to 23 for uplink 23 13:01:05:setup_element:INFO: Setting the data phase to 33 for uplink 24 13:01:05:setup_element:INFO: Setting the data phase to 35 for uplink 25 13:01:05:setup_element:INFO: Setting the data phase to 39 for uplink 26 13:01:05:setup_element:INFO: Setting the data phase to 1 for uplink 27 13:01:05:setup_element:INFO: Setting the data phase to 3 for uplink 28 13:01:05:setup_element:INFO: Setting the data phase to 3 for uplink 29 13:01:05:setup_element:INFO: Setting the data phase to 2 for uplink 30 13:01:05:setup_element:INFO: Setting the data phase to 1 for uplink 31 ==============================================OOO============================================== 13:01:05:setup_element:INFO: Beginning SMX ASICs map scan 13:01:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:01:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:01:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:01:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:01:05:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 13:01:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 13:01:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 13:01:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:01:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:01:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 13:01:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 13:01:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:01:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:01:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 13:01:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 13:01:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 13:01:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 13:01:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 13:01:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 13:01:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:01:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:01:08:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 16: ______________________________________________________________________XXXXXXXX__ Uplink 17: ______________________________________________________________________XXXXXXXX__ Uplink 18: ______________________________________________________________________XXXXXXXX__ Uplink 19: ______________________________________________________________________XXXXXXXX__ Uplink 20: ______________________________________________________________________XXXXXXXX__ Uplink 21: ______________________________________________________________________XXXXXXXX__ Uplink 22: ____________________________________________________________________XXXXXXXXXX__ Uplink 23: ____________________________________________________________________XXXXXXXXXX__ Uplink 24: ____________________________________________________________________XXXXXXXX____ Uplink 25: ____________________________________________________________________XXXXXXXX____ Uplink 26: _____________________________________________________________________XXXXXXXX___ Uplink 27: _____________________________________________________________________XXXXXXXX___ Uplink 28: _____________________________________________________________________XXXXXXXXX__ Uplink 29: _____________________________________________________________________XXXXXXXXX__ Uplink 30: ______________________________________________________________________XXXXXXXX__ Uplink 31: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 17: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 18: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 19: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 20: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 21: Optimal Phase: 27 Window Length: 33 Eye Window: ____XXXXXXX_____________________________ Uplink 22: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 23: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 24: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 25: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 26: Optimal Phase: 39 Window Length: 34 Eye Window: _________________XXXXXX_________________ Uplink 27: Optimal Phase: 1 Window Length: 33 Eye Window: __________________XXXXXXX_______________ Uplink 28: Optimal Phase: 3 Window Length: 34 Eye Window: _____________________XXXXXX_____________ Uplink 29: Optimal Phase: 3 Window Length: 35 Eye Window: _____________________XXXXX______________ Uplink 30: Optimal Phase: 2 Window Length: 34 Eye Window: ____________________XXXXXX______________ Uplink 31: Optimal Phase: 1 Window Length: 33 Eye Window: __________________XXXXXXX_______________ ==============================================OOO============================================== 13:01:08:setup_element:INFO: Performing Elink synchronization 13:01:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:01:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:01:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:01:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 13:01:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:01:08:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 13:01:09:ST3_emu_feb:DEBUG: Chip address: 0x0 13:01:09:ST3_emu_feb:DEBUG: Chip address: 0x1 13:01:09:ST3_emu_feb:DEBUG: Chip address: 0x2 13:01:09:ST3_emu_feb:DEBUG: Chip address: 0x3 13:01:09:ST3_emu_feb:DEBUG: Chip address: 0x4 13:01:09:ST3_emu_feb:DEBUG: Chip address: 0x5 13:01:09:ST3_emu_feb:DEBUG: Chip address: 0x6 13:01:09:ST3_emu_feb:DEBUG: Chip address: 0x7 13:01:09:febtest:INFO: Init all SMX (CSA): 30 13:01:23:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:01:23:febtest:INFO: 23-00 | XA-000-09-004-015-011-016-04 | 40.9 | 1124.0 13:01:23:febtest:INFO: 30-01 | XA-000-09-004-015-008-003-13 | 40.9 | 1112.1 13:01:23:febtest:INFO: 21-02 | XA-000-09-004-015-011-002-03 | 40.9 | 1118.1 13:01:24:febtest:INFO: 28-03 | XA-000-09-004-015-005-005-10 | 28.2 | 1147.8 13:01:24:febtest:INFO: 19-04 | XA-000-09-004-015-011-005-03 | 40.9 | 1130.0 13:01:24:febtest:INFO: 26-05 | XA-000-09-004-015-014-005-08 | 37.7 | 1124.0 13:01:24:febtest:INFO: 17-06 | XA-000-09-004-015-008-005-13 | 34.6 | 1153.7 13:01:25:febtest:INFO: 24-07 | XA-000-09-004-015-011-003-03 | 34.6 | 1130.0 13:01:26:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 13:01:28:ST3_smx:INFO: chip: 23-0 40.898880 C 1135.937260 mV 13:01:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:01:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:01:28:ST3_smx:INFO: Electrons 13:01:33:ST3_smx:INFO: Total # of broken channels: 9 13:01:33:ST3_smx:INFO: List of broken channels: [30, 53, 58, 59, 78, 86, 89, 102, 106] 13:01:33:ST3_smx:INFO: Total # of broken channels: 1 13:01:33:ST3_smx:INFO: List of broken channels: [126] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:01:34:ST3_smx:INFO: chip: 30-1 40.898880 C 1124.048640 mV 13:01:34:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:01:34:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:01:34:ST3_smx:INFO: Electrons 13:01:39:ST3_smx:INFO: Total # of broken channels: 6 13:01:39:ST3_smx:INFO: List of broken channels: [32, 38, 40, 72, 96, 114] 13:01:39:ST3_smx:INFO: Total # of broken channels: 0 13:01:39:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:01:41:ST3_smx:INFO: chip: 21-2 40.898880 C 1135.937260 mV 13:01:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:01:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:01:41:ST3_smx:INFO: Electrons 13:01:46:ST3_smx:INFO: Total # of broken channels: 6 13:01:46:ST3_smx:INFO: List of broken channels: [3, 71, 97, 98, 116, 117] 13:01:46:ST3_smx:INFO: Total # of broken channels: 0 13:01:46:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:01:48:ST3_smx:INFO: chip: 28-3 28.225000 C 1165.571835 mV 13:01:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:01:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:01:48:ST3_smx:INFO: Electrons 13:01:52:ST3_smx:INFO: Total # of broken channels: 8 13:01:52:ST3_smx:INFO: List of broken channels: [1, 6, 8, 11, 31, 51, 59, 62] 13:01:52:ST3_smx:INFO: Total # of broken channels: 0 13:01:52:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:01:54:ST3_smx:INFO: chip: 19-4 40.898880 C 1141.874115 mV 13:01:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:01:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:01:54:ST3_smx:INFO: Electrons 13:01:59:ST3_smx:INFO: Total # of broken channels: 6 13:01:59:ST3_smx:INFO: List of broken channels: [35, 69, 81, 86, 109, 114] 13:01:59:ST3_smx:INFO: Total # of broken channels: 0 13:01:59:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:02:00:ST3_smx:INFO: chip: 26-5 37.726682 C 1141.874115 mV 13:02:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:02:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:02:00:ST3_smx:INFO: Electrons 13:02:05:ST3_smx:INFO: Total # of broken channels: 6 13:02:05:ST3_smx:INFO: List of broken channels: [40, 48, 51, 64, 79, 91] 13:02:05:ST3_smx:INFO: Total # of broken channels: 0 13:02:05:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:02:07:ST3_smx:INFO: chip: 17-6 34.556970 C 1165.571835 mV 13:02:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:02:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:02:07:ST3_smx:INFO: Electrons 13:02:11:ST3_smx:INFO: Total # of broken channels: 7 13:02:11:ST3_smx:INFO: List of broken channels: [0, 12, 36, 43, 75, 118, 122] 13:02:11:ST3_smx:INFO: Total # of broken channels: 0 13:02:11:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:02:13:ST3_smx:INFO: chip: 24-7 34.556970 C 1141.874115 mV 13:02:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:02:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:02:13:ST3_smx:INFO: Electrons 13:02:18:ST3_smx:INFO: Total # of broken channels: 6 13:02:18:ST3_smx:INFO: List of broken channels: [23, 31, 37, 92, 103, 112] 13:02:18:ST3_smx:INFO: Total # of broken channels: 0 13:02:18:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:02:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:02:19:febtest:INFO: 23-00 | XA-000-09-004-015-011-016-04 | 40.9 | 1159.7 13:02:19:febtest:INFO: 30-01 | XA-000-09-004-015-008-003-13 | 40.9 | 1147.8 13:02:19:febtest:INFO: 21-02 | XA-000-09-004-015-011-002-03 | 44.1 | 1153.7 13:02:19:febtest:INFO: 28-03 | XA-000-09-004-015-005-005-10 | 31.4 | 1183.3 13:02:20:febtest:INFO: 19-04 | XA-000-09-004-015-011-005-03 | 40.9 | 1165.6 13:02:20:febtest:INFO: 26-05 | XA-000-09-004-015-014-005-08 | 37.7 | 1159.7 13:02:20:febtest:INFO: 17-06 | XA-000-09-004-015-008-005-13 | 34.6 | 1189.2 13:02:20:febtest:INFO: 24-07 | XA-000-09-004-015-011-003-03 | 37.7 | 1165.6 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_06_20-13_00_57 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2440| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.8640', '1.846', '2.1810'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0060', '1.850', '2.5970'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9720', '1.850', '0.5227']