10:55:40:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:55:40:ST3_Shared:INFO:	                       FEB-Microcable                       
10:55:40:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:55:40:febtest:INFO:	Testing FEB with SN 2441
==============================================OOO==============================================
10:55:41:smx_tester:INFO:	Scanning setup
10:55:41:elinks:INFO:	Disabling clock on downlink 0
10:55:41:elinks:INFO:	Disabling clock on downlink 1
10:55:41:elinks:INFO:	Disabling clock on downlink 2
10:55:41:elinks:INFO:	Disabling clock on downlink 3
10:55:41:elinks:INFO:	Disabling clock on downlink 4
10:55:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:55:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:55:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:55:41:elinks:INFO:	Disabling clock on downlink 0
10:55:41:elinks:INFO:	Disabling clock on downlink 1
10:55:41:elinks:INFO:	Disabling clock on downlink 2
10:55:41:elinks:INFO:	Disabling clock on downlink 3
10:55:41:elinks:INFO:	Disabling clock on downlink 4
10:55:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:55:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:55:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:55:41:elinks:INFO:	Disabling clock on downlink 0
10:55:41:elinks:INFO:	Disabling clock on downlink 1
10:55:41:elinks:INFO:	Disabling clock on downlink 2
10:55:41:elinks:INFO:	Disabling clock on downlink 3
10:55:41:elinks:INFO:	Disabling clock on downlink 4
10:55:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:55:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:55:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:55:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:55:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:55:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:55:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:55:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:55:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:55:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:55:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:55:42:elinks:INFO:	Disabling clock on downlink 0
10:55:42:elinks:INFO:	Disabling clock on downlink 1
10:55:42:elinks:INFO:	Disabling clock on downlink 2
10:55:42:elinks:INFO:	Disabling clock on downlink 3
10:55:42:elinks:INFO:	Disabling clock on downlink 4
10:55:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:55:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:55:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:55:42:elinks:INFO:	Disabling clock on downlink 0
10:55:42:elinks:INFO:	Disabling clock on downlink 1
10:55:42:elinks:INFO:	Disabling clock on downlink 2
10:55:42:elinks:INFO:	Disabling clock on downlink 3
10:55:42:elinks:INFO:	Disabling clock on downlink 4
10:55:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:55:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:55:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:55:42:setup_element:INFO:	Scanning clock phase
10:55:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:55:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:55:42:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:55:42:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:55:42:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:55:42:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:55:42:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:55:42:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:55:42:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:55:42:setup_element:INFO:	Eye window for uplink 30: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:55:42:setup_element:INFO:	Eye window for uplink 31: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:55:42:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
10:55:42:setup_element:INFO:	Scanning data phases
10:55:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:55:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:55:47:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:55:47:setup_element:INFO:	Eye window for uplink 24: _______________XXXXXX___________________
Data delay found: 37
10:55:47:setup_element:INFO:	Eye window for uplink 25: _________________XXXXX__________________
Data delay found: 39
10:55:47:setup_element:INFO:	Eye window for uplink 26: ______________XXXX______________________
Data delay found: 35
10:55:47:setup_element:INFO:	Eye window for uplink 27: _______________XXXXXX___________________
Data delay found: 37
10:55:47:setup_element:INFO:	Eye window for uplink 28: ____________________XXXXX_______________
Data delay found: 2
10:55:47:setup_element:INFO:	Eye window for uplink 29: ____________________XXXXX_______________
Data delay found: 2
10:55:47:setup_element:INFO:	Eye window for uplink 30: ___________________XXXXXX_______________
Data delay found: 1
10:55:47:setup_element:INFO:	Eye window for uplink 31: _________________XXXXXX_________________
Data delay found: 39
10:55:47:setup_element:INFO:	Setting the data phase to 37 for uplink 24
10:55:47:setup_element:INFO:	Setting the data phase to 39 for uplink 25
10:55:47:setup_element:INFO:	Setting the data phase to 35 for uplink 26
10:55:47:setup_element:INFO:	Setting the data phase to 37 for uplink 27
10:55:47:setup_element:INFO:	Setting the data phase to 2 for uplink 28
10:55:47:setup_element:INFO:	Setting the data phase to 2 for uplink 29
10:55:47:setup_element:INFO:	Setting the data phase to 1 for uplink 30
10:55:47:setup_element:INFO:	Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
10:55:47:setup_element:INFO:	Beginning SMX ASICs map scan
10:55:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:55:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:55:47:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:55:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:55:47:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:55:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:55:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:55:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:55:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:55:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:55:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:55:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:55:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:55:50:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 69
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXXX__
      Uplink 25: _____________________________________________________________________XXXXXXXXX__
      Uplink 26: ___________________________________________________________________XXXXXXXX_____
      Uplink 27: ___________________________________________________________________XXXXXXXX_____
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: ____________________________________________________________________XXXXXXXX____
      Uplink 31: ____________________________________________________________________XXXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 25:
      Optimal Phase: 39
      Window Length: 35
      Eye Window: _________________XXXXX__________________
    Uplink 26:
      Optimal Phase: 35
      Window Length: 36
      Eye Window: ______________XXXX______________________
    Uplink 27:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 28:
      Optimal Phase: 2
      Window Length: 35
      Eye Window: ____________________XXXXX_______________
    Uplink 29:
      Optimal Phase: 2
      Window Length: 35
      Eye Window: ____________________XXXXX_______________
    Uplink 30:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________

==============================================OOO==============================================
10:55:50:setup_element:INFO:	Performing Elink synchronization
10:55:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:55:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:55:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:55:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:55:50:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:55:50:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:55:50:ST3_emu_feb:DEBUG:	Chip address:  	0x1
10:55:50:ST3_emu_feb:DEBUG:	Chip address:  	0x3
10:55:50:ST3_emu_feb:DEBUG:	Chip address:  	0x5
10:55:50:ST3_emu_feb:DEBUG:	Chip address:  	0x7
10:55:50:febtest:INFO:	Init all SMX (CSA): 30
10:55:57:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:55:58:febtest:INFO:	30-01 | XA-000-09-004-015-012-018-12 |  28.2 | 1171.5
10:55:58:febtest:INFO:	28-03 | XA-000-09-004-016-006-011-14 |  28.2 | 1165.6
10:55:58:febtest:INFO:	26-05 | XA-000-09-004-016-009-012-10 |  18.7 | 1195.1
10:55:58:febtest:INFO:	24-07 | XA-000-09-004-016-003-010-05 |  21.9 | 1201.0
10:55:59:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:56:01:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1183.292940 mV
10:56:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:56:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:56:01:ST3_smx:INFO:		Electrons
10:56:06:ST3_smx:INFO:	Total # of broken channels: 5
10:56:06:ST3_smx:INFO:	List of broken channels: [46, 69, 78, 88, 105]
10:56:06:ST3_smx:INFO:	Total # of broken channels: 0
10:56:06:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:56:08:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1177.390875 mV
10:56:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:56:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:56:08:ST3_smx:INFO:		Electrons
10:56:12:ST3_smx:INFO:	Total # of broken channels: 7
10:56:12:ST3_smx:INFO:	List of broken channels: [5, 31, 38, 69, 71, 74, 123]
10:56:12:ST3_smx:INFO:	Total # of broken channels: 0
10:56:12:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:56:14:ST3_smx:INFO:	chip: 26-5 	 18.745682 C 	 1206.851500 mV
10:56:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:56:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:56:14:ST3_smx:INFO:		Electrons
10:56:19:ST3_smx:INFO:	Total # of broken channels: 5
10:56:19:ST3_smx:INFO:	List of broken channels: [42, 46, 60, 98, 124]
10:56:19:ST3_smx:INFO:	Total # of broken channels: 0
10:56:19:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:56:21:ST3_smx:INFO:	chip: 24-7 	 21.902970 C 	 1206.851500 mV
10:56:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:56:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:56:21:ST3_smx:INFO:		Electrons
10:56:25:ST3_smx:INFO:	Total # of broken channels: 11
10:56:25:ST3_smx:INFO:	List of broken channels: [6, 23, 24, 28, 42, 53, 57, 92, 98, 106, 114]
10:56:25:ST3_smx:INFO:	Total # of broken channels: 0
10:56:25:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:56:26:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:56:26:febtest:INFO:	30-01 | XA-000-09-004-015-012-018-12 |  28.2 | 1201.0
10:56:26:febtest:INFO:	28-03 | XA-000-09-004-016-006-011-14 |  28.2 | 1201.0
10:56:26:febtest:INFO:	26-05 | XA-000-09-004-016-009-012-10 |  21.9 | 1224.5
10:56:27:febtest:INFO:	24-07 | XA-000-09-004-016-003-010-05 |  25.1 | 1247.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_25-10_55_40
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2441| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7542', '1.848', '1.2370']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0040', '1.850', '1.3040']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9968', '1.850', '0.2676']