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FEB_2442 23.06.25 10:51:33
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10:51:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:51:33:ST3_Shared:INFO: FEB-Microcable
10:51:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:51:33:febtest:INFO: Testing FEB with SN 2442
==============================================OOO==============================================
10:51:34:smx_tester:INFO: Scanning setup
10:51:34:elinks:INFO: Disabling clock on downlink 0
10:51:34:elinks:INFO: Disabling clock on downlink 1
10:51:34:elinks:INFO: Disabling clock on downlink 2
10:51:34:elinks:INFO: Disabling clock on downlink 3
10:51:34:elinks:INFO: Disabling clock on downlink 4
10:51:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:51:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:51:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:51:34:elinks:INFO: Disabling clock on downlink 0
10:51:34:elinks:INFO: Disabling clock on downlink 1
10:51:34:elinks:INFO: Disabling clock on downlink 2
10:51:34:elinks:INFO: Disabling clock on downlink 3
10:51:34:elinks:INFO: Disabling clock on downlink 4
10:51:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:51:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:51:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:51:35:elinks:INFO: Disabling clock on downlink 0
10:51:35:elinks:INFO: Disabling clock on downlink 1
10:51:35:elinks:INFO: Disabling clock on downlink 2
10:51:35:elinks:INFO: Disabling clock on downlink 3
10:51:35:elinks:INFO: Disabling clock on downlink 4
10:51:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:51:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:51:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:51:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:51:35:elinks:INFO: Disabling clock on downlink 0
10:51:35:elinks:INFO: Disabling clock on downlink 1
10:51:35:elinks:INFO: Disabling clock on downlink 2
10:51:35:elinks:INFO: Disabling clock on downlink 3
10:51:35:elinks:INFO: Disabling clock on downlink 4
10:51:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:51:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:51:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:51:35:elinks:INFO: Disabling clock on downlink 0
10:51:35:elinks:INFO: Disabling clock on downlink 1
10:51:35:elinks:INFO: Disabling clock on downlink 2
10:51:35:elinks:INFO: Disabling clock on downlink 3
10:51:35:elinks:INFO: Disabling clock on downlink 4
10:51:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:51:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:51:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:51:35:setup_element:INFO: Scanning clock phase
10:51:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:51:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:51:35:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:51:35:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:51:35:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:51:35:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:51:35:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:51:35:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXXXX_
Clock Delay: 33
10:51:35:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXXXX_
Clock Delay: 33
10:51:35:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:51:35:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:51:35:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:51:35:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:51:35:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:51:35:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:51:35:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:51:35:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:51:35:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:51:35:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:51:35:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
10:51:35:setup_element:INFO: Scanning data phases
10:51:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:51:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:51:41:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:51:41:setup_element:INFO: Eye window for uplink 16: _____XXXXX______________________________
Data delay found: 27
10:51:41:setup_element:INFO: Eye window for uplink 17: ___XXXXX________________________________
Data delay found: 25
10:51:41:setup_element:INFO: Eye window for uplink 18: _XXXXXX_________________________________
Data delay found: 23
10:51:41:setup_element:INFO: Eye window for uplink 19: __XXXXX_________________________________
Data delay found: 24
10:51:41:setup_element:INFO: Eye window for uplink 20: ___XXXX_________________________________
Data delay found: 24
10:51:41:setup_element:INFO: Eye window for uplink 21: ___XXXXXX_______________________________
Data delay found: 25
10:51:41:setup_element:INFO: Eye window for uplink 22: XXXXX__________________________________X
Data delay found: 21
10:51:41:setup_element:INFO: Eye window for uplink 23: XXX__________________________________XXX
Data delay found: 19
10:51:41:setup_element:INFO: Eye window for uplink 24: ______________XXXXXXX___________________
Data delay found: 37
10:51:41:setup_element:INFO: Eye window for uplink 25: ________________XXXXX___________________
Data delay found: 38
10:51:41:setup_element:INFO: Eye window for uplink 26: _________________XXXXXX_________________
Data delay found: 39
10:51:41:setup_element:INFO: Eye window for uplink 27: __________________XXXXXXX_______________
Data delay found: 1
10:51:41:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXX_______________
Data delay found: 1
10:51:41:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________
Data delay found: 1
10:51:41:setup_element:INFO: Eye window for uplink 30: ___________________XXXXXX_______________
Data delay found: 1
10:51:41:setup_element:INFO: Eye window for uplink 31: _________________XXXXXX_________________
Data delay found: 39
10:51:41:setup_element:INFO: Setting the data phase to 27 for uplink 16
10:51:41:setup_element:INFO: Setting the data phase to 25 for uplink 17
10:51:41:setup_element:INFO: Setting the data phase to 23 for uplink 18
10:51:41:setup_element:INFO: Setting the data phase to 24 for uplink 19
10:51:41:setup_element:INFO: Setting the data phase to 24 for uplink 20
10:51:41:setup_element:INFO: Setting the data phase to 25 for uplink 21
10:51:41:setup_element:INFO: Setting the data phase to 21 for uplink 22
10:51:41:setup_element:INFO: Setting the data phase to 19 for uplink 23
10:51:41:setup_element:INFO: Setting the data phase to 37 for uplink 24
10:51:41:setup_element:INFO: Setting the data phase to 38 for uplink 25
10:51:41:setup_element:INFO: Setting the data phase to 39 for uplink 26
10:51:41:setup_element:INFO: Setting the data phase to 1 for uplink 27
10:51:41:setup_element:INFO: Setting the data phase to 1 for uplink 28
10:51:41:setup_element:INFO: Setting the data phase to 1 for uplink 29
10:51:41:setup_element:INFO: Setting the data phase to 1 for uplink 30
10:51:41:setup_element:INFO: Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
10:51:41:setup_element:INFO: Beginning SMX ASICs map scan
10:51:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:51:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:51:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:51:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:51:41:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:51:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:51:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:51:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:51:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:51:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:51:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:51:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:51:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:51:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:51:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:51:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:51:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:51:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:51:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:51:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:51:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:51:43:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: ________________________________________________________________________XXXXXXX_
Uplink 17: ________________________________________________________________________XXXXXXX_
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: _____________________________________________________________________XXXXXXXXXX_
Uplink 21: _____________________________________________________________________XXXXXXXXXX_
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 17:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 18:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 19:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 20:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 21:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 22:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 23:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 24:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
Uplink 25:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 26:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 27:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
Uplink 28:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 29:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 30:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 31:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
==============================================OOO==============================================
10:51:43:setup_element:INFO: Performing Elink synchronization
10:51:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:51:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:51:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:51:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:51:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:51:43:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:51:44:ST3_emu_feb:DEBUG: Chip address: 0x0
10:51:44:ST3_emu_feb:DEBUG: Chip address: 0x1
10:51:44:ST3_emu_feb:DEBUG: Chip address: 0x2
10:51:44:ST3_emu_feb:DEBUG: Chip address: 0x3
10:51:44:ST3_emu_feb:DEBUG: Chip address: 0x4
10:51:44:ST3_emu_feb:DEBUG: Chip address: 0x5
10:51:44:ST3_emu_feb:DEBUG: Chip address: 0x6
10:51:44:ST3_emu_feb:DEBUG: Chip address: 0x7
10:51:44:febtest:INFO: Init all SMX (CSA): 30
10:51:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:51:59:febtest:INFO: 23-00 | XA-000-09-004-016-016-021-00 | 12.4 | 1206.9
10:51:59:febtest:INFO: 30-01 | XA-000-09-004-016-010-024-03 | 28.2 | 1135.9
10:51:59:febtest:INFO: 21-02 | XA-000-09-004-016-007-023-04 | 28.2 | 1159.7
10:51:59:febtest:INFO: 28-03 | XA-000-09-004-016-014-003-02 | 47.3 | 1076.3
10:51:59:febtest:INFO: 19-04 | XA-000-09-004-016-010-027-03 | 31.4 | 1147.8
10:52:00:febtest:INFO: 26-05 | XA-000-09-004-016-013-026-11 | 12.4 | 1189.2
10:52:00:febtest:INFO: 17-06 | XA-000-09-004-016-011-002-09 | 40.9 | 1118.1
10:52:00:febtest:INFO: 24-07 | XA-000-09-004-016-004-023-10 | 25.1 | 1159.7
10:52:01:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:52:03:ST3_smx:INFO: chip: 23-0 12.438562 C 1224.468235 mV
10:52:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:03:ST3_smx:INFO: Electrons
10:52:08:ST3_smx:INFO: Total # of broken channels: 9
10:52:08:ST3_smx:INFO: List of broken channels: [7, 9, 13, 20, 35, 40, 65, 104, 126]
10:52:08:ST3_smx:INFO: Total # of broken channels: 0
10:52:08:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:52:09:ST3_smx:INFO: chip: 30-1 31.389742 C 1153.732915 mV
10:52:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:09:ST3_smx:INFO: Electrons
10:52:14:ST3_smx:INFO: Total # of broken channels: 9
10:52:14:ST3_smx:INFO: List of broken channels: [4, 33, 38, 53, 61, 96, 107, 109, 119]
10:52:14:ST3_smx:INFO: Total # of broken channels: 0
10:52:14:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:52:16:ST3_smx:INFO: chip: 21-2 28.225000 C 1177.390875 mV
10:52:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:16:ST3_smx:INFO: Electrons
10:52:21:ST3_smx:INFO: Total # of broken channels: 5
10:52:21:ST3_smx:INFO: List of broken channels: [19, 46, 69, 76, 98]
10:52:21:ST3_smx:INFO: Total # of broken channels: 0
10:52:21:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:52:22:ST3_smx:INFO: chip: 28-3 47.250730 C 1094.240115 mV
10:52:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:22:ST3_smx:INFO: Electrons
10:52:27:ST3_smx:INFO: Total # of broken channels: 3
10:52:27:ST3_smx:INFO: List of broken channels: [30, 62, 96]
10:52:27:ST3_smx:INFO: Total # of broken channels: 0
10:52:27:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:52:29:ST3_smx:INFO: chip: 19-4 31.389742 C 1165.571835 mV
10:52:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:29:ST3_smx:INFO: Electrons
10:52:34:ST3_smx:INFO: Total # of broken channels: 2
10:52:34:ST3_smx:INFO: List of broken channels: [59, 87]
10:52:34:ST3_smx:INFO: Total # of broken channels: 0
10:52:34:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:52:35:ST3_smx:INFO: chip: 26-5 12.438562 C 1206.851500 mV
10:52:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:35:ST3_smx:INFO: Electrons
10:52:40:ST3_smx:INFO: Total # of broken channels: 8
10:52:40:ST3_smx:INFO: List of broken channels: [4, 9, 19, 36, 68, 69, 84, 99]
10:52:40:ST3_smx:INFO: Total # of broken channels: 0
10:52:40:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:52:42:ST3_smx:INFO: chip: 17-6 40.898880 C 1129.995435 mV
10:52:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:42:ST3_smx:INFO: Electrons
10:52:47:ST3_smx:INFO: Total # of broken channels: 2
10:52:47:ST3_smx:INFO: List of broken channels: [73, 110]
10:52:47:ST3_smx:INFO: Total # of broken channels: 0
10:52:47:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:52:49:ST3_smx:INFO: chip: 24-7 25.062742 C 1177.390875 mV
10:52:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:49:ST3_smx:INFO: Electrons
10:52:53:ST3_smx:INFO: Total # of broken channels: 7
10:52:53:ST3_smx:INFO: List of broken channels: [7, 12, 15, 82, 85, 121, 126]
10:52:53:ST3_smx:INFO: Total # of broken channels: 0
10:52:53:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:52:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:52:54:febtest:INFO: 23-00 | XA-000-09-004-016-016-021-00 | 12.4 | 1247.9
10:52:54:febtest:INFO: 30-01 | XA-000-09-004-016-010-024-03 | 28.2 | 1177.4
10:52:54:febtest:INFO: 21-02 | XA-000-09-004-016-007-023-04 | 28.2 | 1201.0
10:52:54:febtest:INFO: 28-03 | XA-000-09-004-016-014-003-02 | 47.3 | 1112.1
10:52:55:febtest:INFO: 19-04 | XA-000-09-004-016-010-027-03 | 34.6 | 1195.1
10:52:55:febtest:INFO: 26-05 | XA-000-09-004-016-013-026-11 | 12.4 | 1230.3
10:52:55:febtest:INFO: 17-06 | XA-000-09-004-016-011-002-09 | 44.1 | 1153.7
10:52:55:febtest:INFO: 24-07 | XA-000-09-004-016-004-023-10 | 25.1 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_23-10_51_33
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2442| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4790', '1.848', '2.4710']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9910', '1.850', '2.4770']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9500', '1.850', '0.5119']