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FEB_2444 10.07.25 10:22:37
Info
10:22:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:22:37:ST3_Shared:INFO: FEB-Sensor
10:22:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:23:41:ST3_ModuleSelector:INFO: M0DL0T2001502A2
10:23:41:ST3_ModuleSelector:INFO: 13323
10:23:41:febtest:INFO: Testing FEB with SN 2444
==============================================OOO==============================================
10:23:43:smx_tester:INFO: Scanning setup
10:23:43:elinks:INFO: Disabling clock on downlink 0
10:23:43:elinks:INFO: Disabling clock on downlink 1
10:23:43:elinks:INFO: Disabling clock on downlink 2
10:23:43:elinks:INFO: Disabling clock on downlink 3
10:23:43:elinks:INFO: Disabling clock on downlink 4
10:23:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:23:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:23:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:23:43:elinks:INFO: Disabling clock on downlink 0
10:23:43:elinks:INFO: Disabling clock on downlink 1
10:23:43:elinks:INFO: Disabling clock on downlink 2
10:23:43:elinks:INFO: Disabling clock on downlink 3
10:23:43:elinks:INFO: Disabling clock on downlink 4
10:23:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:23:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:23:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:23:43:elinks:INFO: Disabling clock on downlink 0
10:23:43:elinks:INFO: Disabling clock on downlink 1
10:23:43:elinks:INFO: Disabling clock on downlink 2
10:23:43:elinks:INFO: Disabling clock on downlink 3
10:23:43:elinks:INFO: Disabling clock on downlink 4
10:23:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:23:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:23:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:23:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:23:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:23:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:23:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:23:44:elinks:INFO: Disabling clock on downlink 0
10:23:44:elinks:INFO: Disabling clock on downlink 1
10:23:44:elinks:INFO: Disabling clock on downlink 2
10:23:44:elinks:INFO: Disabling clock on downlink 3
10:23:44:elinks:INFO: Disabling clock on downlink 4
10:23:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:23:44:elinks:INFO: Disabling clock on downlink 0
10:23:44:elinks:INFO: Disabling clock on downlink 1
10:23:44:elinks:INFO: Disabling clock on downlink 2
10:23:44:elinks:INFO: Disabling clock on downlink 3
10:23:44:elinks:INFO: Disabling clock on downlink 4
10:23:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:23:44:setup_element:INFO: Scanning clock phase
10:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:23:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:23:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:23:44:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:23:44:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:23:44:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:23:44:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:23:44:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:23:44:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:23:44:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:23:44:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:23:44:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:44:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:44:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:44:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:44:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:44:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:44:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:23:44:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:23:44:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
10:23:44:setup_element:INFO: Scanning data phases
10:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:23:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:23:50:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:23:50:setup_element:INFO: Eye window for uplink 16: ____XXXXX_______________________________
Data delay found: 26
10:23:50:setup_element:INFO: Eye window for uplink 17: ___XXXX_________________________________
Data delay found: 24
10:23:50:setup_element:INFO: Eye window for uplink 18: XXXX__________________________________XX
Data delay found: 20
10:23:50:setup_element:INFO: Eye window for uplink 19: XXXXX_________________________________XX
Data delay found: 21
10:23:50:setup_element:INFO: Eye window for uplink 20: XXXXX__________________________________X
Data delay found: 21
10:23:50:setup_element:INFO: Eye window for uplink 21: XXXXXX__________________________________
Data delay found: 22
10:23:50:setup_element:INFO: Eye window for uplink 22: ___XXXXX________________________________
Data delay found: 25
10:23:50:setup_element:INFO: Eye window for uplink 23: _XXXXX__________________________________
Data delay found: 23
10:23:50:setup_element:INFO: Eye window for uplink 24: _______________XXXXXX___________________
Data delay found: 37
10:23:50:setup_element:INFO: Eye window for uplink 25: ________________XXXXX___________________
Data delay found: 38
10:23:50:setup_element:INFO: Eye window for uplink 26: ________________XXXXXX__________________
Data delay found: 38
10:23:50:setup_element:INFO: Eye window for uplink 27: _________________XXXXXX_________________
Data delay found: 39
10:23:50:setup_element:INFO: Eye window for uplink 28: ____________________XXXXX_______________
Data delay found: 2
10:23:50:setup_element:INFO: Eye window for uplink 29: ____________________XXXXX_______________
Data delay found: 2
10:23:50:setup_element:INFO: Eye window for uplink 30: _____________________XXXXXXX____________
Data delay found: 4
10:23:50:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXXXX_____________
Data delay found: 2
10:23:50:setup_element:INFO: Setting the data phase to 26 for uplink 16
10:23:50:setup_element:INFO: Setting the data phase to 24 for uplink 17
10:23:50:setup_element:INFO: Setting the data phase to 20 for uplink 18
10:23:50:setup_element:INFO: Setting the data phase to 21 for uplink 19
10:23:50:setup_element:INFO: Setting the data phase to 21 for uplink 20
10:23:50:setup_element:INFO: Setting the data phase to 22 for uplink 21
10:23:50:setup_element:INFO: Setting the data phase to 25 for uplink 22
10:23:50:setup_element:INFO: Setting the data phase to 23 for uplink 23
10:23:50:setup_element:INFO: Setting the data phase to 37 for uplink 24
10:23:50:setup_element:INFO: Setting the data phase to 38 for uplink 25
10:23:50:setup_element:INFO: Setting the data phase to 38 for uplink 26
10:23:50:setup_element:INFO: Setting the data phase to 39 for uplink 27
10:23:50:setup_element:INFO: Setting the data phase to 2 for uplink 28
10:23:50:setup_element:INFO: Setting the data phase to 2 for uplink 29
10:23:50:setup_element:INFO: Setting the data phase to 4 for uplink 30
10:23:50:setup_element:INFO: Setting the data phase to 2 for uplink 31
==============================================OOO==============================================
10:23:50:setup_element:INFO: Beginning SMX ASICs map scan
10:23:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:23:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:23:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:23:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:23:50:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:23:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:23:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:23:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:23:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:23:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:23:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:23:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:23:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:23:51:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:23:51:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:23:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:23:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:23:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:23:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:23:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:23:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:23:52:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXX_
Uplink 17: _______________________________________________________________________XXXXXXXX_
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: ________________________________________________________________________XXXXXX__
Uplink 31: ________________________________________________________________________XXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 17:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 18:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 19:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 20:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 21:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 22:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 23:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 24:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 25:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 26:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 27:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 28:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 29:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 30:
Optimal Phase: 4
Window Length: 33
Eye Window: _____________________XXXXXXX____________
Uplink 31:
Optimal Phase: 2
Window Length: 32
Eye Window: ___________________XXXXXXXX_____________
==============================================OOO==============================================
10:23:52:setup_element:INFO: Performing Elink synchronization
10:23:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:23:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:23:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:23:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:23:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:23:52:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:23:53:ST3_emu_feb:DEBUG: Chip address: 0x0
10:23:53:ST3_emu_feb:DEBUG: Chip address: 0x1
10:23:53:ST3_emu_feb:DEBUG: Chip address: 0x2
10:23:53:ST3_emu_feb:DEBUG: Chip address: 0x3
10:23:53:ST3_emu_feb:DEBUG: Chip address: 0x4
10:23:53:ST3_emu_feb:DEBUG: Chip address: 0x5
10:23:53:ST3_emu_feb:DEBUG: Chip address: 0x6
10:23:53:ST3_emu_feb:DEBUG: Chip address: 0x7
10:23:53:febtest:INFO: Init all SMX (CSA): 30
10:24:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:24:08:febtest:INFO: 23-00 | XA-000-09-004-015-003-007-15 | 28.2 | 1183.3
10:24:08:febtest:INFO: 30-01 | XA-000-09-004-015-011-027-04 | 15.6 | 1206.9
10:24:08:febtest:INFO: 21-02 | XA-000-09-004-015-009-006-00 | 31.4 | 1147.8
10:24:09:febtest:INFO: 28-03 | XA-000-09-004-015-012-004-11 | 40.9 | 1124.0
10:24:09:febtest:INFO: 19-04 | XA-000-09-004-015-012-006-11 | 37.7 | 1130.0
10:24:09:febtest:INFO: 26-05 | XA-000-09-004-015-009-004-00 | 31.4 | 1147.8
10:24:09:febtest:INFO: 17-06 | XA-000-09-004-015-003-008-15 | 28.2 | 1147.8
10:24:09:febtest:INFO: 24-07 | XA-000-09-004-015-011-026-04 | 31.4 | 1147.8
10:24:10:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:24:13:ST3_smx:INFO: chip: 23-0 28.225000 C 1200.969315 mV
10:24:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:13:ST3_smx:INFO: Electrons
10:24:19:ST3_smx:INFO: Total # of broken channels: 8
10:24:19:ST3_smx:INFO: List of broken channels: [26, 40, 42, 62, 70, 74, 119, 122]
10:24:19:ST3_smx:INFO: Total # of broken channels: 7
10:24:19:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:24:21:ST3_smx:INFO: chip: 30-1 15.590880 C 1218.600960 mV
10:24:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:21:ST3_smx:INFO: Electrons
10:24:28:ST3_smx:INFO: Total # of broken channels: 7
10:24:28:ST3_smx:INFO: List of broken channels: [23, 24, 26, 68, 78, 96, 124]
10:24:28:ST3_smx:INFO: Total # of broken channels: 0
10:24:28:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:24:30:ST3_smx:INFO: chip: 21-2 31.389742 C 1159.654860 mV
10:24:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:30:ST3_smx:INFO: Electrons
10:24:37:ST3_smx:INFO: Total # of broken channels: 3
10:24:37:ST3_smx:INFO: List of broken channels: [10, 84, 100]
10:24:37:ST3_smx:INFO: Total # of broken channels: 0
10:24:37:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:24:39:ST3_smx:INFO: chip: 28-3 40.898880 C 1141.874115 mV
10:24:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:39:ST3_smx:INFO: Electrons
10:24:45:ST3_smx:INFO: Total # of broken channels: 12
10:24:45:ST3_smx:INFO: List of broken channels: [4, 32, 35, 40, 43, 48, 50, 62, 70, 85, 102, 113]
10:24:45:ST3_smx:INFO: Total # of broken channels: 0
10:24:45:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:24:47:ST3_smx:INFO: chip: 19-4 37.726682 C 1141.874115 mV
10:24:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:47:ST3_smx:INFO: Electrons
10:24:54:ST3_smx:INFO: Total # of broken channels: 3
10:24:54:ST3_smx:INFO: List of broken channels: [6, 27, 72]
10:24:54:ST3_smx:INFO: Total # of broken channels: 0
10:24:54:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:24:56:ST3_smx:INFO: chip: 26-5 31.389742 C 1159.654860 mV
10:24:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:24:56:ST3_smx:INFO: Electrons
10:25:02:ST3_smx:INFO: Total # of broken channels: 7
10:25:02:ST3_smx:INFO: List of broken channels: [24, 41, 51, 72, 84, 88, 110]
10:25:02:ST3_smx:INFO: Total # of broken channels: 0
10:25:02:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:25:04:ST3_smx:INFO: chip: 17-6 28.225000 C 1159.654860 mV
10:25:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:04:ST3_smx:INFO: Electrons
10:25:11:ST3_smx:INFO: Total # of broken channels: 7
10:25:11:ST3_smx:INFO: List of broken channels: [15, 20, 36, 47, 51, 120, 122]
10:25:11:ST3_smx:INFO: Total # of broken channels: 2
10:25:11:ST3_smx:INFO: List of broken channels: [15, 120]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:25:13:ST3_smx:INFO: chip: 24-7 31.389742 C 1159.654860 mV
10:25:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:13:ST3_smx:INFO: Electrons
10:25:19:ST3_smx:INFO: Total # of broken channels: 8
10:25:19:ST3_smx:INFO: List of broken channels: [5, 15, 41, 47, 78, 88, 93, 103]
10:25:19:ST3_smx:INFO: Total # of broken channels: 0
10:25:19:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:25:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:25:20:febtest:INFO: 23-00 | XA-000-09-004-015-003-007-15 | 25.1 | 1247.9
10:25:20:febtest:INFO: 30-01 | XA-000-09-004-015-011-027-04 | 18.7 | 1236.2
10:25:20:febtest:INFO: 21-02 | XA-000-09-004-015-009-006-00 | 34.6 | 1183.3
10:25:20:febtest:INFO: 28-03 | XA-000-09-004-015-012-004-11 | 44.1 | 1153.7
10:25:21:febtest:INFO: 19-04 | XA-000-09-004-015-012-006-11 | 40.9 | 1159.7
10:25:21:febtest:INFO: 26-05 | XA-000-09-004-015-009-004-00 | 34.6 | 1183.3
10:25:21:febtest:INFO: 17-06 | XA-000-09-004-015-003-008-15 | 31.4 | 1183.3
10:25:21:febtest:INFO: 24-07 | XA-000-09-004-015-011-026-04 | 31.4 | 1183.3
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_07_10-10_22_37
OPERATOR : Dennis P.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2444| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 13323 | SIZE: 62x62 | GRADE: A
MODULE_NAME: M0DL0T2001502A2
LADDER_NAME: L0DL000150
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9840', '1.848', '2.1940']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0500', '1.849', '2.6190']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9940', '1.850', '0.5316']