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FEB_2445 03.07.25 14:23:16
Info
14:23:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:23:16:ST3_Shared:INFO: FEB-Microcable
14:23:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:23:16:febtest:INFO: Testing FEB with SN 2445
==============================================OOO==============================================
14:23:18:smx_tester:INFO: Scanning setup
14:23:18:elinks:INFO: Disabling clock on downlink 0
14:23:18:elinks:INFO: Disabling clock on downlink 1
14:23:18:elinks:INFO: Disabling clock on downlink 2
14:23:18:elinks:INFO: Disabling clock on downlink 3
14:23:18:elinks:INFO: Disabling clock on downlink 4
14:23:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:23:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:23:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:23:18:elinks:INFO: Disabling clock on downlink 0
14:23:18:elinks:INFO: Disabling clock on downlink 1
14:23:18:elinks:INFO: Disabling clock on downlink 2
14:23:18:elinks:INFO: Disabling clock on downlink 3
14:23:18:elinks:INFO: Disabling clock on downlink 4
14:23:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:23:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:23:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:23:18:elinks:INFO: Disabling clock on downlink 0
14:23:18:elinks:INFO: Disabling clock on downlink 1
14:23:18:elinks:INFO: Disabling clock on downlink 2
14:23:18:elinks:INFO: Disabling clock on downlink 3
14:23:18:elinks:INFO: Disabling clock on downlink 4
14:23:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:23:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:23:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:23:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:23:18:elinks:INFO: Disabling clock on downlink 0
14:23:18:elinks:INFO: Disabling clock on downlink 1
14:23:18:elinks:INFO: Disabling clock on downlink 2
14:23:18:elinks:INFO: Disabling clock on downlink 3
14:23:18:elinks:INFO: Disabling clock on downlink 4
14:23:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:23:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:23:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:23:18:elinks:INFO: Disabling clock on downlink 0
14:23:18:elinks:INFO: Disabling clock on downlink 1
14:23:18:elinks:INFO: Disabling clock on downlink 2
14:23:18:elinks:INFO: Disabling clock on downlink 3
14:23:18:elinks:INFO: Disabling clock on downlink 4
14:23:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:23:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:23:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:23:19:setup_element:INFO: Scanning clock phase
14:23:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:23:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:23:19:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:23:19:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:23:19:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:23:19:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:23:19:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:23:19:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:23:19:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:23:19:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:23:19:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:23:19:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:23:19:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:23:19:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:23:19:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:23:19:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:23:19:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:23:19:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:23:19:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:23:19:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
14:23:19:setup_element:INFO: Scanning data phases
14:23:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:23:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:23:24:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:23:24:setup_element:INFO: Eye window for uplink 16: __XXXXXX________________________________
Data delay found: 24
14:23:24:setup_element:INFO: Eye window for uplink 17: XXXXX___________________________________
Data delay found: 22
14:23:24:setup_element:INFO: Eye window for uplink 18: ___XXXXX________________________________
Data delay found: 25
14:23:24:setup_element:INFO: Eye window for uplink 19: ____XXXX________________________________
Data delay found: 25
14:23:24:setup_element:INFO: Eye window for uplink 20: __XXXXX_________________________________
Data delay found: 24
14:23:24:setup_element:INFO: Eye window for uplink 21: ___XXXXX________________________________
Data delay found: 25
14:23:24:setup_element:INFO: Eye window for uplink 22: _XXXXX__________________________________
Data delay found: 23
14:23:24:setup_element:INFO: Eye window for uplink 23: XXXX___________________________________X
Data delay found: 21
14:23:24:setup_element:INFO: Eye window for uplink 24: __________XXXXXX________________________
Data delay found: 32
14:23:24:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
14:23:24:setup_element:INFO: Eye window for uplink 26: _______________XXXXXX___________________
Data delay found: 37
14:23:24:setup_element:INFO: Eye window for uplink 27: _________________XXXXX__________________
Data delay found: 39
14:23:24:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXX_______________
Data delay found: 1
14:23:24:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________
Data delay found: 1
14:23:24:setup_element:INFO: Eye window for uplink 30: ______________________XXXXX_____________
Data delay found: 4
14:23:24:setup_element:INFO: Eye window for uplink 31: ___________________X_XXXXX______________
Data delay found: 2
14:23:24:setup_element:INFO: Setting the data phase to 24 for uplink 16
14:23:24:setup_element:INFO: Setting the data phase to 22 for uplink 17
14:23:24:setup_element:INFO: Setting the data phase to 25 for uplink 18
14:23:24:setup_element:INFO: Setting the data phase to 25 for uplink 19
14:23:24:setup_element:INFO: Setting the data phase to 24 for uplink 20
14:23:24:setup_element:INFO: Setting the data phase to 25 for uplink 21
14:23:24:setup_element:INFO: Setting the data phase to 23 for uplink 22
14:23:24:setup_element:INFO: Setting the data phase to 21 for uplink 23
14:23:24:setup_element:INFO: Setting the data phase to 32 for uplink 24
14:23:24:setup_element:INFO: Setting the data phase to 34 for uplink 25
14:23:24:setup_element:INFO: Setting the data phase to 37 for uplink 26
14:23:24:setup_element:INFO: Setting the data phase to 39 for uplink 27
14:23:24:setup_element:INFO: Setting the data phase to 1 for uplink 28
14:23:24:setup_element:INFO: Setting the data phase to 1 for uplink 29
14:23:24:setup_element:INFO: Setting the data phase to 4 for uplink 30
14:23:24:setup_element:INFO: Setting the data phase to 2 for uplink 31
==============================================OOO==============================================
14:23:24:setup_element:INFO: Beginning SMX ASICs map scan
14:23:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:23:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:23:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:23:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:23:24:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:23:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:23:25:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:23:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:23:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:23:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:23:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:23:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:23:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:23:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:23:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:23:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:23:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:23:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:23:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:23:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:23:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:23:27:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXX___
Uplink 17: ______________________________________________________________________XXXXXXX___
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: ____________________________________________________________________XXXXXXXXX___
Uplink 21: ____________________________________________________________________XXXXXXXXX___
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: ____________________________________________________________________XXXXXXXX____
Uplink 25: ____________________________________________________________________XXXXXXXX____
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: _____________________________________________________________________XXXXXXXXX__
Uplink 29: _____________________________________________________________________XXXXXXXXX__
Uplink 30: _______________________________________________________________________XXXXXXX__
Uplink 31: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 17:
Optimal Phase: 22
Window Length: 35
Eye Window: XXXXX___________________________________
Uplink 18:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 19:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
Uplink 20:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 21:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 22:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 23:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 24:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 25:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 26:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 27:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 28:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 29:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 30:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 31:
Optimal Phase: 2
Window Length: 33
Eye Window: ___________________X_XXXXX______________
==============================================OOO==============================================
14:23:27:setup_element:INFO: Performing Elink synchronization
14:23:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:23:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:23:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:23:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
14:23:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:23:27:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:23:28:ST3_emu_feb:DEBUG: Chip address: 0x0
14:23:28:ST3_emu_feb:DEBUG: Chip address: 0x1
14:23:28:ST3_emu_feb:DEBUG: Chip address: 0x2
14:23:28:ST3_emu_feb:DEBUG: Chip address: 0x3
14:23:28:ST3_emu_feb:DEBUG: Chip address: 0x4
14:23:28:ST3_emu_feb:DEBUG: Chip address: 0x5
14:23:28:ST3_emu_feb:DEBUG: Chip address: 0x6
14:23:28:ST3_emu_feb:DEBUG: Chip address: 0x7
14:23:28:febtest:INFO: Init all SMX (CSA): 30
14:23:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:23:43:febtest:INFO: 23-00 | XA-000-09-004-016-012-014-01 | 31.4 | 1177.4
14:23:43:febtest:INFO: 30-01 | XA-000-09-004-016-003-012-05 | 28.2 | 1195.1
14:23:43:febtest:INFO: 21-02 | XA-000-09-004-016-012-013-01 | 40.9 | 1147.8
14:23:43:febtest:INFO: 28-03 | XA-000-09-004-016-015-013-15 | 40.9 | 1153.7
14:23:44:febtest:INFO: 19-04 | XA-000-09-004-016-003-013-05 | 40.9 | 1165.6
14:23:44:febtest:INFO: 26-05 | XA-000-09-004-016-015-014-15 | 25.1 | 1206.9
14:23:44:febtest:INFO: 17-06 | XA-000-09-004-016-009-014-10 | 40.9 | 1165.6
14:23:44:febtest:INFO: 24-07 | XA-000-09-004-016-006-012-14 | 34.6 | 1177.4
14:23:45:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:23:47:ST3_smx:INFO: chip: 23-0 34.556970 C 1189.190035 mV
14:23:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:47:ST3_smx:INFO: Electrons
14:23:52:ST3_smx:INFO: Total # of broken channels: 4
14:23:52:ST3_smx:INFO: List of broken channels: [1, 21, 46, 118]
14:23:52:ST3_smx:INFO: Total # of broken channels: 0
14:23:52:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:23:54:ST3_smx:INFO: chip: 30-1 28.225000 C 1212.728715 mV
14:23:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:54:ST3_smx:INFO: Electrons
14:23:59:ST3_smx:INFO: Total # of broken channels: 6
14:23:59:ST3_smx:INFO: List of broken channels: [22, 37, 72, 73, 83, 121]
14:23:59:ST3_smx:INFO: Total # of broken channels: 0
14:23:59:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:24:01:ST3_smx:INFO: chip: 21-2 40.898880 C 1153.732915 mV
14:24:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:01:ST3_smx:INFO: Electrons
14:24:05:ST3_smx:INFO: Total # of broken channels: 5
14:24:05:ST3_smx:INFO: List of broken channels: [2, 76, 84, 90, 109]
14:24:05:ST3_smx:INFO: Total # of broken channels: 0
14:24:05:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:24:07:ST3_smx:INFO: chip: 28-3 40.898880 C 1159.654860 mV
14:24:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:07:ST3_smx:INFO: Electrons
14:24:12:ST3_smx:INFO: Total # of broken channels: 3
14:24:12:ST3_smx:INFO: List of broken channels: [40, 46, 56]
14:24:12:ST3_smx:INFO: Total # of broken channels: 0
14:24:12:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:24:14:ST3_smx:INFO: chip: 19-4 40.898880 C 1165.571835 mV
14:24:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:14:ST3_smx:INFO: Electrons
14:24:18:ST3_smx:INFO: Total # of broken channels: 7
14:24:18:ST3_smx:INFO: List of broken channels: [14, 36, 39, 61, 68, 113, 119]
14:24:18:ST3_smx:INFO: Total # of broken channels: 0
14:24:18:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:24:20:ST3_smx:INFO: chip: 26-5 28.225000 C 1206.851500 mV
14:24:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:20:ST3_smx:INFO: Electrons
14:24:25:ST3_smx:INFO: Total # of broken channels: 8
14:24:25:ST3_smx:INFO: List of broken channels: [2, 6, 12, 24, 27, 41, 56, 87]
14:24:25:ST3_smx:INFO: Total # of broken channels: 2
14:24:25:ST3_smx:INFO: List of broken channels: [13, 98]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:24:27:ST3_smx:INFO: chip: 17-6 40.898880 C 1165.571835 mV
14:24:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:27:ST3_smx:INFO: Electrons
14:24:31:ST3_smx:INFO: Total # of broken channels: 8
14:24:31:ST3_smx:INFO: List of broken channels: [9, 10, 14, 17, 21, 42, 69, 107]
14:24:31:ST3_smx:INFO: Total # of broken channels: 0
14:24:31:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:24:33:ST3_smx:INFO: chip: 24-7 37.726682 C 1183.292940 mV
14:24:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:33:ST3_smx:INFO: Electrons
14:24:38:ST3_smx:INFO: Total # of broken channels: 7
14:24:38:ST3_smx:INFO: List of broken channels: [1, 24, 32, 34, 56, 98, 103]
14:24:38:ST3_smx:INFO: Total # of broken channels: 0
14:24:38:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:24:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:24:39:febtest:INFO: 23-00 | XA-000-09-004-016-012-014-01 | 34.6 | 1201.0
14:24:39:febtest:INFO: 30-01 | XA-000-09-004-016-003-012-05 | 28.2 | 1224.5
14:24:39:febtest:INFO: 21-02 | XA-000-09-004-016-012-013-01 | 44.1 | 1177.4
14:24:39:febtest:INFO: 28-03 | XA-000-09-004-016-015-013-15 | 44.1 | 1171.5
14:24:40:febtest:INFO: 19-04 | XA-000-09-004-016-003-013-05 | 44.1 | 1183.3
14:24:40:febtest:INFO: 26-05 | XA-000-09-004-016-015-014-15 | 28.2 | 1230.3
14:24:40:febtest:INFO: 17-06 | XA-000-09-004-016-009-014-10 | 44.1 | 1183.3
14:24:40:febtest:INFO: 24-07 | XA-000-09-004-016-006-012-14 | 40.9 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_03-14_23_16
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2445| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4750', '1.847', '2.6520']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9710', '1.850', '2.5530']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9690', '1.850', '0.5281']