
FEB_2446 17.07.25 10:16:55
TextEdit.txt
10:16:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:16:55:ST3_Shared:INFO: FEB-Microcable 10:16:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:16:55:febtest:INFO: Testing FEB with SN 2446 ==============================================OOO============================================== 10:16:57:smx_tester:INFO: Scanning setup 10:16:57:elinks:INFO: Disabling clock on downlink 0 10:16:57:elinks:INFO: Disabling clock on downlink 1 10:16:57:elinks:INFO: Disabling clock on downlink 2 10:16:57:elinks:INFO: Disabling clock on downlink 3 10:16:57:elinks:INFO: Disabling clock on downlink 4 10:16:57:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:16:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:16:57:elinks:INFO: Disabling clock on downlink 0 10:16:57:elinks:INFO: Disabling clock on downlink 1 10:16:57:elinks:INFO: Disabling clock on downlink 2 10:16:57:elinks:INFO: Disabling clock on downlink 3 10:16:57:elinks:INFO: Disabling clock on downlink 4 10:16:57:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:16:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:16:57:elinks:INFO: Disabling clock on downlink 0 10:16:57:elinks:INFO: Disabling clock on downlink 1 10:16:57:elinks:INFO: Disabling clock on downlink 2 10:16:57:elinks:INFO: Disabling clock on downlink 3 10:16:57:elinks:INFO: Disabling clock on downlink 4 10:16:57:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:16:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:16:57:elinks:INFO: Disabling clock on downlink 0 10:16:57:elinks:INFO: Disabling clock on downlink 1 10:16:57:elinks:INFO: Disabling clock on downlink 2 10:16:57:elinks:INFO: Disabling clock on downlink 3 10:16:57:elinks:INFO: Disabling clock on downlink 4 10:16:57:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:16:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:16:58:elinks:INFO: Disabling clock on downlink 0 10:16:58:elinks:INFO: Disabling clock on downlink 1 10:16:58:elinks:INFO: Disabling clock on downlink 2 10:16:58:elinks:INFO: Disabling clock on downlink 3 10:16:58:elinks:INFO: Disabling clock on downlink 4 10:16:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:16:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:16:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 10:16:58:setup_element:INFO: Scanning clock phase 10:16:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:16:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:16:58:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:16:58:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:16:58:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:16:58:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 10:16:58:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 10:16:58:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 10:16:58:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 10:16:58:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:16:58:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:16:58:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:16:58:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:16:58:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:16:58:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:16:58:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 10:16:58:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 10:16:58:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 10:16:58:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 10:16:58:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 ==============================================OOO============================================== 10:16:58:setup_element:INFO: Scanning data phases 10:16:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:16:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:17:04:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:17:04:setup_element:INFO: Eye window for uplink 16: ___XXXXX________________________________ Data delay found: 25 10:17:04:setup_element:INFO: Eye window for uplink 17: _XXXXX__________________________________ Data delay found: 23 10:17:04:setup_element:INFO: Eye window for uplink 18: _XXXXXX_________________________________ Data delay found: 23 10:17:04:setup_element:INFO: Eye window for uplink 19: __XXXXXX________________________________ Data delay found: 24 10:17:04:setup_element:INFO: Eye window for uplink 20: XXXX___________________________________X Data delay found: 21 10:17:04:setup_element:INFO: Eye window for uplink 21: XXXXX__________________________________X Data delay found: 21 10:17:04:setup_element:INFO: Eye window for uplink 22: ___XXXXX________________________________ Data delay found: 25 10:17:04:setup_element:INFO: Eye window for uplink 23: __XXXX__________________________________ Data delay found: 23 10:17:04:setup_element:INFO: Eye window for uplink 24: ___________XXXXXX_______________________ Data delay found: 33 10:17:04:setup_element:INFO: Eye window for uplink 25: _____________XXXXXX_____________________ Data delay found: 35 10:17:04:setup_element:INFO: Eye window for uplink 26: _______________XXXXXX___________________ Data delay found: 37 10:17:04:setup_element:INFO: Eye window for uplink 27: ________________XXXXXXX_________________ Data delay found: 39 10:17:04:setup_element:INFO: Eye window for uplink 28: _________________XXXXX__________________ Data delay found: 39 10:17:04:setup_element:INFO: Eye window for uplink 29: _________________XXXXX__________________ Data delay found: 39 10:17:04:setup_element:INFO: Eye window for uplink 30: ______________________XXXXXX____________ Data delay found: 4 10:17:04:setup_element:INFO: Eye window for uplink 31: _____________________XXXXX______________ Data delay found: 3 10:17:04:setup_element:INFO: Setting the data phase to 25 for uplink 16 10:17:04:setup_element:INFO: Setting the data phase to 23 for uplink 17 10:17:04:setup_element:INFO: Setting the data phase to 23 for uplink 18 10:17:04:setup_element:INFO: Setting the data phase to 24 for uplink 19 10:17:04:setup_element:INFO: Setting the data phase to 21 for uplink 20 10:17:04:setup_element:INFO: Setting the data phase to 21 for uplink 21 10:17:04:setup_element:INFO: Setting the data phase to 25 for uplink 22 10:17:04:setup_element:INFO: Setting the data phase to 23 for uplink 23 10:17:04:setup_element:INFO: Setting the data phase to 33 for uplink 24 10:17:04:setup_element:INFO: Setting the data phase to 35 for uplink 25 10:17:04:setup_element:INFO: Setting the data phase to 37 for uplink 26 10:17:04:setup_element:INFO: Setting the data phase to 39 for uplink 27 10:17:04:setup_element:INFO: Setting the data phase to 39 for uplink 28 10:17:04:setup_element:INFO: Setting the data phase to 39 for uplink 29 10:17:04:setup_element:INFO: Setting the data phase to 4 for uplink 30 10:17:04:setup_element:INFO: Setting the data phase to 3 for uplink 31 ==============================================OOO============================================== 10:17:04:setup_element:INFO: Beginning SMX ASICs map scan 10:17:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:17:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:17:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:17:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:17:04:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:17:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 10:17:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 10:17:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:17:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:17:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 10:17:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 10:17:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:17:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:17:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 10:17:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 10:17:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:17:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:17:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 10:17:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 10:17:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:17:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:17:06:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 69 Eye Windows: Uplink 16: ______________________________________________________________________XXXXXXXXX_ Uplink 17: ______________________________________________________________________XXXXXXXXX_ Uplink 18: _____________________________________________________________________XXXXXXXXX__ Uplink 19: _____________________________________________________________________XXXXXXXXX__ Uplink 20: ____________________________________________________________________XXXXXXXXX___ Uplink 21: ____________________________________________________________________XXXXXXXXX___ Uplink 22: ______________________________________________________________________XXXXXXXXX_ Uplink 23: ______________________________________________________________________XXXXXXXXX_ Uplink 24: _____________________________________________________________________XXXXXXXX___ Uplink 25: _____________________________________________________________________XXXXXXXX___ Uplink 26: _____________________________________________________________________XXXXXXXX___ Uplink 27: _____________________________________________________________________XXXXXXXX___ Uplink 28: ____________________________________________________________________XXXXXXXXX___ Uplink 29: ____________________________________________________________________XXXXXXXXX___ Uplink 30: _______________________________________________________________________XXXXXXX__ Uplink 31: _______________________________________________________________________XXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 17: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 18: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 19: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 20: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 21: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 22: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 23: Optimal Phase: 23 Window Length: 36 Eye Window: __XXXX__________________________________ Uplink 24: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 25: Optimal Phase: 35 Window Length: 34 Eye Window: _____________XXXXXX_____________________ Uplink 26: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 27: Optimal Phase: 39 Window Length: 33 Eye Window: ________________XXXXXXX_________________ Uplink 28: Optimal Phase: 39 Window Length: 35 Eye Window: _________________XXXXX__________________ Uplink 29: Optimal Phase: 39 Window Length: 35 Eye Window: _________________XXXXX__________________ Uplink 30: Optimal Phase: 4 Window Length: 34 Eye Window: ______________________XXXXXX____________ Uplink 31: Optimal Phase: 3 Window Length: 35 Eye Window: _____________________XXXXX______________ ==============================================OOO============================================== 10:17:06:setup_element:INFO: Performing Elink synchronization 10:17:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:17:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:17:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:17:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 10:17:07:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:17:07:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 10:17:07:ST3_emu_feb:DEBUG: Chip address: 0x0 10:17:07:ST3_emu_feb:DEBUG: Chip address: 0x1 10:17:07:ST3_emu_feb:DEBUG: Chip address: 0x2 10:17:07:ST3_emu_feb:DEBUG: Chip address: 0x3 10:17:07:ST3_emu_feb:DEBUG: Chip address: 0x4 10:17:07:ST3_emu_feb:DEBUG: Chip address: 0x5 10:17:07:ST3_emu_feb:DEBUG: Chip address: 0x6 10:17:07:ST3_emu_feb:DEBUG: Chip address: 0x7 10:17:07:febtest:INFO: Init all SMX (CSA): 30 10:17:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:17:23:febtest:INFO: 23-00 | XA-000-09-004-018-002-010-01 | 37.7 | 1159.7 10:17:23:febtest:INFO: 30-01 | XA-000-09-004-018-003-011-12 | 40.9 | 1141.9 10:17:23:febtest:INFO: 21-02 | XA-000-09-004-018-006-009-07 | 44.1 | 1141.9 10:17:23:febtest:INFO: 28-03 | XA-000-09-004-018-005-009-09 | 28.2 | 1183.3 10:17:23:febtest:INFO: 19-04 | XA-000-09-004-018-004-011-04 | 44.1 | 1153.7 10:17:24:febtest:INFO: 26-05 | XA-000-09-004-018-006-011-07 | 40.9 | 1147.8 10:17:24:febtest:INFO: 17-06 | XA-000-09-004-018-002-011-01 | 44.1 | 1147.8 10:17:24:febtest:INFO: 24-07 | XA-000-09-004-018-006-010-07 | 47.3 | 1135.9 10:17:25:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 10:17:27:ST3_smx:INFO: chip: 23-0 37.726682 C 1171.483840 mV 10:17:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:17:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:17:27:ST3_smx:INFO: Electrons 10:17:32:ST3_smx:INFO: Total # of broken channels: 7 10:17:32:ST3_smx:INFO: List of broken channels: [46, 58, 62, 85, 100, 109, 115] 10:17:32:ST3_smx:INFO: Total # of broken channels: 0 10:17:32:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:17:34:ST3_smx:INFO: chip: 30-1 40.898880 C 1159.654860 mV 10:17:34:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:17:34:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:17:34:ST3_smx:INFO: Electrons 10:17:38:ST3_smx:INFO: Total # of broken channels: 7 10:17:38:ST3_smx:INFO: List of broken channels: [13, 46, 50, 69, 84, 89, 104] 10:17:38:ST3_smx:INFO: Total # of broken channels: 1 10:17:38:ST3_smx:INFO: List of broken channels: [13] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:17:40:ST3_smx:INFO: chip: 21-2 44.073563 C 1153.732915 mV 10:17:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:17:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:17:40:ST3_smx:INFO: Electrons 10:17:45:ST3_smx:INFO: Total # of broken channels: 8 10:17:45:ST3_smx:INFO: List of broken channels: [4, 9, 24, 38, 41, 52, 76, 108] 10:17:45:ST3_smx:INFO: Total # of broken channels: 1 10:17:45:ST3_smx:INFO: List of broken channels: [9] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:17:47:ST3_smx:INFO: chip: 28-3 28.225000 C 1200.969315 mV 10:17:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:17:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:17:47:ST3_smx:INFO: Electrons 10:17:51:ST3_smx:INFO: Total # of broken channels: 11 10:17:51:ST3_smx:INFO: List of broken channels: [46, 55, 63, 66, 73, 79, 92, 93, 103, 119, 122] 10:17:51:ST3_smx:INFO: Total # of broken channels: 0 10:17:51:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:17:53:ST3_smx:INFO: chip: 19-4 44.073563 C 1165.571835 mV 10:17:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:17:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:17:53:ST3_smx:INFO: Electrons 10:17:58:ST3_smx:INFO: Total # of broken channels: 4 10:17:58:ST3_smx:INFO: List of broken channels: [0, 4, 23, 102] 10:17:58:ST3_smx:INFO: Total # of broken channels: 0 10:17:58:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:18:00:ST3_smx:INFO: chip: 26-5 40.898880 C 1165.571835 mV 10:18:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:18:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:18:00:ST3_smx:INFO: Electrons 10:18:04:ST3_smx:INFO: Total # of broken channels: 5 10:18:04:ST3_smx:INFO: List of broken channels: [9, 62, 66, 105, 121] 10:18:04:ST3_smx:INFO: Total # of broken channels: 1 10:18:04:ST3_smx:INFO: List of broken channels: [3] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:18:06:ST3_smx:INFO: chip: 17-6 47.250730 C 1159.654860 mV 10:18:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:18:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:18:06:ST3_smx:INFO: Electrons 10:18:11:ST3_smx:INFO: Total # of broken channels: 10 10:18:11:ST3_smx:INFO: List of broken channels: [13, 31, 37, 40, 69, 91, 95, 97, 113, 119] 10:18:11:ST3_smx:INFO: Total # of broken channels: 0 10:18:11:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:18:13:ST3_smx:INFO: chip: 24-7 47.250730 C 1147.806000 mV 10:18:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:18:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:18:13:ST3_smx:INFO: Electrons 10:18:18:ST3_smx:INFO: Total # of broken channels: 6 10:18:18:ST3_smx:INFO: List of broken channels: [9, 34, 45, 51, 64, 91] 10:18:18:ST3_smx:INFO: Total # of broken channels: 0 10:18:18:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:18:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:18:18:febtest:INFO: 23-00 | XA-000-09-004-018-002-010-01 | 40.9 | 1201.0 10:18:18:febtest:INFO: 30-01 | XA-000-09-004-018-003-011-12 | 40.9 | 1177.4 10:18:19:febtest:INFO: 21-02 | XA-000-09-004-018-006-009-07 | 44.1 | 1177.4 10:18:19:febtest:INFO: 28-03 | XA-000-09-004-018-005-009-09 | 28.2 | 1218.6 10:18:19:febtest:INFO: 19-04 | XA-000-09-004-018-004-011-04 | 44.1 | 1189.2 10:18:19:febtest:INFO: 26-05 | XA-000-09-004-018-006-011-07 | 40.9 | 1189.2 10:18:20:febtest:INFO: 17-06 | XA-000-09-004-018-002-011-01 | 47.3 | 1177.4 10:18:20:febtest:INFO: 24-07 | XA-000-09-004-018-006-010-07 | 47.3 | 1171.5 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_07_17-10_16_55 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2446| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4560', '1.847', '2.3570'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0270', '1.850', '2.5790'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9780', '1.850', '0.5238']