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FEB_2447 26.06.25 08:53:35
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08:53:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:53:35:ST3_Shared:INFO: FEB-Sensor
08:53:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:54:03:ST3_ModuleSelector:INFO: M0DL2T3001093A2
08:54:03:ST3_ModuleSelector:INFO: 27053
08:54:03:febtest:INFO: Testing FEB with SN 2447
==============================================OOO==============================================
08:54:05:smx_tester:INFO: Scanning setup
08:54:05:elinks:INFO: Disabling clock on downlink 0
08:54:05:elinks:INFO: Disabling clock on downlink 1
08:54:05:elinks:INFO: Disabling clock on downlink 2
08:54:05:elinks:INFO: Disabling clock on downlink 3
08:54:05:elinks:INFO: Disabling clock on downlink 4
08:54:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:54:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:05:elinks:INFO: Disabling clock on downlink 0
08:54:05:elinks:INFO: Disabling clock on downlink 1
08:54:05:elinks:INFO: Disabling clock on downlink 2
08:54:05:elinks:INFO: Disabling clock on downlink 3
08:54:05:elinks:INFO: Disabling clock on downlink 4
08:54:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:54:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:05:elinks:INFO: Disabling clock on downlink 0
08:54:05:elinks:INFO: Disabling clock on downlink 1
08:54:05:elinks:INFO: Disabling clock on downlink 2
08:54:05:elinks:INFO: Disabling clock on downlink 3
08:54:05:elinks:INFO: Disabling clock on downlink 4
08:54:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:54:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:54:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:05:elinks:INFO: Disabling clock on downlink 0
08:54:05:elinks:INFO: Disabling clock on downlink 1
08:54:05:elinks:INFO: Disabling clock on downlink 2
08:54:05:elinks:INFO: Disabling clock on downlink 3
08:54:05:elinks:INFO: Disabling clock on downlink 4
08:54:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:54:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:05:elinks:INFO: Disabling clock on downlink 0
08:54:05:elinks:INFO: Disabling clock on downlink 1
08:54:05:elinks:INFO: Disabling clock on downlink 2
08:54:05:elinks:INFO: Disabling clock on downlink 3
08:54:05:elinks:INFO: Disabling clock on downlink 4
08:54:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:54:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:54:06:setup_element:INFO: Scanning clock phase
08:54:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:06:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:54:06:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:54:06:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:54:06:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:54:06:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:54:06:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:54:06:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:54:06:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:54:06:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:54:06:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:54:06:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:54:06:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:54:06:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:54:06:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:54:06:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:54:06:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:54:06:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:54:06:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
08:54:06:setup_element:INFO: Scanning data phases
08:54:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:11:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:54:11:setup_element:INFO: Eye window for uplink 16: _XXXX___________________________________
Data delay found: 22
08:54:11:setup_element:INFO: Eye window for uplink 17: XXXX___________________________________X
Data delay found: 21
08:54:11:setup_element:INFO: Eye window for uplink 18: __XXXXX_________________________________
Data delay found: 24
08:54:11:setup_element:INFO: Eye window for uplink 19: __XXXXXX________________________________
Data delay found: 24
08:54:11:setup_element:INFO: Eye window for uplink 20: _XXXXX__________________________________
Data delay found: 23
08:54:11:setup_element:INFO: Eye window for uplink 21: _XXXXXX_________________________________
Data delay found: 23
08:54:11:setup_element:INFO: Eye window for uplink 22: XXXX__________________________________XX
Data delay found: 20
08:54:11:setup_element:INFO: Eye window for uplink 23: XX___________________________________XXX
Data delay found: 19
08:54:11:setup_element:INFO: Eye window for uplink 24: ____________XXXXXX______________________
Data delay found: 34
08:54:11:setup_element:INFO: Eye window for uplink 25: ______________XXXXX_____________________
Data delay found: 36
08:54:11:setup_element:INFO: Eye window for uplink 26: ________________XXXXXX__________________
Data delay found: 38
08:54:11:setup_element:INFO: Eye window for uplink 27: __________________XXXXXX________________
Data delay found: 0
08:54:11:setup_element:INFO: Eye window for uplink 28: __________________XXXXXX________________
Data delay found: 0
08:54:11:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
08:54:11:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXX______________
Data delay found: 2
08:54:11:setup_element:INFO: Eye window for uplink 31: __________________XXXXXX________________
Data delay found: 0
08:54:11:setup_element:INFO: Setting the data phase to 22 for uplink 16
08:54:11:setup_element:INFO: Setting the data phase to 21 for uplink 17
08:54:11:setup_element:INFO: Setting the data phase to 24 for uplink 18
08:54:11:setup_element:INFO: Setting the data phase to 24 for uplink 19
08:54:11:setup_element:INFO: Setting the data phase to 23 for uplink 20
08:54:11:setup_element:INFO: Setting the data phase to 23 for uplink 21
08:54:11:setup_element:INFO: Setting the data phase to 20 for uplink 22
08:54:11:setup_element:INFO: Setting the data phase to 19 for uplink 23
08:54:11:setup_element:INFO: Setting the data phase to 34 for uplink 24
08:54:11:setup_element:INFO: Setting the data phase to 36 for uplink 25
08:54:11:setup_element:INFO: Setting the data phase to 38 for uplink 26
08:54:11:setup_element:INFO: Setting the data phase to 0 for uplink 27
08:54:11:setup_element:INFO: Setting the data phase to 0 for uplink 28
08:54:11:setup_element:INFO: Setting the data phase to 0 for uplink 29
08:54:11:setup_element:INFO: Setting the data phase to 2 for uplink 30
08:54:11:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
08:54:11:setup_element:INFO: Beginning SMX ASICs map scan
08:54:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:54:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:54:11:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:54:11:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:54:11:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:54:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:54:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:54:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:54:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:54:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:54:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:54:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:54:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:54:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:54:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:54:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:54:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:54:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:54:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:54:14:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: _____________________________________________________________________XXXXXXXXX__
Uplink 19: _____________________________________________________________________XXXXXXXXX__
Uplink 20: _____________________________________________________________________XXXXXXX____
Uplink 21: _____________________________________________________________________XXXXXXX____
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: _____________________________________________________________________XXXXXXXXX__
Uplink 29: _____________________________________________________________________XXXXXXXXX__
Uplink 30: ______________________________________________________________________XXXXXXX___
Uplink 31: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 17:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 18:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 19:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 20:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 21:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 22:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 23:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 24:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 25:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 26:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 27:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 28:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 29:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 30:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 31:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
==============================================OOO==============================================
08:54:14:setup_element:INFO: Performing Elink synchronization
08:54:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:54:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
08:54:14:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:54:14:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:54:14:ST3_emu_feb:DEBUG: Chip address: 0x0
08:54:14:ST3_emu_feb:DEBUG: Chip address: 0x1
08:54:14:ST3_emu_feb:DEBUG: Chip address: 0x2
08:54:14:ST3_emu_feb:DEBUG: Chip address: 0x3
08:54:14:ST3_emu_feb:DEBUG: Chip address: 0x4
08:54:14:ST3_emu_feb:DEBUG: Chip address: 0x5
08:54:14:ST3_emu_feb:DEBUG: Chip address: 0x6
08:54:15:ST3_emu_feb:DEBUG: Chip address: 0x7
08:54:15:febtest:INFO: Init all SMX (CSA): 30
08:54:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:54:29:febtest:INFO: 23-00 | XA-000-09-004-016-007-006-03 | 21.9 | 1189.2
08:54:29:febtest:INFO: 30-01 | XA-000-09-004-016-010-003-04 | 21.9 | 1195.1
08:54:29:febtest:INFO: 21-02 | XA-000-09-004-016-010-007-04 | 15.6 | 1224.5
08:54:29:febtest:INFO: 28-03 | XA-000-09-004-016-013-003-12 | 25.1 | 1171.5
08:54:29:febtest:INFO: 19-04 | XA-000-09-004-016-007-005-03 | 31.4 | 1171.5
08:54:30:febtest:INFO: 26-05 | XA-000-09-004-016-010-002-04 | 21.9 | 1183.3
08:54:30:febtest:INFO: 17-06 | XA-000-09-004-016-004-006-13 | 15.6 | 1218.6
08:54:30:febtest:INFO: 24-07 | XA-000-09-004-016-007-007-03 | 18.7 | 1195.1
08:54:31:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:54:33:ST3_smx:INFO: chip: 23-0 25.062742 C 1200.969315 mV
08:54:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:33:ST3_smx:INFO: Electrons
08:54:40:ST3_smx:INFO: Total # of broken channels: 5
08:54:40:ST3_smx:INFO: List of broken channels: [19, 57, 63, 65, 125]
08:54:40:ST3_smx:INFO: Total # of broken channels: 0
08:54:40:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:54:42:ST3_smx:INFO: chip: 30-1 25.062742 C 1200.969315 mV
08:54:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:42:ST3_smx:INFO: Electrons
08:54:48:ST3_smx:INFO: Total # of broken channels: 6
08:54:48:ST3_smx:INFO: List of broken channels: [37, 41, 57, 91, 107, 121]
08:54:48:ST3_smx:INFO: Total # of broken channels: 0
08:54:48:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:54:50:ST3_smx:INFO: chip: 21-2 15.590880 C 1218.600960 mV
08:54:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:50:ST3_smx:INFO: Electrons
08:54:57:ST3_smx:INFO: Total # of broken channels: 2
08:54:57:ST3_smx:INFO: List of broken channels: [80, 119]
08:54:57:ST3_smx:INFO: Total # of broken channels: 0
08:54:57:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:54:59:ST3_smx:INFO: chip: 28-3 28.225000 C 1177.390875 mV
08:54:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:59:ST3_smx:INFO: Electrons
08:55:05:ST3_smx:INFO: Total # of broken channels: 7
08:55:05:ST3_smx:INFO: List of broken channels: [22, 50, 56, 62, 66, 92, 104]
08:55:05:ST3_smx:INFO: Total # of broken channels: 1
08:55:05:ST3_smx:INFO: List of broken channels: [56]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:07:ST3_smx:INFO: chip: 19-4 34.556970 C 1171.483840 mV
08:55:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:07:ST3_smx:INFO: Electrons
08:55:13:ST3_smx:INFO: Total # of broken channels: 5
08:55:13:ST3_smx:INFO: List of broken channels: [48, 68, 91, 116, 121]
08:55:13:ST3_smx:INFO: Total # of broken channels: 0
08:55:13:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:15:ST3_smx:INFO: chip: 26-5 28.225000 C 1189.190035 mV
08:55:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:15:ST3_smx:INFO: Electrons
08:55:22:ST3_smx:INFO: Total # of broken channels: 7
08:55:22:ST3_smx:INFO: List of broken channels: [4, 10, 42, 61, 62, 80, 112]
08:55:22:ST3_smx:INFO: Total # of broken channels: 0
08:55:22:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:24:ST3_smx:INFO: chip: 17-6 21.902970 C 1212.728715 mV
08:55:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:24:ST3_smx:INFO: Electrons
08:55:30:ST3_smx:INFO: Total # of broken channels: 5
08:55:30:ST3_smx:INFO: List of broken channels: [21, 35, 77, 81, 119]
08:55:30:ST3_smx:INFO: Total # of broken channels: 0
08:55:30:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:32:ST3_smx:INFO: chip: 24-7 25.062742 C 1189.190035 mV
08:55:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:55:32:ST3_smx:INFO: Electrons
08:55:39:ST3_smx:INFO: Total # of broken channels: 6
08:55:39:ST3_smx:INFO: List of broken channels: [8, 10, 43, 61, 85, 93]
08:55:39:ST3_smx:INFO: Total # of broken channels: 0
08:55:39:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:55:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:55:39:febtest:INFO: 23-00 | XA-000-09-004-016-007-006-03 | 31.4 | 1206.9
08:55:40:febtest:INFO: 30-01 | XA-000-09-004-016-010-003-04 | 28.2 | 1212.7
08:55:40:febtest:INFO: 21-02 | XA-000-09-004-016-010-007-04 | 21.9 | 1236.2
08:55:40:febtest:INFO: 28-03 | XA-000-09-004-016-013-003-12 | 31.4 | 1189.2
08:55:40:febtest:INFO: 19-04 | XA-000-09-004-016-007-005-03 | 37.7 | 1189.2
08:55:40:febtest:INFO: 26-05 | XA-000-09-004-016-010-002-04 | 28.2 | 1201.0
08:55:41:febtest:INFO: 17-06 | XA-000-09-004-016-004-006-13 | 25.1 | 1230.3
08:55:41:febtest:INFO: 24-07 | XA-000-09-004-016-007-007-03 | 28.2 | 1206.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_06_26-08_53_35
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2447| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 27053 | SIZE: 62x62 | GRADE: A
MODULE_NAME: M0DL2T3001093A2
LADDER_NAME: L0DL200109
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4000', '1.847', '2.6320']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9010', '1.850', '2.4810']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9330', '1.850', '0.5265']