
FEB_2450 16.06.25 10:23:00
TextEdit.txt
10:23:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:23:00:ST3_Shared:INFO: FEB-Microcable 10:23:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:23:00:febtest:INFO: Testing FEB with SN 2450 ==============================================OOO============================================== 10:23:01:smx_tester:INFO: Scanning setup 10:23:01:elinks:INFO: Disabling clock on downlink 0 10:23:01:elinks:INFO: Disabling clock on downlink 1 10:23:01:elinks:INFO: Disabling clock on downlink 2 10:23:01:elinks:INFO: Disabling clock on downlink 3 10:23:01:elinks:INFO: Disabling clock on downlink 4 10:23:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:23:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:23:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:23:02:elinks:INFO: Disabling clock on downlink 0 10:23:02:elinks:INFO: Disabling clock on downlink 1 10:23:02:elinks:INFO: Disabling clock on downlink 2 10:23:02:elinks:INFO: Disabling clock on downlink 3 10:23:02:elinks:INFO: Disabling clock on downlink 4 10:23:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:23:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:23:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:23:02:elinks:INFO: Disabling clock on downlink 0 10:23:02:elinks:INFO: Disabling clock on downlink 1 10:23:02:elinks:INFO: Disabling clock on downlink 2 10:23:02:elinks:INFO: Disabling clock on downlink 3 10:23:02:elinks:INFO: Disabling clock on downlink 4 10:23:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:23:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:23:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:23:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:23:02:elinks:INFO: Disabling clock on downlink 0 10:23:02:elinks:INFO: Disabling clock on downlink 1 10:23:02:elinks:INFO: Disabling clock on downlink 2 10:23:02:elinks:INFO: Disabling clock on downlink 3 10:23:02:elinks:INFO: Disabling clock on downlink 4 10:23:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:23:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:23:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:23:02:elinks:INFO: Disabling clock on downlink 0 10:23:02:elinks:INFO: Disabling clock on downlink 1 10:23:02:elinks:INFO: Disabling clock on downlink 2 10:23:02:elinks:INFO: Disabling clock on downlink 3 10:23:02:elinks:INFO: Disabling clock on downlink 4 10:23:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:23:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:23:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 10:23:02:setup_element:INFO: Scanning clock phase 10:23:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:23:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:23:02:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:23:02:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:23:02:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:23:02:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:23:02:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:23:02:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:23:02:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:23:02:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 10:23:02:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 10:23:02:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:23:02:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:23:02:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:23:02:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:23:02:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:23:02:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:23:02:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 10:23:02:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 10:23:02:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 ==============================================OOO============================================== 10:23:02:setup_element:INFO: Scanning data phases 10:23:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:23:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:23:08:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:23:08:setup_element:INFO: Eye window for uplink 16: ____XXXXXX______________________________ Data delay found: 26 10:23:08:setup_element:INFO: Eye window for uplink 17: __XXXXXX________________________________ Data delay found: 24 10:23:08:setup_element:INFO: Eye window for uplink 18: __XXXXXX________________________________ Data delay found: 24 10:23:08:setup_element:INFO: Eye window for uplink 19: __XXXXXXX_______________________________ Data delay found: 25 10:23:08:setup_element:INFO: Eye window for uplink 20: _XXXXXX_________________________________ Data delay found: 23 10:23:08:setup_element:INFO: Eye window for uplink 21: __XXXXXX________________________________ Data delay found: 24 10:23:08:setup_element:INFO: Eye window for uplink 22: XXXXXX_________________________________X Data delay found: 22 10:23:08:setup_element:INFO: Eye window for uplink 23: XXXX__________________________________XX Data delay found: 20 10:23:08:setup_element:INFO: Eye window for uplink 24: _____________XXXXX______________________ Data delay found: 35 10:23:08:setup_element:INFO: Eye window for uplink 25: _______________XXXXX____________________ Data delay found: 37 10:23:08:setup_element:INFO: Eye window for uplink 26: ________________XXXXXX__________________ Data delay found: 38 10:23:08:setup_element:INFO: Eye window for uplink 27: _________________XXXXXXX________________ Data delay found: 0 10:23:08:setup_element:INFO: Eye window for uplink 28: __________________XXXXX_________________ Data delay found: 0 10:23:08:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________ Data delay found: 39 10:23:08:setup_element:INFO: Eye window for uplink 30: _______________________XXXXXX___________ Data delay found: 5 10:23:08:setup_element:INFO: Eye window for uplink 31: _____________________XXXXXX_____________ Data delay found: 3 10:23:08:setup_element:INFO: Setting the data phase to 26 for uplink 16 10:23:08:setup_element:INFO: Setting the data phase to 24 for uplink 17 10:23:08:setup_element:INFO: Setting the data phase to 24 for uplink 18 10:23:08:setup_element:INFO: Setting the data phase to 25 for uplink 19 10:23:08:setup_element:INFO: Setting the data phase to 23 for uplink 20 10:23:08:setup_element:INFO: Setting the data phase to 24 for uplink 21 10:23:08:setup_element:INFO: Setting the data phase to 22 for uplink 22 10:23:08:setup_element:INFO: Setting the data phase to 20 for uplink 23 10:23:08:setup_element:INFO: Setting the data phase to 35 for uplink 24 10:23:08:setup_element:INFO: Setting the data phase to 37 for uplink 25 10:23:08:setup_element:INFO: Setting the data phase to 38 for uplink 26 10:23:08:setup_element:INFO: Setting the data phase to 0 for uplink 27 10:23:08:setup_element:INFO: Setting the data phase to 0 for uplink 28 10:23:08:setup_element:INFO: Setting the data phase to 39 for uplink 29 10:23:08:setup_element:INFO: Setting the data phase to 5 for uplink 30 10:23:08:setup_element:INFO: Setting the data phase to 3 for uplink 31 ==============================================OOO============================================== 10:23:08:setup_element:INFO: Beginning SMX ASICs map scan 10:23:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:23:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:23:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:23:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:23:08:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:23:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 10:23:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 10:23:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:23:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:23:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 10:23:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 10:23:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:23:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:23:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 10:23:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 10:23:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:23:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:23:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 10:23:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 10:23:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:23:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:23:11:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 16: _______________________________________________________________________XXXXXXXX_ Uplink 17: _______________________________________________________________________XXXXXXXX_ Uplink 18: ______________________________________________________________________XXXXXXXXX_ Uplink 19: ______________________________________________________________________XXXXXXXXX_ Uplink 20: _____________________________________________________________________XXXXXXXX___ Uplink 21: _____________________________________________________________________XXXXXXXX___ Uplink 22: _____________________________________________________________________XXXXXXXXX__ Uplink 23: _____________________________________________________________________XXXXXXXXX__ Uplink 24: _____________________________________________________________________XXXXXXXX___ Uplink 25: _____________________________________________________________________XXXXXXXX___ Uplink 26: _____________________________________________________________________XXXXXXXX___ Uplink 27: _____________________________________________________________________XXXXXXXX___ Uplink 28: _____________________________________________________________________XXXXXXXX___ Uplink 29: _____________________________________________________________________XXXXXXXX___ Uplink 30: ________________________________________________________________________XXXXXXX_ Uplink 31: ________________________________________________________________________XXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 17: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 18: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 19: Optimal Phase: 25 Window Length: 33 Eye Window: __XXXXXXX_______________________________ Uplink 20: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 21: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 22: Optimal Phase: 22 Window Length: 33 Eye Window: XXXXXX_________________________________X Uplink 23: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 24: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 25: Optimal Phase: 37 Window Length: 35 Eye Window: _______________XXXXX____________________ Uplink 26: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 27: Optimal Phase: 0 Window Length: 33 Eye Window: _________________XXXXXXX________________ Uplink 28: Optimal Phase: 0 Window Length: 35 Eye Window: __________________XXXXX_________________ Uplink 29: Optimal Phase: 39 Window Length: 34 Eye Window: _________________XXXXXX_________________ Uplink 30: Optimal Phase: 5 Window Length: 34 Eye Window: _______________________XXXXXX___________ Uplink 31: Optimal Phase: 3 Window Length: 34 Eye Window: _____________________XXXXXX_____________ ==============================================OOO============================================== 10:23:11:setup_element:INFO: Performing Elink synchronization 10:23:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:23:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:23:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:23:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 10:23:11:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:23:11:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 10:23:11:ST3_emu_feb:DEBUG: Chip address: 0x0 10:23:11:ST3_emu_feb:DEBUG: Chip address: 0x1 10:23:11:ST3_emu_feb:DEBUG: Chip address: 0x2 10:23:11:ST3_emu_feb:DEBUG: Chip address: 0x3 10:23:11:ST3_emu_feb:DEBUG: Chip address: 0x4 10:23:11:ST3_emu_feb:DEBUG: Chip address: 0x5 10:23:11:ST3_emu_feb:DEBUG: Chip address: 0x6 10:23:12:ST3_emu_feb:DEBUG: Chip address: 0x7 10:23:12:febtest:INFO: Init all SMX (CSA): 30 10:23:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:23:25:febtest:INFO: 23-00 | XA-000-09-004-011-004-006-12 | 28.2 | 1212.7 10:23:26:febtest:INFO: 30-01 | XA-000-09-004-009-003-019-10 | 37.7 | 1153.7 10:23:26:febtest:INFO: 21-02 | XA-000-09-004-011-013-003-13 | 37.7 | 1218.6 10:23:26:febtest:INFO: 28-03 | XA-000-09-004-009-003-012-13 | 44.1 | 1130.0 10:23:26:febtest:INFO: 19-04 | XA-000-09-004-011-010-002-05 | 37.7 | 1153.7 10:23:27:febtest:INFO: 26-05 | XA-000-09-004-011-007-005-02 | 31.4 | 1159.7 10:23:27:febtest:INFO: 17-06 | XA-000-09-004-015-009-026-07 | 37.7 | 1165.6 10:23:27:febtest:INFO: 24-07 | XA-000-09-004-009-003-014-13 | 37.7 | 1141.9 10:23:28:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 10:23:30:ST3_smx:INFO: chip: 23-0 28.225000 C 1265.400000 mV 10:23:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:23:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:23:30:ST3_smx:INFO: Electrons 10:23:35:ST3_smx:INFO: Total # of broken channels: 5 10:23:35:ST3_smx:INFO: List of broken channels: [1, 80, 94, 100, 117] 10:23:35:ST3_smx:INFO: Total # of broken channels: 0 10:23:35:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:23:37:ST3_smx:INFO: chip: 30-1 37.726682 C 1171.483840 mV 10:23:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:23:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:23:37:ST3_smx:INFO: Electrons 10:23:41:ST3_smx:INFO: Total # of broken channels: 11 10:23:41:ST3_smx:INFO: List of broken channels: [16, 19, 26, 28, 46, 67, 83, 84, 111, 119, 125] 10:23:41:ST3_smx:INFO: Total # of broken channels: 0 10:23:41:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:23:43:ST3_smx:INFO: chip: 21-2 37.726682 C 1259.567515 mV 10:23:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:23:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:23:43:ST3_smx:INFO: Electrons 10:23:48:ST3_smx:INFO: Total # of broken channels: 5 10:23:48:ST3_smx:INFO: List of broken channels: [22, 34, 36, 39, 108] 10:23:48:ST3_smx:INFO: Total # of broken channels: 0 10:23:48:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:23:50:ST3_smx:INFO: chip: 28-3 44.073563 C 1141.874115 mV 10:23:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:23:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:23:50:ST3_smx:INFO: Electrons 10:23:55:ST3_smx:INFO: Total # of broken channels: 7 10:23:55:ST3_smx:INFO: List of broken channels: [6, 23, 36, 76, 85, 87, 105] 10:23:55:ST3_smx:INFO: Total # of broken channels: 0 10:23:55:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:23:57:ST3_smx:INFO: chip: 19-4 37.726682 C 1165.571835 mV 10:23:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:23:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:23:57:ST3_smx:INFO: Electrons 10:24:02:ST3_smx:INFO: Total # of broken channels: 11 10:24:02:ST3_smx:INFO: List of broken channels: [8, 10, 26, 29, 44, 60, 83, 95, 99, 114, 125] 10:24:02:ST3_smx:INFO: Total # of broken channels: 0 10:24:02:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:24:03:ST3_smx:INFO: chip: 26-5 31.389742 C 1171.483840 mV 10:24:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:24:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:24:04:ST3_smx:INFO: Electrons 10:24:08:ST3_smx:INFO: Total # of broken channels: 8 10:24:08:ST3_smx:INFO: List of broken channels: [0, 16, 28, 42, 87, 104, 120, 122] 10:24:08:ST3_smx:INFO: Total # of broken channels: 0 10:24:08:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:24:10:ST3_smx:INFO: chip: 17-6 37.726682 C 1177.390875 mV 10:24:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:24:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:24:10:ST3_smx:INFO: Electrons 10:24:15:ST3_smx:INFO: Total # of broken channels: 5 10:24:15:ST3_smx:INFO: List of broken channels: [10, 21, 44, 104, 121] 10:24:15:ST3_smx:INFO: Total # of broken channels: 0 10:24:15:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:24:17:ST3_smx:INFO: chip: 24-7 40.898880 C 1153.732915 mV 10:24:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:24:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:24:17:ST3_smx:INFO: Electrons 10:24:21:ST3_smx:INFO: Total # of broken channels: 7 10:24:21:ST3_smx:INFO: List of broken channels: [21, 24, 71, 77, 79, 110, 123] 10:24:21:ST3_smx:INFO: Total # of broken channels: 0 10:24:21:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:24:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:24:22:febtest:INFO: 23-00 | XA-000-09-004-011-004-006-12 | 28.2 | 1578.5 10:24:22:febtest:INFO: 30-01 | XA-000-09-004-009-003-019-10 | 37.7 | 1195.1 10:24:23:febtest:INFO: 21-02 | XA-000-09-004-011-013-003-13 | 34.6 | 1578.5 10:24:23:febtest:INFO: 28-03 | XA-000-09-004-009-003-012-13 | 44.1 | 1165.6 10:24:23:febtest:INFO: 19-04 | XA-000-09-004-011-010-002-05 | 40.9 | 1189.2 10:24:23:febtest:INFO: 26-05 | XA-000-09-004-011-007-005-02 | 31.4 | 1195.1 10:24:23:febtest:INFO: 17-06 | XA-000-09-004-015-009-026-07 | 37.7 | 1189.2 10:24:24:febtest:INFO: 24-07 | XA-000-09-004-009-003-014-13 | 40.9 | 1171.5 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_06_16-10_23_00 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2450| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5180', '1.848', '2.6850'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0290', '1.850', '2.6010'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9890', '1.850', '0.5264']