09:47:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:47:29:ST3_Shared:INFO:	                       FEB-Microcable                       
09:47:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:47:29:febtest:INFO:	Testing FEB with SN 2452
==============================================OOO==============================================
09:47:31:smx_tester:INFO:	Scanning setup
09:47:31:elinks:INFO:	Disabling clock on downlink 0
09:47:31:elinks:INFO:	Disabling clock on downlink 1
09:47:31:elinks:INFO:	Disabling clock on downlink 2
09:47:31:elinks:INFO:	Disabling clock on downlink 3
09:47:31:elinks:INFO:	Disabling clock on downlink 4
09:47:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:47:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:31:elinks:INFO:	Disabling clock on downlink 0
09:47:31:elinks:INFO:	Disabling clock on downlink 1
09:47:31:elinks:INFO:	Disabling clock on downlink 2
09:47:31:elinks:INFO:	Disabling clock on downlink 3
09:47:31:elinks:INFO:	Disabling clock on downlink 4
09:47:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:47:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:31:elinks:INFO:	Disabling clock on downlink 0
09:47:31:elinks:INFO:	Disabling clock on downlink 1
09:47:31:elinks:INFO:	Disabling clock on downlink 2
09:47:31:elinks:INFO:	Disabling clock on downlink 3
09:47:31:elinks:INFO:	Disabling clock on downlink 4
09:47:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:47:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:47:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:47:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:47:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:47:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:47:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:47:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:47:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:47:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:31:elinks:INFO:	Disabling clock on downlink 0
09:47:31:elinks:INFO:	Disabling clock on downlink 1
09:47:31:elinks:INFO:	Disabling clock on downlink 2
09:47:31:elinks:INFO:	Disabling clock on downlink 3
09:47:31:elinks:INFO:	Disabling clock on downlink 4
09:47:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:47:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:31:elinks:INFO:	Disabling clock on downlink 0
09:47:31:elinks:INFO:	Disabling clock on downlink 1
09:47:31:elinks:INFO:	Disabling clock on downlink 2
09:47:31:elinks:INFO:	Disabling clock on downlink 3
09:47:31:elinks:INFO:	Disabling clock on downlink 4
09:47:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:47:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:47:31:setup_element:INFO:	Scanning clock phase
09:47:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:47:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:47:32:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:47:32:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:47:32:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:47:32:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:47:32:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:47:32:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:47:32:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:47:32:setup_element:INFO:	Eye window for uplink 30: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:47:32:setup_element:INFO:	Eye window for uplink 31: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:47:32:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
==============================================OOO==============================================
09:47:32:setup_element:INFO:	Scanning data phases
09:47:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:47:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:47:37:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:47:37:setup_element:INFO:	Eye window for uplink 24: ______________XXXXXX____________________
Data delay found: 36
09:47:37:setup_element:INFO:	Eye window for uplink 25: ________________XXXXX___________________
Data delay found: 38
09:47:37:setup_element:INFO:	Eye window for uplink 26: _______________XXXXX____________________
Data delay found: 37
09:47:37:setup_element:INFO:	Eye window for uplink 27: ________________XXXXXX__________________
Data delay found: 38
09:47:37:setup_element:INFO:	Eye window for uplink 28: ______________________XXXXX_____________
Data delay found: 4
09:47:37:setup_element:INFO:	Eye window for uplink 29: ______________________XXXX______________
Data delay found: 3
09:47:37:setup_element:INFO:	Eye window for uplink 30: ____________________XXXXXXX_____________
Data delay found: 3
09:47:37:setup_element:INFO:	Eye window for uplink 31: __________________XXXXXXXX______________
Data delay found: 1
09:47:37:setup_element:INFO:	Setting the data phase to 36 for uplink 24
09:47:37:setup_element:INFO:	Setting the data phase to 38 for uplink 25
09:47:37:setup_element:INFO:	Setting the data phase to 37 for uplink 26
09:47:37:setup_element:INFO:	Setting the data phase to 38 for uplink 27
09:47:37:setup_element:INFO:	Setting the data phase to 4 for uplink 28
09:47:37:setup_element:INFO:	Setting the data phase to 3 for uplink 29
09:47:37:setup_element:INFO:	Setting the data phase to 3 for uplink 30
09:47:37:setup_element:INFO:	Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
09:47:37:setup_element:INFO:	Beginning SMX ASICs map scan
09:47:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:47:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:47:37:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:47:37:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:47:37:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:47:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:47:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:47:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:47:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:47:38:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:47:38:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:47:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:47:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:47:40:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 70
    Eye Windows:
      Uplink 24: ____________________________________________________________________XXXXXXXXX___
      Uplink 25: ____________________________________________________________________XXXXXXXXX___
      Uplink 26: ___________________________________________________________________XXXXXXXX_____
      Uplink 27: ___________________________________________________________________XXXXXXXX_____
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: ____________________________________________________________________XXXXXXXXX___
      Uplink 31: ____________________________________________________________________XXXXXXXXX___
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 25:
      Optimal Phase: 38
      Window Length: 35
      Eye Window: ________________XXXXX___________________
    Uplink 26:
      Optimal Phase: 37
      Window Length: 35
      Eye Window: _______________XXXXX____________________
    Uplink 27:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________
    Uplink 28:
      Optimal Phase: 4
      Window Length: 35
      Eye Window: ______________________XXXXX_____________
    Uplink 29:
      Optimal Phase: 3
      Window Length: 36
      Eye Window: ______________________XXXX______________
    Uplink 30:
      Optimal Phase: 3
      Window Length: 33
      Eye Window: ____________________XXXXXXX_____________
    Uplink 31:
      Optimal Phase: 1
      Window Length: 32
      Eye Window: __________________XXXXXXXX______________

==============================================OOO==============================================
09:47:40:setup_element:INFO:	Performing Elink synchronization
09:47:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:47:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:47:40:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:47:40:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
09:47:40:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:47:40:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:47:40:ST3_emu_feb:DEBUG:	Chip address:  	0x1
09:47:40:ST3_emu_feb:DEBUG:	Chip address:  	0x3
09:47:40:ST3_emu_feb:DEBUG:	Chip address:  	0x5
09:47:40:ST3_emu_feb:DEBUG:	Chip address:  	0x7
09:47:40:febtest:INFO:	Init all SMX (CSA): 30
09:47:48:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:47:48:febtest:INFO:	30-01 | XA-000-09-004-015-008-017-10 |  31.4 | 1171.5
09:47:48:febtest:INFO:	28-03 | XA-000-09-004-015-017-017-07 |  31.4 | 1171.5
09:47:48:febtest:INFO:	26-05 | XA-000-09-004-015-005-018-13 |  31.4 | 1159.7
09:47:49:febtest:INFO:	24-07 | XA-000-09-004-015-005-017-13 |  40.9 | 1135.9
09:47:50:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:47:52:ST3_smx:INFO:	chip: 30-1 	 31.389742 C 	 1183.292940 mV
09:47:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:52:ST3_smx:INFO:		Electrons
09:47:56:ST3_smx:INFO:	Total # of broken channels: 9
09:47:56:ST3_smx:INFO:	List of broken channels: [5, 10, 15, 25, 27, 29, 62, 87, 106]
09:47:56:ST3_smx:INFO:	Total # of broken channels: 0
09:47:56:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:47:58:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1177.390875 mV
09:47:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:58:ST3_smx:INFO:		Electrons
09:48:03:ST3_smx:INFO:	Total # of broken channels: 6
09:48:03:ST3_smx:INFO:	List of broken channels: [6, 13, 73, 86, 113, 122]
09:48:03:ST3_smx:INFO:	Total # of broken channels: 0
09:48:03:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:48:05:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1171.483840 mV
09:48:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:05:ST3_smx:INFO:		Electrons
09:48:10:ST3_smx:INFO:	Total # of broken channels: 5
09:48:10:ST3_smx:INFO:	List of broken channels: [20, 84, 115, 117, 121]
09:48:10:ST3_smx:INFO:	Total # of broken channels: 0
09:48:10:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:48:11:ST3_smx:INFO:	chip: 24-7 	 40.898880 C 	 1141.874115 mV
09:48:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:11:ST3_smx:INFO:		Electrons
09:48:16:ST3_smx:INFO:	Total # of broken channels: 11
09:48:16:ST3_smx:INFO:	List of broken channels: [16, 22, 23, 42, 59, 64, 77, 86, 106, 110, 112]
09:48:16:ST3_smx:INFO:	Total # of broken channels: 0
09:48:16:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:48:17:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:48:17:febtest:INFO:	30-01 | XA-000-09-004-015-008-017-10 |  31.4 | 1206.9
09:48:17:febtest:INFO:	28-03 | XA-000-09-004-015-017-017-07 |  31.4 | 1195.1
09:48:17:febtest:INFO:	26-05 | XA-000-09-004-015-005-018-13 |  34.6 | 1189.2
09:48:17:febtest:INFO:	24-07 | XA-000-09-004-015-005-017-13 |  40.9 | 1165.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_26-09_47_29
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2452| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7737', '1.848', '1.3160']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0100', '1.850', '1.2970']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9936', '1.850', '0.2685']