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FEB_2452 27.06.25 09:38:24
Info
09:38:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:38:24:ST3_Shared:INFO: FEB-Microcable
09:38:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:38:24:febtest:INFO: Testing FEB with SN 2452
==============================================OOO==============================================
09:38:25:smx_tester:INFO: Scanning setup
09:38:25:elinks:INFO: Disabling clock on downlink 0
09:38:25:elinks:INFO: Disabling clock on downlink 1
09:38:25:elinks:INFO: Disabling clock on downlink 2
09:38:25:elinks:INFO: Disabling clock on downlink 3
09:38:25:elinks:INFO: Disabling clock on downlink 4
09:38:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:38:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:38:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:38:26:elinks:INFO: Disabling clock on downlink 0
09:38:26:elinks:INFO: Disabling clock on downlink 1
09:38:26:elinks:INFO: Disabling clock on downlink 2
09:38:26:elinks:INFO: Disabling clock on downlink 3
09:38:26:elinks:INFO: Disabling clock on downlink 4
09:38:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:38:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:38:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:38:26:elinks:INFO: Disabling clock on downlink 0
09:38:26:elinks:INFO: Disabling clock on downlink 1
09:38:26:elinks:INFO: Disabling clock on downlink 2
09:38:26:elinks:INFO: Disabling clock on downlink 3
09:38:26:elinks:INFO: Disabling clock on downlink 4
09:38:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:38:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:38:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:38:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:38:26:elinks:INFO: Disabling clock on downlink 0
09:38:26:elinks:INFO: Disabling clock on downlink 1
09:38:26:elinks:INFO: Disabling clock on downlink 2
09:38:26:elinks:INFO: Disabling clock on downlink 3
09:38:26:elinks:INFO: Disabling clock on downlink 4
09:38:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:38:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:38:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:38:26:elinks:INFO: Disabling clock on downlink 0
09:38:26:elinks:INFO: Disabling clock on downlink 1
09:38:26:elinks:INFO: Disabling clock on downlink 2
09:38:26:elinks:INFO: Disabling clock on downlink 3
09:38:26:elinks:INFO: Disabling clock on downlink 4
09:38:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:38:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:38:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:38:26:setup_element:INFO: Scanning clock phase
09:38:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:38:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:38:27:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:38:27:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:38:27:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:38:27:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:38:27:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:38:27:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:38:27:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:38:27:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:38:27:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:38:27:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:38:27:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:38:27:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:38:27:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:38:27:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:38:27:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:38:27:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:38:27:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:38:27:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
09:38:27:setup_element:INFO: Scanning data phases
09:38:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:38:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:38:32:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:38:32:setup_element:INFO: Eye window for uplink 16: ____XXXXX_______________________________
Data delay found: 26
09:38:32:setup_element:INFO: Eye window for uplink 17: ___XXXX_________________________________
Data delay found: 24
09:38:32:setup_element:INFO: Eye window for uplink 18: _XXXXXX________________________________X
Data delay found: 22
09:38:32:setup_element:INFO: Eye window for uplink 19: _XXXXXX________________________________X
Data delay found: 22
09:38:32:setup_element:INFO: Eye window for uplink 20: ____XXXXX_______________________________
Data delay found: 26
09:38:32:setup_element:INFO: Eye window for uplink 21: ____XXXXXX______________________________
Data delay found: 26
09:38:32:setup_element:INFO: Eye window for uplink 22: _XXXXX__________________________________
Data delay found: 23
09:38:32:setup_element:INFO: Eye window for uplink 23: XXXXX__________________________________X
Data delay found: 21
09:38:32:setup_element:INFO: Eye window for uplink 24: _____________XXXXXX_____________________
Data delay found: 35
09:38:32:setup_element:INFO: Eye window for uplink 25: ______________XXXXXX____________________
Data delay found: 36
09:38:32:setup_element:INFO: Eye window for uplink 26: ______________XXXXX_____________________
Data delay found: 36
09:38:32:setup_element:INFO: Eye window for uplink 27: _______________XXXXXX___________________
Data delay found: 37
09:38:32:setup_element:INFO: Eye window for uplink 28: ______________________XXXXX_____________
Data delay found: 4
09:38:32:setup_element:INFO: Eye window for uplink 29: ______________________XXXXX_____________
Data delay found: 4
09:38:32:setup_element:INFO: Eye window for uplink 30: _____________________XXXXXX_____________
Data delay found: 3
09:38:32:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXXX______________
Data delay found: 2
09:38:32:setup_element:INFO: Setting the data phase to 26 for uplink 16
09:38:32:setup_element:INFO: Setting the data phase to 24 for uplink 17
09:38:32:setup_element:INFO: Setting the data phase to 22 for uplink 18
09:38:32:setup_element:INFO: Setting the data phase to 22 for uplink 19
09:38:32:setup_element:INFO: Setting the data phase to 26 for uplink 20
09:38:32:setup_element:INFO: Setting the data phase to 26 for uplink 21
09:38:32:setup_element:INFO: Setting the data phase to 23 for uplink 22
09:38:32:setup_element:INFO: Setting the data phase to 21 for uplink 23
09:38:32:setup_element:INFO: Setting the data phase to 35 for uplink 24
09:38:32:setup_element:INFO: Setting the data phase to 36 for uplink 25
09:38:32:setup_element:INFO: Setting the data phase to 36 for uplink 26
09:38:32:setup_element:INFO: Setting the data phase to 37 for uplink 27
09:38:32:setup_element:INFO: Setting the data phase to 4 for uplink 28
09:38:32:setup_element:INFO: Setting the data phase to 4 for uplink 29
09:38:32:setup_element:INFO: Setting the data phase to 3 for uplink 30
09:38:32:setup_element:INFO: Setting the data phase to 2 for uplink 31
==============================================OOO==============================================
09:38:32:setup_element:INFO: Beginning SMX ASICs map scan
09:38:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:38:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:38:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:38:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:38:32:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:38:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:38:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:38:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:38:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:38:32:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:38:32:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:38:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:38:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:38:33:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:38:33:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:38:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:38:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:38:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:38:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:38:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:38:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:38:35:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXXX_
Uplink 17: ______________________________________________________________________XXXXXXXXX_
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: _____________________________________________________________________XXXXXXXXX__
Uplink 23: _____________________________________________________________________XXXXXXXXX__
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: ____________________________________________________________________XXXXXXXX____
Uplink 27: ____________________________________________________________________XXXXXXXX____
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: _______________________________________________________________________XXXXXXXX_
Uplink 31: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 17:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 18:
Optimal Phase: 22
Window Length: 32
Eye Window: _XXXXXX________________________________X
Uplink 19:
Optimal Phase: 22
Window Length: 32
Eye Window: _XXXXXX________________________________X
Uplink 20:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 21:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 22:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 23:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 24:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 25:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 26:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 27:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 28:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 29:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 30:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 31:
Optimal Phase: 2
Window Length: 33
Eye Window: ___________________XXXXXXX______________
==============================================OOO==============================================
09:38:35:setup_element:INFO: Performing Elink synchronization
09:38:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:38:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:38:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:38:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
09:38:35:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:38:35:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:38:35:ST3_emu_feb:DEBUG: Chip address: 0x0
09:38:35:ST3_emu_feb:DEBUG: Chip address: 0x1
09:38:35:ST3_emu_feb:DEBUG: Chip address: 0x2
09:38:35:ST3_emu_feb:DEBUG: Chip address: 0x3
09:38:35:ST3_emu_feb:DEBUG: Chip address: 0x4
09:38:35:ST3_emu_feb:DEBUG: Chip address: 0x5
09:38:35:ST3_emu_feb:DEBUG: Chip address: 0x6
09:38:35:ST3_emu_feb:DEBUG: Chip address: 0x7
09:38:35:febtest:INFO: Init all SMX (CSA): 30
09:38:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:38:50:febtest:INFO: 23-00 | XA-000-09-004-015-014-016-15 | 18.7 | 1189.2
09:38:50:febtest:INFO: 30-01 | XA-000-09-004-015-008-017-10 | 21.9 | 1177.4
09:38:51:febtest:INFO: 21-02 | XA-000-09-004-015-002-017-05 | 34.6 | 1135.9
09:38:51:febtest:INFO: 28-03 | XA-000-09-004-015-017-017-07 | 21.9 | 1177.4
09:38:51:febtest:INFO: 19-04 | XA-000-09-004-015-002-018-05 | 28.2 | 1153.7
09:38:51:febtest:INFO: 26-05 | XA-000-09-004-015-005-018-13 | 25.1 | 1159.7
09:38:52:febtest:INFO: 17-06 | XA-000-09-004-015-017-016-07 | 31.4 | 1147.8
09:38:52:febtest:INFO: 24-07 | XA-000-09-004-015-005-017-13 | 31.4 | 1135.9
09:38:53:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:38:55:ST3_smx:INFO: chip: 23-0 18.745682 C 1195.082160 mV
09:38:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:38:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:38:55:ST3_smx:INFO: Electrons
09:39:00:ST3_smx:INFO: Total # of broken channels: 7
09:39:00:ST3_smx:INFO: List of broken channels: [10, 50, 59, 68, 95, 112, 121]
09:39:00:ST3_smx:INFO: Total # of broken channels: 3
09:39:00:ST3_smx:INFO: List of broken channels: [30, 40, 94]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:39:01:ST3_smx:INFO: chip: 30-1 21.902970 C 1189.190035 mV
09:39:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:01:ST3_smx:INFO: Electrons
09:39:06:ST3_smx:INFO: Total # of broken channels: 6
09:39:06:ST3_smx:INFO: List of broken channels: [3, 28, 76, 84, 87, 106]
09:39:06:ST3_smx:INFO: Total # of broken channels: 0
09:39:06:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:39:08:ST3_smx:INFO: chip: 21-2 34.556970 C 1147.806000 mV
09:39:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:08:ST3_smx:INFO: Electrons
09:39:13:ST3_smx:INFO: Total # of broken channels: 6
09:39:13:ST3_smx:INFO: List of broken channels: [16, 35, 41, 54, 72, 109]
09:39:13:ST3_smx:INFO: Total # of broken channels: 0
09:39:13:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:39:14:ST3_smx:INFO: chip: 28-3 21.902970 C 1189.190035 mV
09:39:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:14:ST3_smx:INFO: Electrons
09:39:19:ST3_smx:INFO: Total # of broken channels: 7
09:39:19:ST3_smx:INFO: List of broken channels: [26, 44, 58, 65, 80, 98, 126]
09:39:19:ST3_smx:INFO: Total # of broken channels: 0
09:39:19:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:39:21:ST3_smx:INFO: chip: 19-4 28.225000 C 1159.654860 mV
09:39:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:21:ST3_smx:INFO: Electrons
09:39:26:ST3_smx:INFO: Total # of broken channels: 7
09:39:26:ST3_smx:INFO: List of broken channels: [21, 72, 89, 90, 95, 96, 108]
09:39:26:ST3_smx:INFO: Total # of broken channels: 0
09:39:26:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:39:27:ST3_smx:INFO: chip: 26-5 25.062742 C 1165.571835 mV
09:39:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:27:ST3_smx:INFO: Electrons
09:39:32:ST3_smx:INFO: Total # of broken channels: 6
09:39:32:ST3_smx:INFO: List of broken channels: [19, 23, 25, 91, 97, 127]
09:39:32:ST3_smx:INFO: Total # of broken channels: 1
09:39:32:ST3_smx:INFO: List of broken channels: [127]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:39:34:ST3_smx:INFO: chip: 17-6 31.389742 C 1153.732915 mV
09:39:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:34:ST3_smx:INFO: Electrons
09:39:38:ST3_smx:INFO: Total # of broken channels: 9
09:39:38:ST3_smx:INFO: List of broken channels: [3, 18, 34, 41, 58, 77, 117, 119, 122]
09:39:38:ST3_smx:INFO: Total # of broken channels: 0
09:39:38:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:39:40:ST3_smx:INFO: chip: 24-7 34.556970 C 1141.874115 mV
09:39:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:40:ST3_smx:INFO: Electrons
09:39:45:ST3_smx:INFO: Total # of broken channels: 3
09:39:45:ST3_smx:INFO: List of broken channels: [14, 61, 106]
09:39:45:ST3_smx:INFO: Total # of broken channels: 0
09:39:45:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:39:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:39:46:febtest:INFO: 23-00 | XA-000-09-004-015-014-016-15 | 21.9 | 1218.6
09:39:46:febtest:INFO: 30-01 | XA-000-09-004-015-008-017-10 | 25.1 | 1206.9
09:39:46:febtest:INFO: 21-02 | XA-000-09-004-015-002-017-05 | 34.6 | 1171.5
09:39:46:febtest:INFO: 28-03 | XA-000-09-004-015-017-017-07 | 21.9 | 1206.9
09:39:47:febtest:INFO: 19-04 | XA-000-09-004-015-002-018-05 | 31.4 | 1177.4
09:39:47:febtest:INFO: 26-05 | XA-000-09-004-015-005-018-13 | 25.1 | 1189.2
09:39:47:febtest:INFO: 17-06 | XA-000-09-004-015-017-016-07 | 34.6 | 1171.5
09:39:47:febtest:INFO: 24-07 | XA-000-09-004-015-005-017-13 | 37.7 | 1159.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_27-09_38_24
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2452| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4710', '1.848', '2.0490']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0060', '1.850', '2.5670']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '0.5257']