
FEB_2453 17.07.25 13:48:27
TextEdit.txt
13:48:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:48:27:ST3_Shared:INFO: FEB-Microcable 13:48:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:48:27:febtest:INFO: Testing FEB with SN 2453 ==============================================OOO============================================== 13:48:28:smx_tester:INFO: Scanning setup 13:48:28:elinks:INFO: Disabling clock on downlink 0 13:48:28:elinks:INFO: Disabling clock on downlink 1 13:48:28:elinks:INFO: Disabling clock on downlink 2 13:48:28:elinks:INFO: Disabling clock on downlink 3 13:48:28:elinks:INFO: Disabling clock on downlink 4 13:48:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:48:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:28:elinks:INFO: Disabling clock on downlink 0 13:48:28:elinks:INFO: Disabling clock on downlink 1 13:48:28:elinks:INFO: Disabling clock on downlink 2 13:48:28:elinks:INFO: Disabling clock on downlink 3 13:48:28:elinks:INFO: Disabling clock on downlink 4 13:48:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:48:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:29:elinks:INFO: Disabling clock on downlink 0 13:48:29:elinks:INFO: Disabling clock on downlink 1 13:48:29:elinks:INFO: Disabling clock on downlink 2 13:48:29:elinks:INFO: Disabling clock on downlink 3 13:48:29:elinks:INFO: Disabling clock on downlink 4 13:48:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:48:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:48:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:29:elinks:INFO: Disabling clock on downlink 0 13:48:29:elinks:INFO: Disabling clock on downlink 1 13:48:29:elinks:INFO: Disabling clock on downlink 2 13:48:29:elinks:INFO: Disabling clock on downlink 3 13:48:29:elinks:INFO: Disabling clock on downlink 4 13:48:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:48:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:29:elinks:INFO: Disabling clock on downlink 0 13:48:29:elinks:INFO: Disabling clock on downlink 1 13:48:29:elinks:INFO: Disabling clock on downlink 2 13:48:29:elinks:INFO: Disabling clock on downlink 3 13:48:29:elinks:INFO: Disabling clock on downlink 4 13:48:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:48:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 13:48:29:setup_element:INFO: Scanning clock phase 13:48:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:48:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:48:30:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:48:30:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 13:48:30:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 13:48:30:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:48:30:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:48:30:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXXXX_ Clock Delay: 33 13:48:30:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXXXX_ Clock Delay: 33 13:48:30:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 13:48:30:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 13:48:30:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 13:48:30:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 13:48:30:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 13:48:30:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 13:48:30:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:48:30:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:48:30:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:48:30:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:48:30:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 ==============================================OOO============================================== 13:48:30:setup_element:INFO: Scanning data phases 13:48:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:48:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:48:35:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:48:35:setup_element:INFO: Eye window for uplink 16: _XXXX___________________________________ Data delay found: 22 13:48:35:setup_element:INFO: Eye window for uplink 17: XXXX___________________________________X Data delay found: 21 13:48:35:setup_element:INFO: Eye window for uplink 18: __XXXXX_________________________________ Data delay found: 24 13:48:35:setup_element:INFO: Eye window for uplink 19: __XXXXXX________________________________ Data delay found: 24 13:48:35:setup_element:INFO: Eye window for uplink 20: __XXXXX_________________________________ Data delay found: 24 13:48:35:setup_element:INFO: Eye window for uplink 21: ___XXXXXX_______________________________ Data delay found: 25 13:48:35:setup_element:INFO: Eye window for uplink 22: __XXXXX_________________________________ Data delay found: 24 13:48:35:setup_element:INFO: Eye window for uplink 23: XXXXX__________________________________X Data delay found: 21 13:48:35:setup_element:INFO: Eye window for uplink 24: _____________XXXXXX_____________________ Data delay found: 35 13:48:35:setup_element:INFO: Eye window for uplink 25: _______________XXXXX____________________ Data delay found: 37 13:48:35:setup_element:INFO: Eye window for uplink 26: ______________XXXXX_____________________ Data delay found: 36 13:48:35:setup_element:INFO: Eye window for uplink 27: ________________XXXXX___________________ Data delay found: 38 13:48:35:setup_element:INFO: Eye window for uplink 28: ____________________XXXXXX______________ Data delay found: 2 13:48:35:setup_element:INFO: Eye window for uplink 29: ____________________XXXXXX______________ Data delay found: 2 13:48:35:setup_element:INFO: Eye window for uplink 30: _______________________XXXXX____________ Data delay found: 5 13:48:35:setup_element:INFO: Eye window for uplink 31: _____________________XXXXX______________ Data delay found: 3 13:48:35:setup_element:INFO: Setting the data phase to 22 for uplink 16 13:48:35:setup_element:INFO: Setting the data phase to 21 for uplink 17 13:48:35:setup_element:INFO: Setting the data phase to 24 for uplink 18 13:48:35:setup_element:INFO: Setting the data phase to 24 for uplink 19 13:48:35:setup_element:INFO: Setting the data phase to 24 for uplink 20 13:48:35:setup_element:INFO: Setting the data phase to 25 for uplink 21 13:48:35:setup_element:INFO: Setting the data phase to 24 for uplink 22 13:48:35:setup_element:INFO: Setting the data phase to 21 for uplink 23 13:48:35:setup_element:INFO: Setting the data phase to 35 for uplink 24 13:48:35:setup_element:INFO: Setting the data phase to 37 for uplink 25 13:48:35:setup_element:INFO: Setting the data phase to 36 for uplink 26 13:48:35:setup_element:INFO: Setting the data phase to 38 for uplink 27 13:48:35:setup_element:INFO: Setting the data phase to 2 for uplink 28 13:48:35:setup_element:INFO: Setting the data phase to 2 for uplink 29 13:48:35:setup_element:INFO: Setting the data phase to 5 for uplink 30 13:48:35:setup_element:INFO: Setting the data phase to 3 for uplink 31 ==============================================OOO============================================== 13:48:35:setup_element:INFO: Beginning SMX ASICs map scan 13:48:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:48:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:48:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:48:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:48:35:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 13:48:35:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 13:48:35:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 13:48:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:48:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:48:36:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 13:48:36:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 13:48:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:48:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:48:36:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 13:48:36:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 13:48:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 13:48:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 13:48:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 13:48:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 13:48:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:48:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:48:38:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 69 Eye Windows: Uplink 16: _____________________________________________________________________XXXXXXXX___ Uplink 17: _____________________________________________________________________XXXXXXXX___ Uplink 18: ______________________________________________________________________XXXXXXXX__ Uplink 19: ______________________________________________________________________XXXXXXXX__ Uplink 20: _____________________________________________________________________XXXXXXXXXX_ Uplink 21: _____________________________________________________________________XXXXXXXXXX_ Uplink 22: ______________________________________________________________________XXXXXXXXX_ Uplink 23: ______________________________________________________________________XXXXXXXXX_ Uplink 24: _____________________________________________________________________XXXXXXXXX__ Uplink 25: _____________________________________________________________________XXXXXXXXX__ Uplink 26: ____________________________________________________________________XXXXXXXXX___ Uplink 27: ____________________________________________________________________XXXXXXXXX___ Uplink 28: _______________________________________________________________________XXXXXXX__ Uplink 29: _______________________________________________________________________XXXXXXX__ Uplink 30: _______________________________________________________________________XXXXXXXX_ Uplink 31: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 22 Window Length: 36 Eye Window: _XXXX___________________________________ Uplink 17: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 18: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 19: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 20: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 21: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 22: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 23: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 24: Optimal Phase: 35 Window Length: 34 Eye Window: _____________XXXXXX_____________________ Uplink 25: Optimal Phase: 37 Window Length: 35 Eye Window: _______________XXXXX____________________ Uplink 26: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 27: Optimal Phase: 38 Window Length: 35 Eye Window: ________________XXXXX___________________ Uplink 28: Optimal Phase: 2 Window Length: 34 Eye Window: ____________________XXXXXX______________ Uplink 29: Optimal Phase: 2 Window Length: 34 Eye Window: ____________________XXXXXX______________ Uplink 30: Optimal Phase: 5 Window Length: 35 Eye Window: _______________________XXXXX____________ Uplink 31: Optimal Phase: 3 Window Length: 35 Eye Window: _____________________XXXXX______________ ==============================================OOO============================================== 13:48:38:setup_element:INFO: Performing Elink synchronization 13:48:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:48:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:48:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:48:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 13:48:38:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:48:38:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 13:48:39:ST3_emu_feb:DEBUG: Chip address: 0x0 13:48:39:ST3_emu_feb:DEBUG: Chip address: 0x1 13:48:39:ST3_emu_feb:DEBUG: Chip address: 0x2 13:48:39:ST3_emu_feb:DEBUG: Chip address: 0x3 13:48:39:ST3_emu_feb:DEBUG: Chip address: 0x4 13:48:39:ST3_emu_feb:DEBUG: Chip address: 0x5 13:48:39:ST3_emu_feb:DEBUG: Chip address: 0x6 13:48:39:ST3_emu_feb:DEBUG: Chip address: 0x7 13:48:39:febtest:INFO: Init all SMX (CSA): 30 13:48:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:48:53:febtest:INFO: 23-00 | XA-000-09-004-018-013-005-05 | 37.7 | 1165.6 13:48:53:febtest:INFO: 30-01 | XA-000-09-004-018-014-004-11 | 37.7 | 1153.7 13:48:53:febtest:INFO: 21-02 | XA-000-09-004-018-004-007-04 | 31.4 | 1183.3 13:48:53:febtest:INFO: 28-03 | XA-000-09-004-018-015-005-06 | 44.1 | 1124.0 13:48:53:febtest:INFO: 19-04 | XA-000-09-004-018-014-005-11 | 34.6 | 1171.5 13:48:54:febtest:INFO: 26-05 | XA-000-09-004-018-005-006-09 | 25.1 | 1189.2 13:48:54:febtest:INFO: 17-06 | XA-000-09-004-043-006-014-08 | 34.6 | 1177.4 13:48:54:febtest:INFO: 24-07 | XA-000-09-004-018-013-004-05 | 31.4 | 1177.4 13:48:55:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 13:48:57:ST3_smx:INFO: chip: 23-0 37.726682 C 1183.292940 mV 13:48:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:48:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:48:57:ST3_smx:INFO: Electrons 13:49:02:ST3_smx:INFO: Total # of broken channels: 6 13:49:02:ST3_smx:INFO: List of broken channels: [24, 71, 82, 97, 114, 120] 13:49:02:ST3_smx:INFO: Total # of broken channels: 1 13:49:02:ST3_smx:INFO: List of broken channels: [86] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:49:04:ST3_smx:INFO: chip: 30-1 37.726682 C 1165.571835 mV 13:49:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:04:ST3_smx:INFO: Electrons 13:49:09:ST3_smx:INFO: Total # of broken channels: 7 13:49:09:ST3_smx:INFO: List of broken channels: [2, 5, 9, 13, 49, 69, 95] 13:49:09:ST3_smx:INFO: Total # of broken channels: 1 13:49:09:ST3_smx:INFO: List of broken channels: [120] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:49:10:ST3_smx:INFO: chip: 21-2 31.389742 C 1195.082160 mV 13:49:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:10:ST3_smx:INFO: Electrons 13:49:15:ST3_smx:INFO: Total # of broken channels: 7 13:49:15:ST3_smx:INFO: List of broken channels: [13, 28, 36, 94, 101, 115, 118] 13:49:15:ST3_smx:INFO: Total # of broken channels: 6 13:49:15:ST3_smx:INFO: List of broken channels: [6, 8, 28, 32, 62, 108] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:49:17:ST3_smx:INFO: chip: 28-3 44.073563 C 1141.874115 mV 13:49:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:17:ST3_smx:INFO: Electrons 13:49:22:ST3_smx:INFO: Total # of broken channels: 10 13:49:22:ST3_smx:INFO: List of broken channels: [9, 13, 14, 21, 24, 30, 32, 87, 92, 111] 13:49:22:ST3_smx:INFO: Total # of broken channels: 6 13:49:22:ST3_smx:INFO: List of broken channels: [4, 34, 42, 108, 118, 119] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:49:23:ST3_smx:INFO: chip: 19-4 34.556970 C 1183.292940 mV 13:49:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:23:ST3_smx:INFO: Electrons 13:49:28:ST3_smx:INFO: Total # of broken channels: 8 13:49:28:ST3_smx:INFO: List of broken channels: [20, 29, 37, 67, 87, 99, 118, 119] 13:49:28:ST3_smx:INFO: Total # of broken channels: 4 13:49:28:ST3_smx:INFO: List of broken channels: [20, 92, 112, 120] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:49:30:ST3_smx:INFO: chip: 26-5 25.062742 C 1206.851500 mV 13:49:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:30:ST3_smx:INFO: Electrons 13:49:35:ST3_smx:INFO: Total # of broken channels: 4 13:49:35:ST3_smx:INFO: List of broken channels: [2, 11, 67, 99] 13:49:35:ST3_smx:INFO: Total # of broken channels: 4 13:49:35:ST3_smx:INFO: List of broken channels: [6, 36, 80, 110] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:49:36:ST3_smx:INFO: chip: 17-6 37.726682 C 1189.190035 mV 13:49:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:36:ST3_smx:INFO: Electrons 13:49:41:ST3_smx:INFO: Total # of broken channels: 3 13:49:41:ST3_smx:INFO: List of broken channels: [11, 80, 95] 13:49:41:ST3_smx:INFO: Total # of broken channels: 0 13:49:41:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:49:43:ST3_smx:INFO: chip: 24-7 31.389742 C 1189.190035 mV 13:49:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:43:ST3_smx:INFO: Electrons 13:49:47:ST3_smx:INFO: Total # of broken channels: 10 13:49:47:ST3_smx:INFO: List of broken channels: [4, 10, 22, 24, 26, 44, 49, 88, 93, 101] 13:49:47:ST3_smx:INFO: Total # of broken channels: 0 13:49:47:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 13:49:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:49:48:febtest:INFO: 23-00 | XA-000-09-004-018-013-005-05 | 37.7 | 1224.5 13:49:48:febtest:INFO: 30-01 | XA-000-09-004-018-014-004-11 | 37.7 | 1189.2 13:49:48:febtest:INFO: 21-02 | XA-000-09-004-018-004-007-04 | 31.4 | 1218.6 13:49:49:febtest:INFO: 28-03 | XA-000-09-004-018-015-005-06 | 44.1 | 1159.7 13:49:49:febtest:INFO: 19-04 | XA-000-09-004-018-014-005-11 | 37.7 | 1206.9 13:49:49:febtest:INFO: 26-05 | XA-000-09-004-018-005-006-09 | 28.2 | 1224.5 13:49:49:febtest:INFO: 17-06 | XA-000-09-004-043-006-014-08 | 37.7 | 1206.9 13:49:50:febtest:INFO: 24-07 | XA-000-09-004-018-013-004-05 | 34.6 | 1206.9 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_07_17-13_48_27 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2453| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8840', '1.848', '2.3750'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9750', '1.850', '2.4460'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9470', '1.850', '0.5094']