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FEB_2458 07.07.25 08:37:57
Info
08:37:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:37:57:ST3_Shared:INFO: FEB-Microcable
08:37:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:37:57:febtest:INFO: Testing FEB with SN 2458
==============================================OOO==============================================
08:37:59:smx_tester:INFO: Scanning setup
08:37:59:elinks:INFO: Disabling clock on downlink 0
08:37:59:elinks:INFO: Disabling clock on downlink 1
08:37:59:elinks:INFO: Disabling clock on downlink 2
08:37:59:elinks:INFO: Disabling clock on downlink 3
08:37:59:elinks:INFO: Disabling clock on downlink 4
08:37:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:37:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:37:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:37:59:elinks:INFO: Disabling clock on downlink 0
08:37:59:elinks:INFO: Disabling clock on downlink 1
08:37:59:elinks:INFO: Disabling clock on downlink 2
08:37:59:elinks:INFO: Disabling clock on downlink 3
08:37:59:elinks:INFO: Disabling clock on downlink 4
08:37:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:37:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:37:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:37:59:elinks:INFO: Disabling clock on downlink 0
08:37:59:elinks:INFO: Disabling clock on downlink 1
08:37:59:elinks:INFO: Disabling clock on downlink 2
08:37:59:elinks:INFO: Disabling clock on downlink 3
08:37:59:elinks:INFO: Disabling clock on downlink 4
08:37:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:37:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:37:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:37:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:37:59:elinks:INFO: Disabling clock on downlink 0
08:37:59:elinks:INFO: Disabling clock on downlink 1
08:37:59:elinks:INFO: Disabling clock on downlink 2
08:37:59:elinks:INFO: Disabling clock on downlink 3
08:37:59:elinks:INFO: Disabling clock on downlink 4
08:37:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:37:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:38:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:38:00:elinks:INFO: Disabling clock on downlink 0
08:38:00:elinks:INFO: Disabling clock on downlink 1
08:38:00:elinks:INFO: Disabling clock on downlink 2
08:38:00:elinks:INFO: Disabling clock on downlink 3
08:38:00:elinks:INFO: Disabling clock on downlink 4
08:38:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:38:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:38:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:38:00:setup_element:INFO: Scanning clock phase
08:38:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:38:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:38:00:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:38:00:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXXXX_
Clock Delay: 33
08:38:00:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXXXX_
Clock Delay: 33
08:38:00:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:38:00:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:38:00:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:38:00:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
08:38:00:setup_element:INFO: Scanning data phases
08:38:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:38:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:38:06:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:38:06:setup_element:INFO: Eye window for uplink 16: X_XXXX__________________________________
Data delay found: 22
08:38:06:setup_element:INFO: Eye window for uplink 17: XXXXX_________________________________XX
Data delay found: 21
08:38:06:setup_element:INFO: Eye window for uplink 18: XXXX__________________________________XX
Data delay found: 20
08:38:06:setup_element:INFO: Eye window for uplink 19: XXXXX_________________________________XX
Data delay found: 21
08:38:06:setup_element:INFO: Eye window for uplink 20: XXXXX__________________________________X
Data delay found: 21
08:38:06:setup_element:INFO: Eye window for uplink 21: XXXXXX_________________________________X
Data delay found: 22
08:38:06:setup_element:INFO: Eye window for uplink 22: XXXXX__________________________________X
Data delay found: 21
08:38:06:setup_element:INFO: Eye window for uplink 23: XXXX__________________________________XX
Data delay found: 20
08:38:06:setup_element:INFO: Eye window for uplink 24: ___________XXXXXX_______________________
Data delay found: 33
08:38:06:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
08:38:06:setup_element:INFO: Eye window for uplink 26: _____________XXXXXXXX___________________
Data delay found: 36
08:38:06:setup_element:INFO: Eye window for uplink 27: _______________XXXXXXX__________________
Data delay found: 38
08:38:06:setup_element:INFO: Eye window for uplink 28: _________________XXXXXX_________________
Data delay found: 39
08:38:06:setup_element:INFO: Eye window for uplink 29: ________________XXXXXXX_________________
Data delay found: 39
08:38:06:setup_element:INFO: Eye window for uplink 30: __________________XXXXXXX_______________
Data delay found: 1
08:38:06:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXX________________
Data delay found: 0
08:38:06:setup_element:INFO: Setting the data phase to 22 for uplink 16
08:38:06:setup_element:INFO: Setting the data phase to 21 for uplink 17
08:38:06:setup_element:INFO: Setting the data phase to 20 for uplink 18
08:38:06:setup_element:INFO: Setting the data phase to 21 for uplink 19
08:38:06:setup_element:INFO: Setting the data phase to 21 for uplink 20
08:38:06:setup_element:INFO: Setting the data phase to 22 for uplink 21
08:38:06:setup_element:INFO: Setting the data phase to 21 for uplink 22
08:38:06:setup_element:INFO: Setting the data phase to 20 for uplink 23
08:38:06:setup_element:INFO: Setting the data phase to 33 for uplink 24
08:38:06:setup_element:INFO: Setting the data phase to 34 for uplink 25
08:38:06:setup_element:INFO: Setting the data phase to 36 for uplink 26
08:38:06:setup_element:INFO: Setting the data phase to 38 for uplink 27
08:38:06:setup_element:INFO: Setting the data phase to 39 for uplink 28
08:38:06:setup_element:INFO: Setting the data phase to 39 for uplink 29
08:38:06:setup_element:INFO: Setting the data phase to 1 for uplink 30
08:38:06:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
08:38:06:setup_element:INFO: Beginning SMX ASICs map scan
08:38:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:38:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:38:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:38:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:38:06:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:38:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:38:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:38:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:38:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:38:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:38:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:38:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:38:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:38:07:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:38:07:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:38:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:38:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:38:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:38:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:38:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:38:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:38:08:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXXXX_
Uplink 17: _____________________________________________________________________XXXXXXXXXX_
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: ____________________________________________________________________XXXXXXXXX___
Uplink 21: ____________________________________________________________________XXXXXXXXX___
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 22
Window Length: 34
Eye Window: X_XXXX__________________________________
Uplink 17:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 18:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 19:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 20:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 21:
Optimal Phase: 22
Window Length: 33
Eye Window: XXXXXX_________________________________X
Uplink 22:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 23:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 24:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 25:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 26:
Optimal Phase: 36
Window Length: 32
Eye Window: _____________XXXXXXXX___________________
Uplink 27:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
Uplink 28:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 29:
Optimal Phase: 39
Window Length: 33
Eye Window: ________________XXXXXXX_________________
Uplink 30:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
Uplink 31:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
==============================================OOO==============================================
08:38:09:setup_element:INFO: Performing Elink synchronization
08:38:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:38:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:38:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:38:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
08:38:09:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:38:09:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:38:09:ST3_emu_feb:DEBUG: Chip address: 0x0
08:38:09:ST3_emu_feb:DEBUG: Chip address: 0x1
08:38:09:ST3_emu_feb:DEBUG: Chip address: 0x2
08:38:09:ST3_emu_feb:DEBUG: Chip address: 0x3
08:38:09:ST3_emu_feb:DEBUG: Chip address: 0x4
08:38:09:ST3_emu_feb:DEBUG: Chip address: 0x5
08:38:09:ST3_emu_feb:DEBUG: Chip address: 0x6
08:38:09:ST3_emu_feb:DEBUG: Chip address: 0x7
08:38:09:febtest:INFO: Init all SMX (CSA): 30
08:38:24:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:38:24:febtest:INFO: 23-00 | XA-000-09-004-018-011-010-00 | 6.1 | 1253.7
08:38:25:febtest:INFO: 30-01 | XA-000-09-004-018-017-012-03 | 18.7 | 1201.0
08:38:25:febtest:INFO: 21-02 | XA-000-09-004-018-014-009-11 | 37.7 | 1159.7
08:38:25:febtest:INFO: 28-03 | XA-000-09-004-018-012-011-08 | 31.4 | 1159.7
08:38:25:febtest:INFO: 19-04 | XA-000-09-004-018-015-009-06 | 15.6 | 1218.6
08:38:25:febtest:INFO: 26-05 | XA-000-09-004-018-015-011-06 | 31.4 | 1171.5
08:38:26:febtest:INFO: 17-06 | XA-000-09-004-018-012-010-08 | 18.7 | 1212.7
08:38:26:febtest:INFO: 24-07 | XA-000-09-004-018-014-010-11 | 15.6 | 1201.0
08:38:27:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:38:29:ST3_smx:INFO: chip: 23-0 6.141382 C 1282.867635 mV
08:38:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:29:ST3_smx:INFO: Electrons
08:38:34:ST3_smx:INFO: Total # of broken channels: 8
08:38:34:ST3_smx:INFO: List of broken channels: [12, 28, 33, 49, 56, 84, 85, 87]
08:38:34:ST3_smx:INFO: Total # of broken channels: 0
08:38:34:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:38:35:ST3_smx:INFO: chip: 30-1 15.590880 C 1253.730060 mV
08:38:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:35:ST3_smx:INFO: Electrons
08:38:40:ST3_smx:INFO: Total # of broken channels: 4
08:38:40:ST3_smx:INFO: List of broken channels: [1, 41, 50, 127]
08:38:40:ST3_smx:INFO: Total # of broken channels: 1
08:38:40:ST3_smx:INFO: List of broken channels: [1]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:38:42:ST3_smx:INFO: chip: 21-2 21.902970 C 1212.728715 mV
08:38:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:42:ST3_smx:INFO: Electrons
08:38:47:ST3_smx:INFO: Total # of broken channels: 4
08:38:47:ST3_smx:INFO: List of broken channels: [12, 37, 59, 75]
08:38:47:ST3_smx:INFO: Total # of broken channels: 0
08:38:47:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:38:49:ST3_smx:INFO: chip: 28-3 31.389742 C 1165.571835 mV
08:38:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:49:ST3_smx:INFO: Electrons
08:38:53:ST3_smx:INFO: Total # of broken channels: 7
08:38:53:ST3_smx:INFO: List of broken channels: [32, 44, 65, 74, 84, 101, 125]
08:38:53:ST3_smx:INFO: Total # of broken channels: 0
08:38:53:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:38:55:ST3_smx:INFO: chip: 19-4 21.902970 C 1224.468235 mV
08:38:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:38:55:ST3_smx:INFO: Electrons
08:39:00:ST3_smx:INFO: Total # of broken channels: 5
08:39:00:ST3_smx:INFO: List of broken channels: [6, 16, 27, 105, 124]
08:39:00:ST3_smx:INFO: Total # of broken channels: 0
08:39:00:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:39:02:ST3_smx:INFO: chip: 26-5 31.389742 C 1177.390875 mV
08:39:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:02:ST3_smx:INFO: Electrons
08:39:06:ST3_smx:INFO: Total # of broken channels: 5
08:39:06:ST3_smx:INFO: List of broken channels: [5, 57, 59, 71, 97]
08:39:06:ST3_smx:INFO: Total # of broken channels: 0
08:39:06:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:39:08:ST3_smx:INFO: chip: 17-6 21.902970 C 1224.468235 mV
08:39:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:08:ST3_smx:INFO: Electrons
08:39:13:ST3_smx:INFO: Total # of broken channels: 8
08:39:13:ST3_smx:INFO: List of broken channels: [16, 20, 25, 68, 83, 88, 108, 126]
08:39:13:ST3_smx:INFO: Total # of broken channels: 2
08:39:13:ST3_smx:INFO: List of broken channels: [75, 81]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:39:15:ST3_smx:INFO: chip: 24-7 21.902970 C 1212.728715 mV
08:39:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:39:15:ST3_smx:INFO: Electrons
08:39:20:ST3_smx:INFO: Total # of broken channels: 2
08:39:20:ST3_smx:INFO: List of broken channels: [19, 73]
08:39:20:ST3_smx:INFO: Total # of broken channels: 1
08:39:20:ST3_smx:INFO: List of broken channels: [76]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:39:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:39:20:febtest:INFO: 23-00 | XA-000-09-004-018-011-010-00 | 9.3 | 1288.7
08:39:20:febtest:INFO: 30-01 | XA-000-09-004-018-017-012-03 | 21.9 | 1242.0
08:39:21:febtest:INFO: 21-02 | XA-000-09-004-018-014-009-11 | 40.9 | 1183.3
08:39:21:febtest:INFO: 28-03 | XA-000-09-004-018-012-011-08 | 34.6 | 1177.4
08:39:21:febtest:INFO: 19-04 | XA-000-09-004-018-015-009-06 | 21.9 | 1253.7
08:39:21:febtest:INFO: 26-05 | XA-000-09-004-018-015-011-06 | 34.6 | 1183.3
08:39:22:febtest:INFO: 17-06 | XA-000-09-004-018-012-010-08 | 21.9 | 1242.0
08:39:22:febtest:INFO: 24-07 | XA-000-09-004-018-014-010-11 | 25.1 | 1224.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_07-08_37_57
OPERATOR : Robert V.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2458| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.4540', '1.846', '2.9780']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9330', '1.850', '2.5470']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9230', '1.850', '0.5237']