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FEB_2461 01.08.25 14:05:35
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14:05:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:05:35:ST3_Shared:INFO: FEB-Microcable
14:05:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:05:35:febtest:INFO: Testing FEB with SN 2461
==============================================OOO==============================================
14:05:37:smx_tester:INFO: Scanning setup
14:05:37:elinks:INFO: Disabling clock on downlink 0
14:05:37:elinks:INFO: Disabling clock on downlink 1
14:05:37:elinks:INFO: Disabling clock on downlink 2
14:05:37:elinks:INFO: Disabling clock on downlink 3
14:05:37:elinks:INFO: Disabling clock on downlink 4
14:05:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:05:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:37:elinks:INFO: Disabling clock on downlink 0
14:05:37:elinks:INFO: Disabling clock on downlink 1
14:05:37:elinks:INFO: Disabling clock on downlink 2
14:05:37:elinks:INFO: Disabling clock on downlink 3
14:05:37:elinks:INFO: Disabling clock on downlink 4
14:05:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:05:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:37:elinks:INFO: Disabling clock on downlink 0
14:05:37:elinks:INFO: Disabling clock on downlink 1
14:05:37:elinks:INFO: Disabling clock on downlink 2
14:05:37:elinks:INFO: Disabling clock on downlink 3
14:05:37:elinks:INFO: Disabling clock on downlink 4
14:05:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:05:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:05:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:05:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:05:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:05:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:05:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:05:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:38:elinks:INFO: Disabling clock on downlink 0
14:05:38:elinks:INFO: Disabling clock on downlink 1
14:05:38:elinks:INFO: Disabling clock on downlink 2
14:05:38:elinks:INFO: Disabling clock on downlink 3
14:05:38:elinks:INFO: Disabling clock on downlink 4
14:05:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:05:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:05:38:elinks:INFO: Disabling clock on downlink 0
14:05:38:elinks:INFO: Disabling clock on downlink 1
14:05:38:elinks:INFO: Disabling clock on downlink 2
14:05:38:elinks:INFO: Disabling clock on downlink 3
14:05:38:elinks:INFO: Disabling clock on downlink 4
14:05:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:05:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:05:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:05:38:setup_element:INFO: Scanning clock phase
14:05:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:05:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:05:38:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:05:38:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:05:38:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:05:38:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:05:38:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:05:38:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:05:38:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:05:38:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:05:38:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:05:38:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:05:38:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:05:38:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:05:38:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:05:38:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:05:38:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:05:38:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
14:05:38:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
14:05:38:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
14:05:38:setup_element:INFO: Scanning data phases
14:05:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:05:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:05:44:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:05:44:setup_element:INFO: Eye window for uplink 16: ___XXXXX________________________________
Data delay found: 25
14:05:44:setup_element:INFO: Eye window for uplink 17: _XXXXX__________________________________
Data delay found: 23
14:05:44:setup_element:INFO: Eye window for uplink 18: _XXXXX__________________________________
Data delay found: 23
14:05:44:setup_element:INFO: Eye window for uplink 19: _XXXXXX________________________________X
Data delay found: 22
14:05:44:setup_element:INFO: Eye window for uplink 20: _XXXXXXX________________________________
Data delay found: 24
14:05:44:setup_element:INFO: Eye window for uplink 21: __XXXXXXX_______________________________
Data delay found: 25
14:05:44:setup_element:INFO: Eye window for uplink 22: _XXXXX__________________________________
Data delay found: 23
14:05:44:setup_element:INFO: Eye window for uplink 23: XXXX___________________________________X
Data delay found: 21
14:05:44:setup_element:INFO: Eye window for uplink 24: ___________XXXXXX_______________________
Data delay found: 33
14:05:44:setup_element:INFO: Eye window for uplink 25: ____________XXXXXX______________________
Data delay found: 34
14:05:44:setup_element:INFO: Eye window for uplink 26: _____________XXXXX______________________
Data delay found: 35
14:05:44:setup_element:INFO: Eye window for uplink 27: _______________XXXXX____________________
Data delay found: 37
14:05:44:setup_element:INFO: Eye window for uplink 28: ___________________XXXXX________________
Data delay found: 1
14:05:44:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
14:05:44:setup_element:INFO: Eye window for uplink 30: ______________________XXXXXX____________
Data delay found: 4
14:05:44:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXXX______________
Data delay found: 2
14:05:44:setup_element:INFO: Setting the data phase to 25 for uplink 16
14:05:44:setup_element:INFO: Setting the data phase to 23 for uplink 17
14:05:44:setup_element:INFO: Setting the data phase to 23 for uplink 18
14:05:44:setup_element:INFO: Setting the data phase to 22 for uplink 19
14:05:44:setup_element:INFO: Setting the data phase to 24 for uplink 20
14:05:44:setup_element:INFO: Setting the data phase to 25 for uplink 21
14:05:44:setup_element:INFO: Setting the data phase to 23 for uplink 22
14:05:44:setup_element:INFO: Setting the data phase to 21 for uplink 23
14:05:44:setup_element:INFO: Setting the data phase to 33 for uplink 24
14:05:44:setup_element:INFO: Setting the data phase to 34 for uplink 25
14:05:44:setup_element:INFO: Setting the data phase to 35 for uplink 26
14:05:44:setup_element:INFO: Setting the data phase to 37 for uplink 27
14:05:44:setup_element:INFO: Setting the data phase to 1 for uplink 28
14:05:44:setup_element:INFO: Setting the data phase to 0 for uplink 29
14:05:44:setup_element:INFO: Setting the data phase to 4 for uplink 30
14:05:44:setup_element:INFO: Setting the data phase to 2 for uplink 31
==============================================OOO==============================================
14:05:44:setup_element:INFO: Beginning SMX ASICs map scan
14:05:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:05:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:05:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:05:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:05:44:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:05:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:05:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:05:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:05:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:05:44:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:05:44:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:05:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:05:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:05:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:05:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:05:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:05:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:05:45:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:05:45:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:05:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:05:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:05:47:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXXX_
Uplink 17: ______________________________________________________________________XXXXXXXXX_
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXXX__
Uplink 21: ______________________________________________________________________XXXXXXXX__
Uplink 22: _____________________________________________________________________XXXXXXXXX__
Uplink 23: _____________________________________________________________________XXXXXXXXX__
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXXXX_
Uplink 29: ______________________________________________________________________XXXXXXXXX_
Uplink 30: _______________________________________________________________________XXXXXXXXX
Uplink 31: _______________________________________________________________________XXXXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 17:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 18:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 19:
Optimal Phase: 22
Window Length: 32
Eye Window: _XXXXXX________________________________X
Uplink 20:
Optimal Phase: 24
Window Length: 33
Eye Window: _XXXXXXX________________________________
Uplink 21:
Optimal Phase: 25
Window Length: 33
Eye Window: __XXXXXXX_______________________________
Uplink 22:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 23:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 24:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 25:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 26:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 27:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 28:
Optimal Phase: 1
Window Length: 35
Eye Window: ___________________XXXXX________________
Uplink 29:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 30:
Optimal Phase: 4
Window Length: 34
Eye Window: ______________________XXXXXX____________
Uplink 31:
Optimal Phase: 2
Window Length: 33
Eye Window: ___________________XXXXXXX______________
==============================================OOO==============================================
14:05:47:setup_element:INFO: Performing Elink synchronization
14:05:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:05:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:05:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:05:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
14:05:47:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:05:47:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:05:47:ST3_emu_feb:DEBUG: Chip address: 0x0
14:05:47:ST3_emu_feb:DEBUG: Chip address: 0x1
14:05:47:ST3_emu_feb:DEBUG: Chip address: 0x2
14:05:47:ST3_emu_feb:DEBUG: Chip address: 0x3
14:05:47:ST3_emu_feb:DEBUG: Chip address: 0x4
14:05:47:ST3_emu_feb:DEBUG: Chip address: 0x5
14:05:47:ST3_emu_feb:DEBUG: Chip address: 0x6
14:05:47:ST3_emu_feb:DEBUG: Chip address: 0x7
14:05:47:febtest:INFO: Init all SMX (CSA): 30
14:06:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:06:02:febtest:INFO: 23-00 | XA-000-09-004-025-009-005-13 | 40.9 | 1165.6
14:06:03:febtest:INFO: 30-01 | XA-000-09-004-032-015-005-07 | 50.4 | 1124.0
14:06:03:febtest:INFO: 21-02 | XA-000-09-004-025-015-007-08 | 44.1 | 1159.7
14:06:03:febtest:INFO: 28-03 | XA-000-09-004-032-012-005-09 | 37.7 | 1159.7
14:06:03:febtest:INFO: 19-04 | XA-000-09-004-025-006-007-09 | 53.6 | 1130.0
14:06:03:febtest:INFO: 26-05 | XA-000-09-004-032-012-003-09 | 40.9 | 1147.8
14:06:04:febtest:INFO: 17-06 | XA-000-09-004-025-006-005-09 | 44.1 | 1165.6
14:06:04:febtest:INFO: 24-07 | XA-000-09-004-025-009-007-13 | 37.7 | 1165.6
14:06:05:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:06:07:ST3_smx:INFO: chip: 23-0 40.898880 C 1183.292940 mV
14:06:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:07:ST3_smx:INFO: Electrons
14:06:12:ST3_smx:INFO: Total # of broken channels: 11
14:06:12:ST3_smx:INFO: List of broken channels: [17, 29, 35, 40, 41, 44, 45, 50, 55, 98, 121]
14:06:12:ST3_smx:INFO: Total # of broken channels: 0
14:06:12:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:06:14:ST3_smx:INFO: chip: 30-1 50.430383 C 1135.937260 mV
14:06:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:14:ST3_smx:INFO: Electrons
14:06:18:ST3_smx:INFO: Total # of broken channels: 2
14:06:18:ST3_smx:INFO: List of broken channels: [1, 59]
14:06:18:ST3_smx:INFO: Total # of broken channels: 0
14:06:18:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:06:20:ST3_smx:INFO: chip: 21-2 40.898880 C 1171.483840 mV
14:06:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:20:ST3_smx:INFO: Electrons
14:06:25:ST3_smx:INFO: Total # of broken channels: 5
14:06:25:ST3_smx:INFO: List of broken channels: [18, 41, 97, 111, 126]
14:06:25:ST3_smx:INFO: Total # of broken channels: 1
14:06:25:ST3_smx:INFO: List of broken channels: [40]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:06:27:ST3_smx:INFO: chip: 28-3 37.726682 C 1171.483840 mV
14:06:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:27:ST3_smx:INFO: Electrons
14:06:31:ST3_smx:INFO: Total # of broken channels: 4
14:06:31:ST3_smx:INFO: List of broken channels: [11, 32, 39, 112]
14:06:31:ST3_smx:INFO: Total # of broken channels: 0
14:06:31:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:06:33:ST3_smx:INFO: chip: 19-4 50.430383 C 1141.874115 mV
14:06:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:33:ST3_smx:INFO: Electrons
14:06:38:ST3_smx:INFO: Total # of broken channels: 8
14:06:38:ST3_smx:INFO: List of broken channels: [1, 11, 32, 55, 75, 87, 97, 102]
14:06:38:ST3_smx:INFO: Total # of broken channels: 10
14:06:38:ST3_smx:INFO: List of broken channels: [4, 6, 12, 20, 22, 28, 30, 32, 40, 56]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:06:39:ST3_smx:INFO: chip: 26-5 40.898880 C 1165.571835 mV
14:06:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:39:ST3_smx:INFO: Electrons
14:06:44:ST3_smx:INFO: Total # of broken channels: 7
14:06:44:ST3_smx:INFO: List of broken channels: [14, 16, 19, 66, 77, 79, 108]
14:06:44:ST3_smx:INFO: Total # of broken channels: 1
14:06:44:ST3_smx:INFO: List of broken channels: [26]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:06:46:ST3_smx:INFO: chip: 17-6 40.898880 C 1177.390875 mV
14:06:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:46:ST3_smx:INFO: Electrons
14:06:51:ST3_smx:INFO: Total # of broken channels: 6
14:06:51:ST3_smx:INFO: List of broken channels: [52, 63, 71, 85, 98, 124]
14:06:51:ST3_smx:INFO: Total # of broken channels: 0
14:06:51:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:06:53:ST3_smx:INFO: chip: 24-7 37.726682 C 1177.390875 mV
14:06:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:06:53:ST3_smx:INFO: Electrons
14:06:57:ST3_smx:INFO: Total # of broken channels: 5
14:06:57:ST3_smx:INFO: List of broken channels: [21, 63, 88, 108, 123]
14:06:57:ST3_smx:INFO: Total # of broken channels: 0
14:06:57:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:06:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:06:58:febtest:INFO: 23-00 | XA-000-09-004-025-009-005-13 | 40.9 | 1206.9
14:06:58:febtest:INFO: 30-01 | XA-000-09-004-032-015-005-07 | 47.3 | 1159.7
14:06:58:febtest:INFO: 21-02 | XA-000-09-004-025-015-007-08 | 40.9 | 1195.1
14:06:59:febtest:INFO: 28-03 | XA-000-09-004-032-012-005-09 | 37.7 | 1195.1
14:06:59:febtest:INFO: 19-04 | XA-000-09-004-025-006-007-09 | 50.4 | 1159.7
14:06:59:febtest:INFO: 26-05 | XA-000-09-004-032-012-003-09 | 44.1 | 1189.2
14:06:59:febtest:INFO: 17-06 | XA-000-09-004-025-006-005-09 | 44.1 | 1195.1
14:06:59:febtest:INFO: 24-07 | XA-000-09-004-025-009-007-13 | 40.9 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_08_01-14_05_35
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2461| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0410', '1.851', '2.6040']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0430', '1.850', '2.5760']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0050', '1.850', '0.5248']