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FEB_2461 01.08.25 11:04:15
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11:04:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:04:15:ST3_Shared:INFO: FEB-Microcable
11:04:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:04:15:febtest:INFO: Testing FEB with SN 2461
==============================================OOO==============================================
11:04:17:smx_tester:INFO: Scanning setup
11:04:17:elinks:INFO: Disabling clock on downlink 0
11:04:17:elinks:INFO: Disabling clock on downlink 1
11:04:17:elinks:INFO: Disabling clock on downlink 2
11:04:17:elinks:INFO: Disabling clock on downlink 3
11:04:17:elinks:INFO: Disabling clock on downlink 4
11:04:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:04:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:17:elinks:INFO: Disabling clock on downlink 0
11:04:17:elinks:INFO: Disabling clock on downlink 1
11:04:17:elinks:INFO: Disabling clock on downlink 2
11:04:17:elinks:INFO: Disabling clock on downlink 3
11:04:17:elinks:INFO: Disabling clock on downlink 4
11:04:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:04:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:17:elinks:INFO: Disabling clock on downlink 0
11:04:17:elinks:INFO: Disabling clock on downlink 1
11:04:17:elinks:INFO: Disabling clock on downlink 2
11:04:17:elinks:INFO: Disabling clock on downlink 3
11:04:17:elinks:INFO: Disabling clock on downlink 4
11:04:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:04:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:04:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:04:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:04:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:04:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:04:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:04:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:04:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:18:elinks:INFO: Disabling clock on downlink 0
11:04:18:elinks:INFO: Disabling clock on downlink 1
11:04:18:elinks:INFO: Disabling clock on downlink 2
11:04:18:elinks:INFO: Disabling clock on downlink 3
11:04:18:elinks:INFO: Disabling clock on downlink 4
11:04:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:04:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:18:elinks:INFO: Disabling clock on downlink 0
11:04:18:elinks:INFO: Disabling clock on downlink 1
11:04:18:elinks:INFO: Disabling clock on downlink 2
11:04:18:elinks:INFO: Disabling clock on downlink 3
11:04:18:elinks:INFO: Disabling clock on downlink 4
11:04:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:04:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:04:18:setup_element:INFO: Scanning clock phase
11:04:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:18:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:04:18:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:04:18:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:04:18:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
11:04:18:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
11:04:18:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:04:18:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:04:18:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:04:18:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:04:18:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
11:04:18:setup_element:INFO: Scanning data phases
11:04:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:23:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:04:23:setup_element:INFO: Eye window for uplink 24: _____________XXXXXX_____________________
Data delay found: 35
11:04:23:setup_element:INFO: Eye window for uplink 25: ______________XXXXXX____________________
Data delay found: 36
11:04:23:setup_element:INFO: Eye window for uplink 26: ______________XXXXXX____________________
Data delay found: 36
11:04:23:setup_element:INFO: Eye window for uplink 27: ________________XXXXXX__________________
Data delay found: 38
11:04:23:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXX_______________
Data delay found: 1
11:04:23:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________
Data delay found: 1
11:04:23:setup_element:INFO: Eye window for uplink 30: ______________________XXXXXX____________
Data delay found: 4
11:04:23:setup_element:INFO: Eye window for uplink 31: _____________________XXXXXX_____________
Data delay found: 3
11:04:23:setup_element:INFO: Setting the data phase to 35 for uplink 24
11:04:23:setup_element:INFO: Setting the data phase to 36 for uplink 25
11:04:23:setup_element:INFO: Setting the data phase to 36 for uplink 26
11:04:23:setup_element:INFO: Setting the data phase to 38 for uplink 27
11:04:23:setup_element:INFO: Setting the data phase to 1 for uplink 28
11:04:23:setup_element:INFO: Setting the data phase to 1 for uplink 29
11:04:23:setup_element:INFO: Setting the data phase to 4 for uplink 30
11:04:23:setup_element:INFO: Setting the data phase to 3 for uplink 31
==============================================OOO==============================================
11:04:24:setup_element:INFO: Beginning SMX ASICs map scan
11:04:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:04:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:04:24:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:04:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:04:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:04:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:04:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:04:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:04:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:04:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:04:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:04:26:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: _____________________________________________________________________XXXXXXX____
Uplink 29: _____________________________________________________________________XXXXXXX____
Uplink 30: _____________________________________________________________________XXXXXXXXX__
Uplink 31: _____________________________________________________________________XXXXXXXXX__
Data phase characteristics:
Uplink 24:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 25:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 26:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 27:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 28:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 29:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 30:
Optimal Phase: 4
Window Length: 34
Eye Window: ______________________XXXXXX____________
Uplink 31:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
==============================================OOO==============================================
11:04:26:setup_element:INFO: Performing Elink synchronization
11:04:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:04:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
11:04:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:04:26:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:04:27:ST3_emu_feb:DEBUG: Chip address: 0x1
11:04:27:ST3_emu_feb:DEBUG: Chip address: 0x3
11:04:27:ST3_emu_feb:DEBUG: Chip address: 0x5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
11:04:27:ST3_emu_feb:DEBUG: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
11:04:27:febtest:INFO: Init all SMX (CSA): 30
11:04:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:04:34:febtest:INFO: 30-01 | XA-000-09-004-032-015-005-07 | 40.9 | 1130.0
11:04:34:febtest:INFO: 28-03 | XA-000-09-004-032-012-005-09 | 31.4 | 1165.6
11:04:34:febtest:INFO: 26-05 | XA-000-09-004-032-012-003-09 | 34.6 | 1153.7
11:04:35:febtest:INFO: 24-07 | XA-000-09-004-025-009-007-13 | 31.4 | 1159.7
11:04:36:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:04:38:ST3_smx:INFO: chip: 30-1 40.898880 C 1135.937260 mV
11:04:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:38:ST3_smx:INFO: Electrons
11:04:42:ST3_smx:INFO: Total # of broken channels: 5
11:04:42:ST3_smx:INFO: List of broken channels: [21, 42, 80, 84, 97]
11:04:42:ST3_smx:INFO: Total # of broken channels: 0
11:04:42:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:04:44:ST3_smx:INFO: chip: 28-3 28.225000 C 1171.483840 mV
11:04:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:44:ST3_smx:INFO: Electrons
11:04:49:ST3_smx:INFO: Total # of broken channels: 7
11:04:49:ST3_smx:INFO: List of broken channels: [1, 44, 72, 76, 101, 108, 112]
11:04:49:ST3_smx:INFO: Total # of broken channels: 0
11:04:49:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:04:51:ST3_smx:INFO: chip: 26-5 34.556970 C 1165.571835 mV
11:04:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:51:ST3_smx:INFO: Electrons
11:04:55:ST3_smx:INFO: Total # of broken channels: 8
11:04:55:ST3_smx:INFO: List of broken channels: [12, 48, 49, 102, 106, 116, 117, 121]
11:04:55:ST3_smx:INFO: Total # of broken channels: 0
11:04:55:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:04:57:ST3_smx:INFO: chip: 24-7 31.389742 C 1171.483840 mV
11:04:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:57:ST3_smx:INFO: Electrons
11:05:02:ST3_smx:INFO: Total # of broken channels: 9
11:05:02:ST3_smx:INFO: List of broken channels: [4, 10, 31, 52, 71, 73, 77, 90, 127]
11:05:02:ST3_smx:INFO: Total # of broken channels: 0
11:05:02:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:05:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:05:02:febtest:INFO: 30-01 | XA-000-09-004-032-015-005-07 | 40.9 | 1159.7
11:05:03:febtest:INFO: 28-03 | XA-000-09-004-032-012-005-09 | 31.4 | 1195.1
11:05:03:febtest:INFO: 26-05 | XA-000-09-004-032-012-003-09 | 34.6 | 1189.2
11:05:03:febtest:INFO: 24-07 | XA-000-09-004-025-009-007-13 | 31.4 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_08_01-11_04_15
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2461| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7658', '1.848', '1.2650']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0200', '1.850', '1.2910']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0010', '1.850', '0.2668']