
FEB_2462 07.08.25 12:49:48
TextEdit.txt
12:49:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:49:48:ST3_Shared:INFO: FEB-Microcable 12:49:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:49:48:febtest:INFO: Testing FEB with SN 2462 ==============================================OOO============================================== 12:49:50:smx_tester:INFO: Scanning setup 12:49:50:elinks:INFO: Disabling clock on downlink 0 12:49:50:elinks:INFO: Disabling clock on downlink 1 12:49:50:elinks:INFO: Disabling clock on downlink 2 12:49:50:elinks:INFO: Disabling clock on downlink 3 12:49:50:elinks:INFO: Disabling clock on downlink 4 12:49:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:49:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:50:elinks:INFO: Disabling clock on downlink 0 12:49:50:elinks:INFO: Disabling clock on downlink 1 12:49:50:elinks:INFO: Disabling clock on downlink 2 12:49:50:elinks:INFO: Disabling clock on downlink 3 12:49:50:elinks:INFO: Disabling clock on downlink 4 12:49:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:49:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:50:elinks:INFO: Disabling clock on downlink 0 12:49:50:elinks:INFO: Disabling clock on downlink 1 12:49:50:elinks:INFO: Disabling clock on downlink 2 12:49:50:elinks:INFO: Disabling clock on downlink 3 12:49:50:elinks:INFO: Disabling clock on downlink 4 12:49:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 12:49:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 12:49:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:50:elinks:INFO: Disabling clock on downlink 0 12:49:50:elinks:INFO: Disabling clock on downlink 1 12:49:50:elinks:INFO: Disabling clock on downlink 2 12:49:50:elinks:INFO: Disabling clock on downlink 3 12:49:50:elinks:INFO: Disabling clock on downlink 4 12:49:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:49:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:50:elinks:INFO: Disabling clock on downlink 0 12:49:50:elinks:INFO: Disabling clock on downlink 1 12:49:50:elinks:INFO: Disabling clock on downlink 2 12:49:50:elinks:INFO: Disabling clock on downlink 3 12:49:50:elinks:INFO: Disabling clock on downlink 4 12:49:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:49:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 12:49:51:setup_element:INFO: Scanning clock phase 12:49:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:49:51:setup_element:INFO: Clock phase scan results for group 0, downlink 2 12:49:51:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:49:51:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:49:51:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:49:51:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:49:51:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:49:51:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:49:51:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 12:49:51:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 12:49:51:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 12:49:51:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 12:49:51:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:49:51:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:49:51:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:49:51:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:49:51:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:49:51:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:49:51:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 ==============================================OOO============================================== 12:49:51:setup_element:INFO: Scanning data phases 12:49:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:49:56:setup_element:INFO: Data phase scan results for group 0, downlink 2 12:49:56:setup_element:INFO: Eye window for uplink 16: _XXXXX__________________________________ Data delay found: 23 12:49:56:setup_element:INFO: Eye window for uplink 17: XXXX__________________________________XX Data delay found: 20 12:49:56:setup_element:INFO: Eye window for uplink 18: __XXXXXX________________________________ Data delay found: 24 12:49:56:setup_element:INFO: Eye window for uplink 19: ___XXXXXX_______________________________ Data delay found: 25 12:49:56:setup_element:INFO: Eye window for uplink 20: __XXXXXXX_______________________________ Data delay found: 25 12:49:56:setup_element:INFO: Eye window for uplink 21: ___XXXXXXX______________________________ Data delay found: 26 12:49:56:setup_element:INFO: Eye window for uplink 22: _XXXXX__________________________________ Data delay found: 23 12:49:56:setup_element:INFO: Eye window for uplink 23: XXXX___________________________________X Data delay found: 21 12:49:56:setup_element:INFO: Eye window for uplink 24: ____________XXXXXXX_____________________ Data delay found: 35 12:49:56:setup_element:INFO: Eye window for uplink 25: ______________XXXXXX____________________ Data delay found: 36 12:49:56:setup_element:INFO: Eye window for uplink 26: ________________XXXXXX__________________ Data delay found: 38 12:49:56:setup_element:INFO: Eye window for uplink 27: __________________XXXXXX________________ Data delay found: 0 12:49:56:setup_element:INFO: Eye window for uplink 28: _____________________XXXXX______________ Data delay found: 3 12:49:56:setup_element:INFO: Eye window for uplink 29: _____________________XXXX_______________ Data delay found: 2 12:49:56:setup_element:INFO: Eye window for uplink 30: ______________________XXXXXX____________ Data delay found: 4 12:49:56:setup_element:INFO: Eye window for uplink 31: ___________________X_XXXXX______________ Data delay found: 2 12:49:56:setup_element:INFO: Setting the data phase to 23 for uplink 16 12:49:56:setup_element:INFO: Setting the data phase to 20 for uplink 17 12:49:56:setup_element:INFO: Setting the data phase to 24 for uplink 18 12:49:56:setup_element:INFO: Setting the data phase to 25 for uplink 19 12:49:56:setup_element:INFO: Setting the data phase to 25 for uplink 20 12:49:56:setup_element:INFO: Setting the data phase to 26 for uplink 21 12:49:56:setup_element:INFO: Setting the data phase to 23 for uplink 22 12:49:56:setup_element:INFO: Setting the data phase to 21 for uplink 23 12:49:56:setup_element:INFO: Setting the data phase to 35 for uplink 24 12:49:56:setup_element:INFO: Setting the data phase to 36 for uplink 25 12:49:56:setup_element:INFO: Setting the data phase to 38 for uplink 26 12:49:56:setup_element:INFO: Setting the data phase to 0 for uplink 27 12:49:56:setup_element:INFO: Setting the data phase to 3 for uplink 28 12:49:56:setup_element:INFO: Setting the data phase to 2 for uplink 29 12:49:56:setup_element:INFO: Setting the data phase to 4 for uplink 30 12:49:56:setup_element:INFO: Setting the data phase to 2 for uplink 31 ==============================================OOO============================================== 12:49:56:setup_element:INFO: Beginning SMX ASICs map scan 12:49:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:49:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:49:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:49:56:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 12:49:56:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 12:49:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 12:49:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 12:49:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 12:49:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 12:49:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 12:49:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 12:49:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 12:49:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 12:49:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 12:49:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 12:49:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 12:49:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 12:49:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 12:49:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 12:49:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 12:49:59:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 16: _____________________________________________________________________XXXXXXXX___ Uplink 17: _____________________________________________________________________XXXXXXXX___ Uplink 18: ______________________________________________________________________XXXXXXXX__ Uplink 19: ______________________________________________________________________XXXXXXXX__ Uplink 20: ______________________________________________________________________XXXXXXXX__ Uplink 21: ______________________________________________________________________XXXXXXXX__ Uplink 22: ____________________________________________________________________XXXXXXXXX___ Uplink 23: ____________________________________________________________________XXXXXXXXX___ Uplink 24: ______________________________________________________________________XXXXXXX___ Uplink 25: ______________________________________________________________________XXXXXXX___ Uplink 26: _____________________________________________________________________XXXXXXXX___ Uplink 27: _____________________________________________________________________XXXXXXXX___ Uplink 28: _____________________________________________________________________XXXXXXXXX__ Uplink 29: _____________________________________________________________________XXXXXXXXX__ Uplink 30: _______________________________________________________________________XXXXXXX__ Uplink 31: _______________________________________________________________________XXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 17: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 18: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 19: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 20: Optimal Phase: 25 Window Length: 33 Eye Window: __XXXXXXX_______________________________ Uplink 21: Optimal Phase: 26 Window Length: 33 Eye Window: ___XXXXXXX______________________________ Uplink 22: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 23: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 24: Optimal Phase: 35 Window Length: 33 Eye Window: ____________XXXXXXX_____________________ Uplink 25: Optimal Phase: 36 Window Length: 34 Eye Window: ______________XXXXXX____________________ Uplink 26: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 27: Optimal Phase: 0 Window Length: 34 Eye Window: __________________XXXXXX________________ Uplink 28: Optimal Phase: 3 Window Length: 35 Eye Window: _____________________XXXXX______________ Uplink 29: Optimal Phase: 2 Window Length: 36 Eye Window: _____________________XXXX_______________ Uplink 30: Optimal Phase: 4 Window Length: 34 Eye Window: ______________________XXXXXX____________ Uplink 31: Optimal Phase: 2 Window Length: 33 Eye Window: ___________________X_XXXXX______________ ==============================================OOO============================================== 12:49:59:setup_element:INFO: Performing Elink synchronization 12:49:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:49:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:49:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 12:49:59:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 12:49:59:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 12:50:00:ST3_emu_feb:DEBUG: Chip address: 0x0 12:50:00:ST3_emu_feb:DEBUG: Chip address: 0x1 12:50:00:ST3_emu_feb:DEBUG: Chip address: 0x2 12:50:00:ST3_emu_feb:DEBUG: Chip address: 0x3 12:50:00:ST3_emu_feb:DEBUG: Chip address: 0x4 12:50:00:ST3_emu_feb:DEBUG: Chip address: 0x5 12:50:00:ST3_emu_feb:DEBUG: Chip address: 0x6 12:50:00:ST3_emu_feb:DEBUG: Chip address: 0x7 12:50:00:febtest:INFO: Init all SMX (CSA): 30 12:50:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:50:14:febtest:INFO: 23-00 | XA-000-09-004-025-003-009-02 | 21.9 | 1177.4 12:50:14:febtest:INFO: 30-01 | XA-000-09-004-032-005-016-15 | 28.2 | 1165.6 12:50:14:febtest:INFO: 21-02 | XA-000-09-004-025-012-008-06 | 34.6 | 1147.8 12:50:14:febtest:INFO: 28-03 | XA-000-09-004-025-003-010-02 | 21.9 | 1183.3 12:50:15:febtest:INFO: 19-04 | XA-000-09-004-025-015-008-08 | 21.9 | 1189.2 12:50:15:febtest:INFO: 26-05 | XA-000-09-004-025-015-011-08 | 28.2 | 1159.7 12:50:15:febtest:INFO: 17-06 | XA-000-09-004-025-006-009-09 | 31.4 | 1147.8 12:50:15:febtest:INFO: 24-07 | XA-000-09-004-032-017-018-05 | 15.6 | 1189.2 12:50:16:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 12:50:18:ST3_smx:INFO: chip: 23-0 25.062742 C 1189.190035 mV 12:50:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:18:ST3_smx:INFO: Electrons 12:50:23:ST3_smx:INFO: Total # of broken channels: 4 12:50:23:ST3_smx:INFO: List of broken channels: [3, 49, 82, 98] 12:50:23:ST3_smx:INFO: Total # of broken channels: 4 12:50:23:ST3_smx:INFO: List of broken channels: [100, 108, 118, 120] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:50:25:ST3_smx:INFO: chip: 30-1 28.225000 C 1183.292940 mV 12:50:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:25:ST3_smx:INFO: Electrons 12:50:30:ST3_smx:INFO: Total # of broken channels: 7 12:50:30:ST3_smx:INFO: List of broken channels: [5, 31, 34, 39, 65, 75, 98] 12:50:30:ST3_smx:INFO: Total # of broken channels: 2 12:50:30:ST3_smx:INFO: List of broken channels: [31, 115] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:50:32:ST3_smx:INFO: chip: 21-2 34.556970 C 1159.654860 mV 12:50:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:32:ST3_smx:INFO: Electrons 12:50:37:ST3_smx:INFO: Total # of broken channels: 18 12:50:37:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 12, 13, 16, 17, 24, 27, 28, 61, 68, 89, 101, 107] 12:50:37:ST3_smx:INFO: Total # of broken channels: 49 12:50:37:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 17, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 58, 62, 64, 68, 70, 72, 74, 76, 78, 82, 84, 86, 88, 90, 92, 94, 96, 98, 102, 104, 108, 114] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:50:39:ST3_smx:INFO: chip: 28-3 21.902970 C 1206.851500 mV 12:50:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:39:ST3_smx:INFO: Electrons 12:50:43:ST3_smx:INFO: Total # of broken channels: 11 12:50:43:ST3_smx:INFO: List of broken channels: [17, 34, 37, 47, 57, 69, 71, 82, 104, 118, 122] 12:50:43:ST3_smx:INFO: Total # of broken channels: 6 12:50:43:ST3_smx:INFO: List of broken channels: [34, 74, 78, 88, 100, 106] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:50:45:ST3_smx:INFO: chip: 19-4 21.902970 C 1200.969315 mV 12:50:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:45:ST3_smx:INFO: Electrons 12:50:50:ST3_smx:INFO: Total # of broken channels: 10 12:50:50:ST3_smx:INFO: List of broken channels: [11, 32, 50, 51, 87, 89, 90, 97, 119, 127] 12:50:50:ST3_smx:INFO: Total # of broken channels: 16 12:50:50:ST3_smx:INFO: List of broken channels: [10, 28, 32, 34, 36, 46, 48, 50, 54, 62, 76, 86, 88, 110, 116, 127] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:50:52:ST3_smx:INFO: chip: 26-5 28.225000 C 1171.483840 mV 12:50:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:52:ST3_smx:INFO: Electrons 12:50:56:ST3_smx:INFO: Total # of broken channels: 7 12:50:56:ST3_smx:INFO: List of broken channels: [63, 64, 67, 96, 107, 120, 124] 12:50:56:ST3_smx:INFO: Total # of broken channels: 5 12:50:56:ST3_smx:INFO: List of broken channels: [14, 40, 63, 104, 110] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:50:58:ST3_smx:INFO: chip: 17-6 31.389742 C 1153.732915 mV 12:50:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:58:ST3_smx:INFO: Electrons 12:51:03:ST3_smx:INFO: Total # of broken channels: 1 12:51:03:ST3_smx:INFO: List of broken channels: [82] 12:51:03:ST3_smx:INFO: Total # of broken channels: 1 12:51:03:ST3_smx:INFO: List of broken channels: [59] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:51:05:ST3_smx:INFO: chip: 24-7 18.745682 C 1200.969315 mV 12:51:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:51:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:51:05:ST3_smx:INFO: Electrons 12:51:10:ST3_smx:INFO: Total # of broken channels: 8 12:51:10:ST3_smx:INFO: List of broken channels: [6, 34, 71, 77, 90, 98, 108, 124] 12:51:10:ST3_smx:INFO: Total # of broken channels: 7 12:51:10:ST3_smx:INFO: List of broken channels: [6, 34, 38, 44, 78, 82, 94] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:51:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:51:10:febtest:INFO: 23-00 | XA-000-09-004-025-003-009-02 | 28.2 | 1212.7 12:51:10:febtest:INFO: 30-01 | XA-000-09-004-032-005-016-15 | 28.2 | 1224.5 12:51:11:febtest:INFO: 21-02 | XA-000-09-004-025-012-008-06 | 37.7 | 1183.3 12:51:11:febtest:INFO: 28-03 | XA-000-09-004-025-003-010-02 | 21.9 | 1247.9 12:51:11:febtest:INFO: 19-04 | XA-000-09-004-025-015-008-08 | 21.9 | 1224.5 12:51:11:febtest:INFO: 26-05 | XA-000-09-004-025-015-011-08 | 31.4 | 1195.1 12:51:12:febtest:INFO: 17-06 | XA-000-09-004-025-006-009-09 | 34.6 | 1177.4 12:51:12:febtest:INFO: 24-07 | XA-000-09-004-032-017-018-05 | 18.7 | 1224.5 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_08_07-12_49_48 OPERATOR : Kerstin S.; Carmen S.; Irakli K.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2462| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8130', '1.848', '1.9340'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9980', '1.849', '2.5860'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9720', '1.850', '0.5182']