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FEB_2463 05.08.25 14:16:45
Info
14:16:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:16:45:ST3_Shared:INFO: FEB-Sensor
14:16:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:16:56:ST3_ModuleSelector:INFO: M3UL1T1010121B2
14:16:56:ST3_ModuleSelector:INFO: 21252
14:16:56:febtest:INFO: Testing FEB with SN 2463
==============================================OOO==============================================
14:16:58:smx_tester:INFO: Scanning setup
14:16:58:elinks:INFO: Disabling clock on downlink 0
14:16:58:elinks:INFO: Disabling clock on downlink 1
14:16:58:elinks:INFO: Disabling clock on downlink 2
14:16:58:elinks:INFO: Disabling clock on downlink 3
14:16:58:elinks:INFO: Disabling clock on downlink 4
14:16:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:16:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:16:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:16:58:elinks:INFO: Disabling clock on downlink 0
14:16:58:elinks:INFO: Disabling clock on downlink 1
14:16:58:elinks:INFO: Disabling clock on downlink 2
14:16:58:elinks:INFO: Disabling clock on downlink 3
14:16:58:elinks:INFO: Disabling clock on downlink 4
14:16:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:16:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:16:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:16:58:elinks:INFO: Disabling clock on downlink 0
14:16:58:elinks:INFO: Disabling clock on downlink 1
14:16:58:elinks:INFO: Disabling clock on downlink 2
14:16:58:elinks:INFO: Disabling clock on downlink 3
14:16:58:elinks:INFO: Disabling clock on downlink 4
14:16:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:16:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:16:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:16:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:16:58:elinks:INFO: Disabling clock on downlink 0
14:16:58:elinks:INFO: Disabling clock on downlink 1
14:16:58:elinks:INFO: Disabling clock on downlink 2
14:16:58:elinks:INFO: Disabling clock on downlink 3
14:16:58:elinks:INFO: Disabling clock on downlink 4
14:16:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:16:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:16:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:16:59:elinks:INFO: Disabling clock on downlink 0
14:16:59:elinks:INFO: Disabling clock on downlink 1
14:16:59:elinks:INFO: Disabling clock on downlink 2
14:16:59:elinks:INFO: Disabling clock on downlink 3
14:16:59:elinks:INFO: Disabling clock on downlink 4
14:16:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:16:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:16:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:16:59:setup_element:INFO: Scanning clock phase
14:16:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:16:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:16:59:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:16:59:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXX_______
Clock Delay: 31
14:16:59:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXX_______
Clock Delay: 31
14:16:59:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:16:59:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:16:59:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:16:59:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:16:59:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:16:59:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:16:59:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:16:59:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:16:59:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:16:59:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:16:59:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:16:59:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:16:59:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:16:59:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:16:59:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
==============================================OOO==============================================
14:16:59:setup_element:INFO: Scanning data phases
14:16:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:16:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:17:05:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:17:05:setup_element:INFO: Eye window for uplink 16: __XXXX__________________________________
Data delay found: 23
14:17:05:setup_element:INFO: Eye window for uplink 17: XXXXX__________________________________X
Data delay found: 21
14:17:05:setup_element:INFO: Eye window for uplink 18: __XXXXXX________________________________
Data delay found: 24
14:17:05:setup_element:INFO: Eye window for uplink 19: __XXXXXX________________________________
Data delay found: 24
14:17:05:setup_element:INFO: Eye window for uplink 20: ___XXXX_________________________________
Data delay found: 24
14:17:05:setup_element:INFO: Eye window for uplink 21: ___XXXXX________________________________
Data delay found: 25
14:17:05:setup_element:INFO: Eye window for uplink 22: _XXXXX_________________________________X
Data delay found: 22
14:17:05:setup_element:INFO: Eye window for uplink 23: XXXX__________________________________XX
Data delay found: 20
14:17:05:setup_element:INFO: Eye window for uplink 24: ___________XXXXXX_______________________
Data delay found: 33
14:17:05:setup_element:INFO: Eye window for uplink 25: _____________XXXXX______________________
Data delay found: 35
14:17:05:setup_element:INFO: Eye window for uplink 26: ________________XXXXXX__________________
Data delay found: 38
14:17:05:setup_element:INFO: Eye window for uplink 27: _________________XXXXXXX________________
Data delay found: 0
14:17:05:setup_element:INFO: Eye window for uplink 28: __________________XXXXXX________________
Data delay found: 0
14:17:05:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
14:17:05:setup_element:INFO: Eye window for uplink 30: ___________________XXXXXX_______________
Data delay found: 1
14:17:05:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
14:17:05:setup_element:INFO: Setting the data phase to 23 for uplink 16
14:17:05:setup_element:INFO: Setting the data phase to 21 for uplink 17
14:17:05:setup_element:INFO: Setting the data phase to 24 for uplink 18
14:17:05:setup_element:INFO: Setting the data phase to 24 for uplink 19
14:17:05:setup_element:INFO: Setting the data phase to 24 for uplink 20
14:17:05:setup_element:INFO: Setting the data phase to 25 for uplink 21
14:17:05:setup_element:INFO: Setting the data phase to 22 for uplink 22
14:17:05:setup_element:INFO: Setting the data phase to 20 for uplink 23
14:17:05:setup_element:INFO: Setting the data phase to 33 for uplink 24
14:17:05:setup_element:INFO: Setting the data phase to 35 for uplink 25
14:17:05:setup_element:INFO: Setting the data phase to 38 for uplink 26
14:17:05:setup_element:INFO: Setting the data phase to 0 for uplink 27
14:17:05:setup_element:INFO: Setting the data phase to 0 for uplink 28
14:17:05:setup_element:INFO: Setting the data phase to 0 for uplink 29
14:17:05:setup_element:INFO: Setting the data phase to 1 for uplink 30
14:17:05:setup_element:INFO: Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
14:17:05:setup_element:INFO: Beginning SMX ASICs map scan
14:17:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:17:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:17:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:17:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:17:05:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:17:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:17:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:17:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:17:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:17:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:17:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:17:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:17:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:17:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:17:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:17:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:17:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:17:06:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:17:06:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:17:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:17:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:17:08:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 16: ______________________________________________________________________XXX_______
Uplink 17: ______________________________________________________________________XXX_______
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: _______________________________________________________________________XXXXXXX__
Uplink 29: _______________________________________________________________________XXXXXXX__
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 17:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 18:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 19:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 20:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 21:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 22:
Optimal Phase: 22
Window Length: 33
Eye Window: _XXXXX_________________________________X
Uplink 23:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 24:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 25:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 26:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 27:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 28:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 29:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 30:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 31:
Optimal Phase: 39
Window Length: 33
Eye Window: ________________XXXXXXX_________________
==============================================OOO==============================================
14:17:08:setup_element:INFO: Performing Elink synchronization
14:17:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:17:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:17:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:17:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
14:17:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:17:08:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:17:08:ST3_emu_feb:DEBUG: Chip address: 0x0
14:17:08:ST3_emu_feb:DEBUG: Chip address: 0x1
14:17:08:ST3_emu_feb:DEBUG: Chip address: 0x2
14:17:08:ST3_emu_feb:DEBUG: Chip address: 0x3
14:17:08:ST3_emu_feb:DEBUG: Chip address: 0x4
14:17:08:ST3_emu_feb:DEBUG: Chip address: 0x5
14:17:08:ST3_emu_feb:DEBUG: Chip address: 0x6
14:17:08:ST3_emu_feb:DEBUG: Chip address: 0x7
14:17:09:febtest:INFO: Init all SMX (CSA): 30
14:17:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:17:22:febtest:INFO: 23-00 | XA-000-09-004-011-008-002-06 | 31.4 | 1165.6
14:17:22:febtest:INFO: 30-01 | XA-000-09-004-011-013-024-10 | 25.1 | 1183.3
14:17:23:febtest:INFO: 21-02 | XA-000-09-004-011-013-025-10 | 25.1 | 1189.2
14:17:23:febtest:INFO: 28-03 | XA-000-09-004-032-011-025-06 | 25.1 | 1189.2
14:17:23:febtest:INFO: 19-04 | XA-000-09-004-011-013-026-10 | 25.1 | 1195.1
14:17:23:febtest:INFO: 26-05 | XA-000-09-004-032-009-002-02 | 25.1 | 1177.4
14:17:24:febtest:INFO: 17-06 | XA-000-09-004-011-011-002-08 | 37.7 | 1165.6
14:17:24:febtest:INFO: 24-07 | XA-000-09-004-011-010-027-02 | 37.7 | 1141.9
14:17:25:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:17:27:ST3_smx:INFO: chip: 23-0 31.389742 C 1177.390875 mV
14:17:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:17:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:17:27:ST3_smx:INFO: Electrons
14:17:34:ST3_smx:INFO: Total # of broken channels: 6
14:17:34:ST3_smx:INFO: List of broken channels: [9, 22, 52, 81, 91, 114]
14:17:34:ST3_smx:INFO: Total # of broken channels: 1
14:17:34:ST3_smx:INFO: List of broken channels: [67]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:17:36:ST3_smx:INFO: chip: 30-1 25.062742 C 1200.969315 mV
14:17:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:17:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:17:36:ST3_smx:INFO: Electrons
14:17:43:ST3_smx:INFO: Total # of broken channels: 10
14:17:43:ST3_smx:INFO: List of broken channels: [9, 15, 42, 47, 55, 63, 73, 75, 87, 107]
14:17:43:ST3_smx:INFO: Total # of broken channels: 0
14:17:43:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:17:44:ST3_smx:INFO: chip: 21-2 25.062742 C 1200.969315 mV
14:17:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:17:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:17:44:ST3_smx:INFO: Electrons
14:17:51:ST3_smx:INFO: Total # of broken channels: 5
14:17:51:ST3_smx:INFO: List of broken channels: [3, 15, 76, 98, 123]
14:17:51:ST3_smx:INFO: Total # of broken channels: 0
14:17:51:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:17:53:ST3_smx:INFO: chip: 28-3 25.062742 C 1200.969315 mV
14:17:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:17:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:17:53:ST3_smx:INFO: Electrons
14:18:00:ST3_smx:INFO: Total # of broken channels: 4
14:18:00:ST3_smx:INFO: List of broken channels: [19, 94, 102, 103]
14:18:00:ST3_smx:INFO: Total # of broken channels: 1
14:18:00:ST3_smx:INFO: List of broken channels: [116]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:18:02:ST3_smx:INFO: chip: 19-4 25.062742 C 1206.851500 mV
14:18:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:18:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:18:02:ST3_smx:INFO: Electrons
14:18:08:ST3_smx:INFO: Total # of broken channels: 7
14:18:08:ST3_smx:INFO: List of broken channels: [4, 41, 44, 48, 65, 74, 85]
14:18:08:ST3_smx:INFO: Total # of broken channels: 0
14:18:08:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:18:10:ST3_smx:INFO: chip: 26-5 28.225000 C 1189.190035 mV
14:18:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:18:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:18:10:ST3_smx:INFO: Electrons
14:18:17:ST3_smx:INFO: Total # of broken channels: 7
14:18:17:ST3_smx:INFO: List of broken channels: [26, 39, 40, 52, 99, 105, 126]
14:18:17:ST3_smx:INFO: Total # of broken channels: 0
14:18:17:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:18:19:ST3_smx:INFO: chip: 17-6 37.726682 C 1177.390875 mV
14:18:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:18:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:18:19:ST3_smx:INFO: Electrons
14:18:25:ST3_smx:INFO: Total # of broken channels: 5
14:18:25:ST3_smx:INFO: List of broken channels: [7, 41, 57, 59, 116]
14:18:25:ST3_smx:INFO: Total # of broken channels: 0
14:18:25:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:18:27:ST3_smx:INFO: chip: 24-7 37.726682 C 1153.732915 mV
14:18:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:18:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:18:27:ST3_smx:INFO: Electrons
14:18:34:ST3_smx:INFO: Total # of broken channels: 4
14:18:34:ST3_smx:INFO: List of broken channels: [35, 57, 71, 104]
14:18:34:ST3_smx:INFO: Total # of broken channels: 0
14:18:34:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:18:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:18:35:febtest:INFO: 23-00 | XA-000-09-004-011-008-002-06 | 34.6 | 1195.1
14:18:35:febtest:INFO: 30-01 | XA-000-09-004-011-013-024-10 | 25.1 | 1224.5
14:18:35:febtest:INFO: 21-02 | XA-000-09-004-011-013-025-10 | 25.1 | 1224.5
14:18:35:febtest:INFO: 28-03 | XA-000-09-004-032-011-025-06 | 25.1 | 1224.5
14:18:35:febtest:INFO: 19-04 | XA-000-09-004-011-013-026-10 | 28.2 | 1230.3
14:18:36:febtest:INFO: 26-05 | XA-000-09-004-032-009-002-02 | 28.2 | 1212.7
14:18:36:febtest:INFO: 17-06 | XA-000-09-004-011-011-002-08 | 37.7 | 1206.9
14:18:36:febtest:INFO: 24-07 | XA-000-09-004-011-010-027-02 | 40.9 | 1177.4
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_08_05-14_16_45
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2463| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 21252 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M3UL1T1010121B2
LADDER_NAME: L3UL101012
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4370', '1.848', '2.1090']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0090', '1.850', '2.5960']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9680', '1.850', '0.5207']