13:47:21:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:47:21:ST3_Shared:INFO:	                          FEB-ASIC                          
13:47:21:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:47:21:febtest:INFO:	Testing FEB with SN 2481
==============================================OOO==============================================
13:47:23:smx_tester:INFO:	Scanning setup
13:47:23:elinks:INFO:	Disabling clock on downlink 0
13:47:23:elinks:INFO:	Disabling clock on downlink 1
13:47:23:elinks:INFO:	Disabling clock on downlink 2
13:47:23:elinks:INFO:	Disabling clock on downlink 3
13:47:23:elinks:INFO:	Disabling clock on downlink 4
13:47:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:47:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:47:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:47:23:elinks:INFO:	Disabling clock on downlink 0
13:47:23:elinks:INFO:	Disabling clock on downlink 1
13:47:23:elinks:INFO:	Disabling clock on downlink 2
13:47:23:elinks:INFO:	Disabling clock on downlink 3
13:47:23:elinks:INFO:	Disabling clock on downlink 4
13:47:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:47:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:47:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:47:23:elinks:INFO:	Disabling clock on downlink 0
13:47:23:elinks:INFO:	Disabling clock on downlink 1
13:47:23:elinks:INFO:	Disabling clock on downlink 2
13:47:23:elinks:INFO:	Disabling clock on downlink 3
13:47:23:elinks:INFO:	Disabling clock on downlink 4
13:47:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:47:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:47:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:47:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:47:23:elinks:INFO:	Disabling clock on downlink 0
13:47:23:elinks:INFO:	Disabling clock on downlink 1
13:47:23:elinks:INFO:	Disabling clock on downlink 2
13:47:23:elinks:INFO:	Disabling clock on downlink 3
13:47:23:elinks:INFO:	Disabling clock on downlink 4
13:47:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:47:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:47:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:47:23:elinks:INFO:	Disabling clock on downlink 0
13:47:23:elinks:INFO:	Disabling clock on downlink 1
13:47:23:elinks:INFO:	Disabling clock on downlink 2
13:47:23:elinks:INFO:	Disabling clock on downlink 3
13:47:23:elinks:INFO:	Disabling clock on downlink 4
13:47:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:47:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:47:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:47:23:setup_element:INFO:	Scanning clock phase
13:47:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:47:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:47:24:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:47:24:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:47:24:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:47:24:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:47:24:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:47:24:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:47:24:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:47:24:setup_element:INFO:	Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:47:24:setup_element:INFO:	Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:47:24:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:47:24:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:47:24:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:47:24:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:47:24:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:47:24:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:47:24:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:47:24:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:47:24:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
13:47:24:setup_element:INFO:	Scanning data phases
13:47:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:47:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:47:30:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:47:30:setup_element:INFO:	Eye window for uplink 16: XXXXX__________________________________X
Data delay found: 21
13:47:30:setup_element:INFO:	Eye window for uplink 17: XXX__________________________________XXX
Data delay found: 19
13:47:30:setup_element:INFO:	Eye window for uplink 18: ___XXXXX________________________________
Data delay found: 25
13:47:30:setup_element:INFO:	Eye window for uplink 19: ___XXXXX________________________________
Data delay found: 25
13:47:30:setup_element:INFO:	Eye window for uplink 20: ____XXXXX_______________________________
Data delay found: 26
13:47:30:setup_element:INFO:	Eye window for uplink 21: ____XXXXXX______________________________
Data delay found: 26
13:47:30:setup_element:INFO:	Eye window for uplink 22: __XXXXX_________________________________
Data delay found: 24
13:47:30:setup_element:INFO:	Eye window for uplink 23: XXXXXX__________________________________
Data delay found: 22
13:47:30:setup_element:INFO:	Eye window for uplink 24: ____________XXXXXX______________________
Data delay found: 34
13:47:30:setup_element:INFO:	Eye window for uplink 25: ______________XXXXX_____________________
Data delay found: 36
13:47:30:setup_element:INFO:	Eye window for uplink 26: ______________XXXXX_____________________
Data delay found: 36
13:47:30:setup_element:INFO:	Eye window for uplink 27: _______________XXXXXXX__________________
Data delay found: 38
13:47:30:setup_element:INFO:	Eye window for uplink 28: ___________________XXXXXX_______________
Data delay found: 1
13:47:30:setup_element:INFO:	Eye window for uplink 29: ___________________XXXXX________________
Data delay found: 1
13:47:30:setup_element:INFO:	Eye window for uplink 30: ___________________XXXXXX_______________
Data delay found: 1
13:47:30:setup_element:INFO:	Eye window for uplink 31: __________________XXXXXX________________
Data delay found: 0
13:47:30:setup_element:INFO:	Setting the data phase to 21 for uplink 16
13:47:30:setup_element:INFO:	Setting the data phase to 19 for uplink 17
13:47:30:setup_element:INFO:	Setting the data phase to 25 for uplink 18
13:47:30:setup_element:INFO:	Setting the data phase to 25 for uplink 19
13:47:30:setup_element:INFO:	Setting the data phase to 26 for uplink 20
13:47:30:setup_element:INFO:	Setting the data phase to 26 for uplink 21
13:47:30:setup_element:INFO:	Setting the data phase to 24 for uplink 22
13:47:30:setup_element:INFO:	Setting the data phase to 22 for uplink 23
13:47:30:setup_element:INFO:	Setting the data phase to 34 for uplink 24
13:47:30:setup_element:INFO:	Setting the data phase to 36 for uplink 25
13:47:30:setup_element:INFO:	Setting the data phase to 36 for uplink 26
13:47:30:setup_element:INFO:	Setting the data phase to 38 for uplink 27
13:47:30:setup_element:INFO:	Setting the data phase to 1 for uplink 28
13:47:30:setup_element:INFO:	Setting the data phase to 1 for uplink 29
13:47:30:setup_element:INFO:	Setting the data phase to 1 for uplink 30
13:47:30:setup_element:INFO:	Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
13:47:30:setup_element:INFO:	Beginning SMX ASICs map scan
13:47:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:47:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:47:30:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:47:30:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:47:30:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:47:30:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:47:30:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:47:30:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:47:30:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:47:30:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:47:30:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:47:30:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:47:30:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:47:31:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:47:31:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:47:31:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:47:31:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:47:31:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:47:31:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:47:31:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:47:31:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:47:33:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXXX___
      Uplink 17: _____________________________________________________________________XXXXXXXX___
      Uplink 18: _____________________________________________________________________XXXXXXXXX__
      Uplink 19: _____________________________________________________________________XXXXXXXXX__
      Uplink 20: ______________________________________________________________________XXXXXXXX__
      Uplink 21: ______________________________________________________________________XXXXXXXX__
      Uplink 22: _____________________________________________________________________XXXXXXXXX__
      Uplink 23: _____________________________________________________________________XXXXXXXXX__
      Uplink 24: _____________________________________________________________________XXXXXXXX___
      Uplink 25: _____________________________________________________________________XXXXXXXX___
      Uplink 26: ____________________________________________________________________XXXXXXXXX___
      Uplink 27: ____________________________________________________________________XXXXXXXXX___
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: _____________________________________________________________________XXXXXXXXX__
      Uplink 31: _____________________________________________________________________XXXXXXXXX__
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 17:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 18:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 19:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 20:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 21:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 22:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 23:
      Optimal Phase: 22
      Window Length: 34
      Eye Window: XXXXXX__________________________________
    Uplink 24:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 25:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 26:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 27:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
    Uplink 28:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________
    Uplink 29:
      Optimal Phase: 1
      Window Length: 35
      Eye Window: ___________________XXXXX________________
    Uplink 30:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________
    Uplink 31:
      Optimal Phase: 0
      Window Length: 34
      Eye Window: __________________XXXXXX________________

==============================================OOO==============================================
13:47:33:setup_element:INFO:	Performing Elink synchronization
13:47:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:47:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:47:33:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:47:33:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:47:33:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:47:33:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:47:33:ST3_emu_feb:DEBUG:	Chip address:  	0x0
13:47:33:ST3_emu_feb:DEBUG:	Chip address:  	0x1
13:47:33:ST3_emu_feb:DEBUG:	Chip address:  	0x2
13:47:33:ST3_emu_feb:DEBUG:	Chip address:  	0x3
13:47:33:ST3_emu_feb:DEBUG:	Chip address:  	0x4
13:47:33:ST3_emu_feb:DEBUG:	Chip address:  	0x5
13:47:33:ST3_emu_feb:DEBUG:	Chip address:  	0x6
13:47:33:ST3_emu_feb:DEBUG:	Chip address:  	0x7
13:47:33:febtest:INFO:	Init all SMX (CSA): 30
13:47:47:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:47:47:febtest:INFO:	23-00 | XA-000-09-004-032-013-005-04 |  28.2 | 1195.1
13:47:48:febtest:INFO:	30-01 | XA-000-09-004-032-010-006-12 |  28.2 | 1195.1
13:47:48:febtest:INFO:	21-02 | XA-000-09-004-032-013-004-04 |  25.1 | 1206.9
13:47:48:febtest:INFO:	28-03 | XA-000-09-004-032-016-006-15 |  25.1 | 1195.1
13:47:48:febtest:INFO:	19-04 | XA-000-09-004-032-010-004-12 |  25.1 | 1201.0
13:47:49:febtest:INFO:	26-05 | XA-000-09-004-032-013-006-04 |  25.1 | 1201.0
13:47:49:febtest:INFO:	17-06 | XA-000-09-004-032-007-006-11 |  44.1 | 1153.7
13:47:49:febtest:INFO:	24-07 | XA-000-09-004-032-013-003-04 |  25.1 | 1265.4
13:47:50:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:47:52:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1206.851500 mV
13:47:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:52:ST3_smx:INFO:		Electrons
13:47:52:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:47:57:ST3_smx:INFO:	----> Checking Analog response
13:47:57:ST3_smx:INFO:	----> Checking broken channels
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:47:57:ST3_smx:INFO:	Total # broken ch: 2
13:47:57:ST3_smx:INFO:	List FAST: [0, 9]
13:47:57:ST3_smx:INFO:	List SLOW: []
13:47:59:ST3_smx:INFO:	chip: 28-3 	 25.062742 C 	 1206.851500 mV
13:47:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:59:ST3_smx:INFO:		Electrons
13:47:59:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:48:03:ST3_smx:INFO:	----> Checking Analog response
13:48:03:ST3_smx:INFO:	----> Checking broken channels
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:48:03:ST3_smx:INFO:	Total # broken ch: 1
13:48:03:ST3_smx:INFO:	List FAST: [0]
13:48:03:ST3_smx:INFO:	List SLOW: []
13:48:05:ST3_smx:INFO:	chip: 26-5 	 25.062742 C 	 1212.728715 mV
13:48:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:48:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:48:05:ST3_smx:INFO:		Electrons
13:48:05:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:48:10:ST3_smx:INFO:	----> Checking Analog response
13:48:10:ST3_smx:INFO:	----> Checking broken channels
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:48:10:ST3_smx:INFO:	Total # broken ch: 0
13:48:10:ST3_smx:INFO:	List FAST: []
13:48:10:ST3_smx:INFO:	List SLOW: []
13:48:11:ST3_smx:INFO:	chip: 24-7 	 25.062742 C 	 1317.668715 mV
13:48:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:48:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:48:11:ST3_smx:INFO:		Electrons
13:48:11:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:48:16:ST3_smx:INFO:	----> Checking Analog response
13:48:16:ST3_smx:INFO:	----> Checking broken channels
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:48:16:ST3_smx:INFO:	Total # broken ch: 1
13:48:16:ST3_smx:INFO:	List FAST: [124]
13:48:16:ST3_smx:INFO:	List SLOW: []
13:48:16:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:48:17:febtest:INFO:	23-00 | XA-000-09-004-032-013-005-04 |  28.2 | 1230.3
13:48:17:febtest:INFO:	30-01 | XA-000-09-004-032-010-006-12 |  28.2 | 1230.3
13:48:17:febtest:INFO:	21-02 | XA-000-09-004-032-013-004-04 |  25.1 | 1242.0
13:48:17:febtest:INFO:	28-03 | XA-000-09-004-032-016-006-15 |  25.1 | 1230.3
13:48:17:febtest:INFO:	19-04 | XA-000-09-004-032-010-004-12 |  28.2 | 1236.2
13:48:18:febtest:INFO:	26-05 | XA-000-09-004-032-013-006-04 |  25.1 | 1236.2
13:48:18:febtest:INFO:	17-06 | XA-000-09-004-032-007-006-11 |  44.1 | 1177.4
13:48:18:febtest:INFO:	24-07 | XA-000-09-004-032-013-003-04 |  18.7 | 1578.5
{'CSA_FRONT': 5, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 5, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 5, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 5, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 5, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 5, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 5, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 5, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 5, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 5, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 5, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 5, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 5, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 5, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 5, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 5, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 5, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 5, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 5, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 5, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 5, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 5, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 5, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 5, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 25_08_27-13_47_21
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2481| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
MODULE_NAME
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9790', '1.847', '2.3970']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9810', '1.850', '2.5560']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9680', '1.850', '0.5190']