Go Back
FEB_2484 27.08.25 10:20:41
Info
10:20:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:20:41:ST3_Shared:INFO: FEB-Microcable
10:20:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:20:41:febtest:INFO: Testing FEB with SN 2484
==============================================OOO==============================================
10:20:43:smx_tester:INFO: Scanning setup
10:20:43:elinks:INFO: Disabling clock on downlink 0
10:20:43:elinks:INFO: Disabling clock on downlink 1
10:20:43:elinks:INFO: Disabling clock on downlink 2
10:20:43:elinks:INFO: Disabling clock on downlink 3
10:20:43:elinks:INFO: Disabling clock on downlink 4
10:20:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:20:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:20:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:20:43:elinks:INFO: Disabling clock on downlink 0
10:20:43:elinks:INFO: Disabling clock on downlink 1
10:20:43:elinks:INFO: Disabling clock on downlink 2
10:20:43:elinks:INFO: Disabling clock on downlink 3
10:20:43:elinks:INFO: Disabling clock on downlink 4
10:20:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:20:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:20:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:20:43:elinks:INFO: Disabling clock on downlink 0
10:20:43:elinks:INFO: Disabling clock on downlink 1
10:20:43:elinks:INFO: Disabling clock on downlink 2
10:20:43:elinks:INFO: Disabling clock on downlink 3
10:20:43:elinks:INFO: Disabling clock on downlink 4
10:20:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:20:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:20:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:20:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:20:44:elinks:INFO: Disabling clock on downlink 0
10:20:44:elinks:INFO: Disabling clock on downlink 1
10:20:44:elinks:INFO: Disabling clock on downlink 2
10:20:44:elinks:INFO: Disabling clock on downlink 3
10:20:44:elinks:INFO: Disabling clock on downlink 4
10:20:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:20:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:20:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:20:44:elinks:INFO: Disabling clock on downlink 0
10:20:44:elinks:INFO: Disabling clock on downlink 1
10:20:44:elinks:INFO: Disabling clock on downlink 2
10:20:44:elinks:INFO: Disabling clock on downlink 3
10:20:44:elinks:INFO: Disabling clock on downlink 4
10:20:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:20:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:20:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:20:44:setup_element:INFO: Scanning clock phase
10:20:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:20:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:20:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:20:44:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:20:44:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:20:44:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:20:44:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:20:44:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:20:44:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:20:44:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:20:44:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:20:44:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:20:44:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:20:44:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:20:44:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:20:44:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:20:44:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:20:44:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:20:44:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:20:44:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
10:20:44:setup_element:INFO: Scanning data phases
10:20:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:20:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:20:50:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:20:50:setup_element:INFO: Eye window for uplink 16: _____XXXXX______________________________
Data delay found: 27
10:20:50:setup_element:INFO: Eye window for uplink 17: ___XXXXXX_______________________________
Data delay found: 25
10:20:50:setup_element:INFO: Eye window for uplink 18: __XXXXX_________________________________
Data delay found: 24
10:20:50:setup_element:INFO: Eye window for uplink 19: ___XXXXX________________________________
Data delay found: 25
10:20:50:setup_element:INFO: Eye window for uplink 20: XXXXX___________________________________
Data delay found: 22
10:20:50:setup_element:INFO: Eye window for uplink 21: XXXXXX__________________________________
Data delay found: 22
10:20:50:setup_element:INFO: Eye window for uplink 22: __XXXXX_________________________________
Data delay found: 24
10:20:50:setup_element:INFO: Eye window for uplink 23: XXXXX__________________________________X
Data delay found: 21
10:20:50:setup_element:INFO: Eye window for uplink 24: __________XXXXX_________________________
Data delay found: 32
10:20:50:setup_element:INFO: Eye window for uplink 25: ____________XXXX________________________
Data delay found: 33
10:20:50:setup_element:INFO: Eye window for uplink 26: ________________XXXXX___________________
Data delay found: 38
10:20:50:setup_element:INFO: Eye window for uplink 27: _________________XXXXXX_________________
Data delay found: 39
10:20:50:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXX_______________
Data delay found: 1
10:20:50:setup_element:INFO: Eye window for uplink 29: __________________XXXXXXX_______________
Data delay found: 1
10:20:50:setup_element:INFO: Eye window for uplink 30: ___________________XXXXXX_______________
Data delay found: 1
10:20:50:setup_element:INFO: Eye window for uplink 31: _________________XXXXXX_________________
Data delay found: 39
10:20:50:setup_element:INFO: Setting the data phase to 27 for uplink 16
10:20:50:setup_element:INFO: Setting the data phase to 25 for uplink 17
10:20:50:setup_element:INFO: Setting the data phase to 24 for uplink 18
10:20:50:setup_element:INFO: Setting the data phase to 25 for uplink 19
10:20:50:setup_element:INFO: Setting the data phase to 22 for uplink 20
10:20:50:setup_element:INFO: Setting the data phase to 22 for uplink 21
10:20:50:setup_element:INFO: Setting the data phase to 24 for uplink 22
10:20:50:setup_element:INFO: Setting the data phase to 21 for uplink 23
10:20:50:setup_element:INFO: Setting the data phase to 32 for uplink 24
10:20:50:setup_element:INFO: Setting the data phase to 33 for uplink 25
10:20:50:setup_element:INFO: Setting the data phase to 38 for uplink 26
10:20:50:setup_element:INFO: Setting the data phase to 39 for uplink 27
10:20:50:setup_element:INFO: Setting the data phase to 1 for uplink 28
10:20:50:setup_element:INFO: Setting the data phase to 1 for uplink 29
10:20:50:setup_element:INFO: Setting the data phase to 1 for uplink 30
10:20:50:setup_element:INFO: Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
10:20:50:setup_element:INFO: Beginning SMX ASICs map scan
10:20:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:20:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:20:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:20:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:20:50:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:20:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:20:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:20:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:20:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:20:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:20:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:20:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:20:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:20:51:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:20:51:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:20:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:20:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:20:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:20:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:20:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:20:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:20:53:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 68
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXX_
Uplink 17: _______________________________________________________________________XXXXXXXX_
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: ____________________________________________________________________XXXXXXXX____
Uplink 21: ____________________________________________________________________XXXXXXXX____
Uplink 22: _____________________________________________________________________XXXXXXXXX__
Uplink 23: _____________________________________________________________________XXXXXXXXX__
Uplink 24: ___________________________________________________________________XXXXXXXX_____
Uplink 25: ___________________________________________________________________XXXXXXXX_____
Uplink 26: _____________________________________________________________________XXXXXXXXX__
Uplink 27: _____________________________________________________________________XXXXXXXXX__
Uplink 28: _____________________________________________________________________XXXXXXXXX__
Uplink 29: _____________________________________________________________________XXXXXXXXX__
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 17:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 18:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 19:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 20:
Optimal Phase: 22
Window Length: 35
Eye Window: XXXXX___________________________________
Uplink 21:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 22:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 23:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 24:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 25:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 26:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 27:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 28:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 29:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
Uplink 30:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 31:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
==============================================OOO==============================================
10:20:53:setup_element:INFO: Performing Elink synchronization
10:20:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:20:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:20:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:20:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:20:53:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:20:53:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:20:53:ST3_emu_feb:DEBUG: Chip address: 0x0
10:20:53:ST3_emu_feb:DEBUG: Chip address: 0x1
10:20:53:ST3_emu_feb:DEBUG: Chip address: 0x2
10:20:53:ST3_emu_feb:DEBUG: Chip address: 0x3
10:20:53:ST3_emu_feb:DEBUG: Chip address: 0x4
10:20:53:ST3_emu_feb:DEBUG: Chip address: 0x5
10:20:53:ST3_emu_feb:DEBUG: Chip address: 0x6
10:20:53:ST3_emu_feb:DEBUG: Chip address: 0x7
10:20:53:febtest:INFO: Init all SMX (CSA): 30
10:21:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:21:07:febtest:INFO: 23-00 | XA-000-09-004-032-015-011-07 | 31.4 | 1171.5
10:21:08:febtest:INFO: 30-01 | XA-000-09-004-032-015-012-07 | 25.1 | 1189.2
10:21:08:febtest:INFO: 21-02 | XA-000-09-004-032-009-012-02 | 31.4 | 1171.5
10:21:08:febtest:INFO: 28-03 | XA-000-09-004-032-018-012-12 | 21.9 | 1183.3
10:21:08:febtest:INFO: 19-04 | XA-000-09-004-032-003-013-13 | 34.6 | 1171.5
10:21:08:febtest:INFO: 26-05 | XA-000-09-004-032-006-013-06 | 40.9 | 1124.0
10:21:09:febtest:INFO: 17-06 | XA-000-09-004-032-018-011-12 | 28.2 | 1177.4
10:21:09:febtest:INFO: 24-07 | XA-000-09-004-032-012-012-09 | 34.6 | 1153.7
10:21:10:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:21:12:ST3_smx:INFO: chip: 23-0 31.389742 C 1183.292940 mV
10:21:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:12:ST3_smx:INFO: Electrons
10:21:17:ST3_smx:INFO: Total # of broken channels: 7
10:21:17:ST3_smx:INFO: List of broken channels: [3, 11, 42, 77, 87, 106, 127]
10:21:17:ST3_smx:INFO: Total # of broken channels: 0
10:21:17:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:21:19:ST3_smx:INFO: chip: 30-1 25.062742 C 1200.969315 mV
10:21:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:19:ST3_smx:INFO: Electrons
10:21:23:ST3_smx:INFO: Total # of broken channels: 8
10:21:23:ST3_smx:INFO: List of broken channels: [8, 11, 15, 16, 18, 47, 88, 127]
10:21:23:ST3_smx:INFO: Total # of broken channels: 0
10:21:23:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:21:25:ST3_smx:INFO: chip: 21-2 31.389742 C 1183.292940 mV
10:21:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:25:ST3_smx:INFO: Electrons
10:21:30:ST3_smx:INFO: Total # of broken channels: 11
10:21:30:ST3_smx:INFO: List of broken channels: [5, 8, 25, 26, 63, 69, 95, 100, 103, 112, 121]
10:21:30:ST3_smx:INFO: Total # of broken channels: 0
10:21:30:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:21:31:ST3_smx:INFO: chip: 28-3 21.902970 C 1195.082160 mV
10:21:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:31:ST3_smx:INFO: Electrons
10:21:36:ST3_smx:INFO: Total # of broken channels: 8
10:21:36:ST3_smx:INFO: List of broken channels: [10, 18, 27, 79, 89, 106, 107, 110]
10:21:36:ST3_smx:INFO: Total # of broken channels: 3
10:21:36:ST3_smx:INFO: List of broken channels: [20, 116, 118]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:21:38:ST3_smx:INFO: chip: 19-4 34.556970 C 1183.292940 mV
10:21:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:38:ST3_smx:INFO: Electrons
10:21:43:ST3_smx:INFO: Total # of broken channels: 4
10:21:43:ST3_smx:INFO: List of broken channels: [55, 74, 109, 117]
10:21:43:ST3_smx:INFO: Total # of broken channels: 0
10:21:43:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:21:44:ST3_smx:INFO: chip: 26-5 40.898880 C 1135.937260 mV
10:21:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:44:ST3_smx:INFO: Electrons
10:21:49:ST3_smx:INFO: Total # of broken channels: 6
10:21:49:ST3_smx:INFO: List of broken channels: [15, 52, 89, 94, 105, 122]
10:21:49:ST3_smx:INFO: Total # of broken channels: 4
10:21:49:ST3_smx:INFO: List of broken channels: [94, 100, 108, 122]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:21:51:ST3_smx:INFO: chip: 17-6 31.389742 C 1183.292940 mV
10:21:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:51:ST3_smx:INFO: Electrons
10:21:56:ST3_smx:INFO: Total # of broken channels: 9
10:21:56:ST3_smx:INFO: List of broken channels: [2, 9, 20, 63, 72, 80, 112, 116, 117]
10:21:56:ST3_smx:INFO: Total # of broken channels: 0
10:21:56:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:21:57:ST3_smx:INFO: chip: 24-7 34.556970 C 1165.571835 mV
10:21:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:21:58:ST3_smx:INFO: Electrons
10:22:02:ST3_smx:INFO: Total # of broken channels: 9
10:22:02:ST3_smx:INFO: List of broken channels: [3, 7, 16, 23, 42, 43, 99, 115, 119]
10:22:02:ST3_smx:INFO: Total # of broken channels: 0
10:22:02:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:22:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:22:03:febtest:INFO: 23-00 | XA-000-09-004-032-015-011-07 | 31.4 | 1206.9
10:22:03:febtest:INFO: 30-01 | XA-000-09-004-032-015-012-07 | 28.2 | 1224.5
10:22:03:febtest:INFO: 21-02 | XA-000-09-004-032-009-012-02 | 31.4 | 1201.0
10:22:03:febtest:INFO: 28-03 | XA-000-09-004-032-018-012-12 | 21.9 | 1218.6
10:22:04:febtest:INFO: 19-04 | XA-000-09-004-032-003-013-13 | 34.6 | 1201.0
10:22:04:febtest:INFO: 26-05 | XA-000-09-004-032-006-013-06 | 40.9 | 1159.7
10:22:04:febtest:INFO: 17-06 | XA-000-09-004-032-018-011-12 | 31.4 | 1206.9
10:22:04:febtest:INFO: 24-07 | XA-000-09-004-032-012-012-09 | 34.6 | 1189.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_08_27-10_20_41
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2484| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9840', '1.848', '2.5730']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0470', '1.850', '2.6020']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '0.5237']