DTL-STS tests database

FEB_2510 09.12.25 12:50:05

link:
...SMX_0.root
link:
...SMX_2.root
link:
...SMX_4.root
link:
...SMX_6.root
link: XA-000-09-004-014-004-011-15
...SMX_1.root
link: XA-000-09-004-014-013-013-14
...SMX_3.root
link: XA-000-09-004-014-016-013-05
...SMX_5.root
link: XA-000-09-004-014-007-011-01
...SMX_7.root
link: XA-000-09-004-014-007-011-01
...VddmCSAstatus.root
Info
            12:50:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:50:05:ST3_Shared:INFO:	                       FEB-Microcable                       
12:50:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:50:05:febtest:INFO:	Testing FEB with SN 2510
==============================================OOO==============================================
12:50:07:smx_tester:INFO:	Scanning setup
12:50:07:elinks:INFO:	Disabling clock on downlink 0
12:50:07:elinks:INFO:	Disabling clock on downlink 1
12:50:07:elinks:INFO:	Disabling clock on downlink 2
12:50:07:elinks:INFO:	Disabling clock on downlink 3
12:50:07:elinks:INFO:	Disabling clock on downlink 4
12:50:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:50:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:50:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:50:07:elinks:INFO:	Disabling clock on downlink 0
12:50:07:elinks:INFO:	Disabling clock on downlink 1
12:50:07:elinks:INFO:	Disabling clock on downlink 2
12:50:07:elinks:INFO:	Disabling clock on downlink 3
12:50:07:elinks:INFO:	Disabling clock on downlink 4
12:50:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:50:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:50:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:50:07:elinks:INFO:	Disabling clock on downlink 0
12:50:07:elinks:INFO:	Disabling clock on downlink 1
12:50:07:elinks:INFO:	Disabling clock on downlink 2
12:50:07:elinks:INFO:	Disabling clock on downlink 3
12:50:07:elinks:INFO:	Disabling clock on downlink 4
12:50:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:50:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:50:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:50:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:50:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:50:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:50:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:50:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:50:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:50:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:50:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:50:07:elinks:INFO:	Disabling clock on downlink 0
12:50:07:elinks:INFO:	Disabling clock on downlink 1
12:50:07:elinks:INFO:	Disabling clock on downlink 2
12:50:07:elinks:INFO:	Disabling clock on downlink 3
12:50:07:elinks:INFO:	Disabling clock on downlink 4
12:50:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:50:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:50:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:50:08:elinks:INFO:	Disabling clock on downlink 0
12:50:08:elinks:INFO:	Disabling clock on downlink 1
12:50:08:elinks:INFO:	Disabling clock on downlink 2
12:50:08:elinks:INFO:	Disabling clock on downlink 3
12:50:08:elinks:INFO:	Disabling clock on downlink 4
12:50:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:50:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:50:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
12:50:08:setup_element:INFO:	Scanning clock phase
12:50:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:50:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:50:08:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:50:08:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
12:50:08:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
12:50:08:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
12:50:08:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
12:50:08:setup_element:INFO:	Eye window for uplink 28: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
12:50:08:setup_element:INFO:	Eye window for uplink 29: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
12:50:08:setup_element:INFO:	Eye window for uplink 30: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
12:50:08:setup_element:INFO:	Eye window for uplink 31: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
12:50:08:setup_element:INFO:	Setting the clock phase to 29 for group 0, downlink 2
==============================================OOO==============================================
12:50:08:setup_element:INFO:	Scanning data phases
12:50:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:50:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:50:13:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:50:13:setup_element:INFO:	Eye window for uplink 24: _X_XXX_________XXXXXX___________________
Data delay found: 30
12:50:13:setup_element:INFO:	Eye window for uplink 25: _X_XXX___________XXXXX__________________
Data delay found: 31
12:50:13:setup_element:INFO:	Eye window for uplink 26: _X_XXX____________XXXXXX________________
Data delay found: 32
12:50:13:setup_element:INFO:	Eye window for uplink 27: _X_XXX______________XXXXXX______________
Data delay found: 33
12:50:13:setup_element:INFO:	Eye window for uplink 28: _X_XXX______________XXXXXX______________
Data delay found: 33
12:50:13:setup_element:INFO:	Eye window for uplink 29: _X_XXX______________XXXXXX______________
Data delay found: 33
12:50:13:setup_element:INFO:	Eye window for uplink 30: _____X__________________XXXXXX__________
Data delay found: 14
12:50:13:setup_element:INFO:	Eye window for uplink 31: ___XXX_________________XXXXX____________
Data delay found: 14
12:50:13:setup_element:INFO:	Setting the data phase to 30 for uplink 24
12:50:13:setup_element:INFO:	Setting the data phase to 31 for uplink 25
12:50:13:setup_element:INFO:	Setting the data phase to 32 for uplink 26
12:50:13:setup_element:INFO:	Setting the data phase to 33 for uplink 27
12:50:13:setup_element:INFO:	Setting the data phase to 33 for uplink 28
12:50:13:setup_element:INFO:	Setting the data phase to 33 for uplink 29
12:50:13:setup_element:INFO:	Setting the data phase to 14 for uplink 30
12:50:13:setup_element:INFO:	Setting the data phase to 14 for uplink 31
==============================================OOO==============================================
12:50:13:setup_element:INFO:	Beginning SMX ASICs map scan
12:50:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:50:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:50:13:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:50:13:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:50:13:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
12:50:13:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:50:14:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:50:14:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:50:14:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:50:14:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:50:14:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:50:15:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:50:15:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:50:16:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 29
    Window Length: 71
    Eye Windows:
      Uplink 24: _________________________________________________________________XXXXXXXX_______
      Uplink 25: _________________________________________________________________XXXXXXXX_______
      Uplink 26: _________________________________________________________________XXXXXXXXX______
      Uplink 27: _________________________________________________________________XXXXXXXXX______
      Uplink 28: _________________________________________________________________XXXXXXXX_______
      Uplink 29: _________________________________________________________________XXXXXXXX_______
      Uplink 30: _________________________________________________________________XXXXXXXXX______
      Uplink 31: _________________________________________________________________XXXXXXXXX______
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 30
      Window Length: 20
      Eye Window: _X_XXX_________XXXXXX___________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 19
      Eye Window: _X_XXX___________XXXXX__________________
    Uplink 26:
      Optimal Phase: 32
      Window Length: 17
      Eye Window: _X_XXX____________XXXXXX________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 15
      Eye Window: _X_XXX______________XXXXXX______________
    Uplink 28:
      Optimal Phase: 33
      Window Length: 15
      Eye Window: _X_XXX______________XXXXXX______________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 15
      Eye Window: _X_XXX______________XXXXXX______________
    Uplink 30:
      Optimal Phase: 14
      Window Length: 18
      Eye Window: _____X__________________XXXXXX__________
    Uplink 31:
      Optimal Phase: 14
      Window Length: 17
      Eye Window: ___XXX_________________XXXXX____________

==============================================OOO==============================================
12:50:16:setup_element:INFO:	Performing Elink synchronization
12:50:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:50:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:50:16:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:50:16:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
12:50:16:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:50:16:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
12:50:16:febtest:INFO:	Init all SMX (CSA): 30
12:50:23:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:50:23:febtest:INFO:	30-01 | XA-000-09-004-014-004-011-15 |  25.1 | 1189.2
12:50:23:febtest:INFO:	28-03 | XA-000-09-004-014-013-013-14 |  34.6 | 1141.9
12:50:24:febtest:INFO:	26-05 | XA-000-09-004-014-016-013-05 |  31.4 | 1165.6
12:50:24:febtest:INFO:	24-07 | XA-000-09-004-014-007-011-01 |  37.7 | 1135.9
12:50:25:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:50:27:ST3_smx:INFO:	chip: 30-1 	 25.062742 C 	 1195.082160 mV
12:50:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:27:ST3_smx:INFO:		Electrons
12:50:32:ST3_smx:INFO:	Total # of broken channels: 6
12:50:32:ST3_smx:INFO:	List of broken channels: [36, 40, 51, 74, 98, 109]
12:50:32:ST3_smx:INFO:	Total # of broken channels: 0
12:50:32:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:50:34:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1153.732915 mV
12:50:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:34:ST3_smx:INFO:		Electrons
12:50:38:ST3_smx:INFO:	Total # of broken channels: 4
12:50:38:ST3_smx:INFO:	List of broken channels: [7, 101, 125, 127]
12:50:38:ST3_smx:INFO:	Total # of broken channels: 0
12:50:38:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:50:40:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1177.390875 mV
12:50:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:40:ST3_smx:INFO:		Electrons
12:50:45:ST3_smx:INFO:	Total # of broken channels: 5
12:50:45:ST3_smx:INFO:	List of broken channels: [4, 5, 35, 57, 58]
12:50:45:ST3_smx:INFO:	Total # of broken channels: 0
12:50:45:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:50:46:ST3_smx:INFO:	chip: 24-7 	 40.898880 C 	 1147.806000 mV
12:50:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:47:ST3_smx:INFO:		Electrons
12:50:51:ST3_smx:INFO:	Total # of broken channels: 5
12:50:51:ST3_smx:INFO:	List of broken channels: [55, 64, 77, 118, 126]
12:50:51:ST3_smx:INFO:	Total # of broken channels: 0
12:50:51:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:50:51:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:50:52:febtest:INFO:	30-01 | XA-000-09-004-014-004-011-15 |  25.1 | 1218.6
12:50:52:febtest:INFO:	28-03 | XA-000-09-004-014-013-013-14 |  37.7 | 1177.4
12:50:52:febtest:INFO:	26-05 | XA-000-09-004-014-016-013-05 |  31.4 | 1195.1
12:50:52:febtest:INFO:	24-07 | XA-000-09-004-014-007-011-01 |  40.9 | 1165.6
{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_12_09-12_50_05
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2510| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7540', '1.848', '1.1630']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0040', '1.849', '1.2110']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9872', '1.850', '0.2701']
Comment