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FEB_263 06.11.24 09:08:13
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09:08:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:08:13:ST3_Shared:INFO: FEB-Sensor
09:08:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:08:39:ST3_ModuleSelector:DEBUG:
09:08:39:ST3_ModuleSelector:DEBUG:
09:08:39:ST3_ModuleSelector:DEBUG: 15133
09:08:39:ST3_ModuleSelector:DEBUG:
09:08:39:ST3_ModuleSelector:DEBUG: Unknown
09:08:47:ST3_ModuleSelector:INFO:
09:08:47:ST3_ModuleSelector:INFO: 15133
09:08:47:febtest:INFO: Testing FEB with SN 263
09:08:48:smx_tester:INFO: Scanning setup
09:08:48:elinks:INFO: Disabling clock on downlink 0
09:08:48:elinks:INFO: Disabling clock on downlink 1
09:08:48:elinks:INFO: Disabling clock on downlink 2
09:08:48:elinks:INFO: Disabling clock on downlink 3
09:08:48:elinks:INFO: Disabling clock on downlink 4
09:08:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:08:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:08:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:08:48:elinks:INFO: Disabling clock on downlink 0
09:08:48:elinks:INFO: Disabling clock on downlink 1
09:08:48:elinks:INFO: Disabling clock on downlink 2
09:08:48:elinks:INFO: Disabling clock on downlink 3
09:08:48:elinks:INFO: Disabling clock on downlink 4
09:08:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:08:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:08:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:08:49:elinks:INFO: Disabling clock on downlink 0
09:08:49:elinks:INFO: Disabling clock on downlink 1
09:08:49:elinks:INFO: Disabling clock on downlink 2
09:08:49:elinks:INFO: Disabling clock on downlink 3
09:08:49:elinks:INFO: Disabling clock on downlink 4
09:08:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:08:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:08:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:08:49:elinks:INFO: Disabling clock on downlink 0
09:08:49:elinks:INFO: Disabling clock on downlink 1
09:08:49:elinks:INFO: Disabling clock on downlink 2
09:08:49:elinks:INFO: Disabling clock on downlink 3
09:08:49:elinks:INFO: Disabling clock on downlink 4
09:08:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:08:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:08:49:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 24
09:08:49:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 25
09:08:49:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 26
09:08:49:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 27
09:08:49:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 28
09:08:49:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 29
09:08:49:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 30
09:08:49:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 31
09:08:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:08:49:elinks:INFO: Disabling clock on downlink 0
09:08:49:elinks:INFO: Disabling clock on downlink 1
09:08:49:elinks:INFO: Disabling clock on downlink 2
09:08:49:elinks:INFO: Disabling clock on downlink 3
09:08:49:elinks:INFO: Disabling clock on downlink 4
09:08:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:08:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:08:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:08:49:setup_element:INFO: Scanning clock phase
09:08:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:08:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:08:49:setup_element:INFO: Clock phase scan results for group 0, downlink 3
09:08:49:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:08:49:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
09:08:49:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:08:49:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:08:49:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:08:49:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:08:49:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:08:49:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:08:49:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 3
==============================================OOO==============================================
09:08:49:setup_element:INFO: Scanning data phases
09:08:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:08:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:08:54:setup_element:INFO: Data phase scan results for group 0, downlink 3
09:08:54:setup_element:INFO: Eye window for uplink 24: XXXX___________________________________X
Data delay found: 21
09:08:54:setup_element:INFO: Eye window for uplink 25: ___XXXX_________________________________
Data delay found: 24
09:08:54:setup_element:INFO: Eye window for uplink 26: XXX__________________________________XXX
Data delay found: 19
09:08:54:setup_element:INFO: Eye window for uplink 27: _____XXXX_______________________________
Data delay found: 26
09:08:54:setup_element:INFO: Eye window for uplink 28: _______XXXXXX___________________________
Data delay found: 29
09:08:54:setup_element:INFO: Eye window for uplink 29: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 20
09:08:55:setup_element:INFO: Eye window for uplink 30: ________XXXXX___________________________
Data delay found: 30
09:08:55:setup_element:INFO: Eye window for uplink 31: ___XXXXX________________________________
Data delay found: 25
09:08:55:setup_element:INFO: Setting the data phase to 21 for uplink 24
09:08:55:setup_element:INFO: Setting the data phase to 24 for uplink 25
09:08:55:setup_element:INFO: Setting the data phase to 19 for uplink 26
09:08:55:setup_element:INFO: Setting the data phase to 26 for uplink 27
09:08:55:setup_element:INFO: Setting the data phase to 29 for uplink 28
09:08:55:setup_element:INFO: Setting the data phase to 20 for uplink 29
09:08:55:setup_element:INFO: Setting the data phase to 30 for uplink 30
09:08:55:setup_element:INFO: Setting the data phase to 25 for uplink 31
==============================================OOO==============================================
09:08:55:setup_element:INFO: Beginning SMX ASICs map scan
09:08:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:08:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:08:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
09:08:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
09:08:55:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:08:55:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 28
09:08:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 24
09:08:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 29
09:08:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 25
09:08:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 30
09:08:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:08:56:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 31
09:08:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 27
09:08:57:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 3
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 28)
ASIC address 0x1: (ASIC uplink, uplink): (0, 24)
ASIC address 0x2: (ASIC uplink, uplink): (0, 29)
ASIC address 0x3: (ASIC uplink, uplink): (0, 25)
ASIC address 0x4: (ASIC uplink, uplink): (0, 30)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26)
ASIC address 0x6: (ASIC uplink, uplink): (0, 31)
ASIC address 0x7: (ASIC uplink, uplink): (0, 27)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXX_____
Uplink 25: ________________________________________________________________________________
Uplink 26: _____________________________________________________________________XXXXXXX____
Uplink 27: ______________________________________________________________________XXXXXX____
Uplink 28: _______________________________________________________________________XXXXXXX__
Uplink 29: _______________________________________________________________________XXXXXXX__
Uplink 30: _______________________________________________________________________XXXXXXX__
Uplink 31: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 25:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 26:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 27:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
Uplink 28:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 29:
Optimal Phase: 20
Window Length: 1
Eye Window: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 30:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 31:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
==============================================OOO==============================================
09:08:57:setup_element:INFO: Performing Elink synchronization
09:08:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:08:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:08:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
09:08:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
==============================================OOO==============================================
09:08:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 3
09:08:57:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 3 | 0 | [28] | 1 | [(0, 28)]
1 | [0] | 3 | 0 | [24] | 1 | [(0, 24)]
2 | [0] | 3 | 0 | [29] | 1 | [(0, 29)]
3 | [0] | 3 | 0 | [25] | 1 | [(0, 25)]
4 | [0] | 3 | 0 | [30] | 1 | [(0, 30)]
5 | [0] | 3 | 0 | [26] | 1 | [(0, 26)]
6 | [0] | 3 | 0 | [31] | 1 | [(0, 31)]
7 | [0] | 3 | 0 | [27] | 1 | [(0, 27)]
|_________________________________________________________________________|
09:08:58:febtest:INFO: Init all SMX (CSA): 30
09:09:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:09:12:febtest:INFO: 28-00 | XA-000-09-004-005-004-019-06 | 28.2 | 1159.7
09:09:12:febtest:INFO: 24-01 | XA-000-09-004-004-002-018-11 | 25.1 | 1165.6
09:09:12:febtest:INFO: 29-02 | XA-000-09-004-004-002-019-11 | 34.6 | 1147.8
09:09:13:febtest:INFO: 25-03 | XA-000-09-004-004-002-017-11 | 21.9 | 1165.6
09:09:13:febtest:INFO: 30-04 | XA-000-09-004-004-003-020-06 | 31.4 | 1159.7
09:09:13:febtest:INFO: 26-05 | XA-000-09-004-004-002-015-12 | 37.7 | 1118.1
09:09:13:febtest:INFO: 31-06 | XA-000-09-004-004-003-021-06 | 44.1 | 1130.0
09:09:13:febtest:INFO: 27-07 | XA-000-09-004-004-002-014-12 | 37.7 | 1124.0
09:09:14:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:09:16:ST3_smx:INFO: chip: 28-0 28.225000 C 1177.390875 mV
09:09:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:16:ST3_smx:INFO: Electrons
09:09:16:ST3_smx:INFO: # loops 0
09:09:18:ST3_smx:INFO: # loops 1
09:09:20:ST3_smx:INFO: # loops 2
09:09:21:ST3_smx:INFO: # loops 3
09:09:23:ST3_smx:INFO: # loops 4
09:09:24:ST3_smx:INFO: Total # of broken channels: 0
09:09:24:ST3_smx:INFO: List of broken channels: []
09:09:24:ST3_smx:INFO: Total # of broken channels: 19
09:09:24:ST3_smx:INFO: List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 33, 35, 37, 39, 43, 67]
09:09:26:ST3_smx:INFO: chip: 24-1 25.062742 C 1177.390875 mV
09:09:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:26:ST3_smx:INFO: Electrons
09:09:26:ST3_smx:INFO: # loops 0
09:09:28:ST3_smx:INFO: # loops 1
09:09:29:ST3_smx:INFO: # loops 2
09:09:31:ST3_smx:INFO: # loops 3
09:09:33:ST3_smx:INFO: # loops 4
09:09:34:ST3_smx:INFO: Total # of broken channels: 0
09:09:34:ST3_smx:INFO: List of broken channels: []
09:09:34:ST3_smx:INFO: Total # of broken channels: 0
09:09:34:ST3_smx:INFO: List of broken channels: []
09:09:36:ST3_smx:INFO: chip: 29-2 34.556970 C 1159.654860 mV
09:09:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:36:ST3_smx:INFO: Electrons
09:09:36:ST3_smx:INFO: # loops 0
09:09:37:ST3_smx:INFO: # loops 1
09:09:39:ST3_smx:INFO: # loops 2
09:09:41:ST3_smx:INFO: # loops 3
09:09:42:ST3_smx:INFO: # loops 4
09:09:44:ST3_smx:INFO: Total # of broken channels: 0
09:09:44:ST3_smx:INFO: List of broken channels: []
09:09:44:ST3_smx:INFO: Total # of broken channels: 0
09:09:44:ST3_smx:INFO: List of broken channels: []
09:09:45:ST3_smx:INFO: chip: 25-3 21.902970 C 1183.292940 mV
09:09:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:45:ST3_smx:INFO: Electrons
09:09:45:ST3_smx:INFO: # loops 0
09:09:47:ST3_smx:INFO: # loops 1
09:09:49:ST3_smx:INFO: # loops 2
09:09:50:ST3_smx:INFO: # loops 3
09:09:52:ST3_smx:INFO: # loops 4
09:09:53:ST3_smx:INFO: Total # of broken channels: 0
09:09:53:ST3_smx:INFO: List of broken channels: []
09:09:53:ST3_smx:INFO: Total # of broken channels: 0
09:09:53:ST3_smx:INFO: List of broken channels: []
09:09:55:ST3_smx:INFO: chip: 30-4 31.389742 C 1171.483840 mV
09:09:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:55:ST3_smx:INFO: Electrons
09:09:55:ST3_smx:INFO: # loops 0
09:09:57:ST3_smx:INFO: # loops 1
09:09:58:ST3_smx:INFO: # loops 2
09:10:00:ST3_smx:INFO: # loops 3
09:10:01:ST3_smx:INFO: # loops 4
09:10:03:ST3_smx:INFO: Total # of broken channels: 0
09:10:03:ST3_smx:INFO: List of broken channels: []
09:10:03:ST3_smx:INFO: Total # of broken channels: 0
09:10:03:ST3_smx:INFO: List of broken channels: []
09:10:05:ST3_smx:INFO: chip: 26-5 40.898880 C 1129.995435 mV
09:10:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:10:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:10:05:ST3_smx:INFO: Electrons
09:10:05:ST3_smx:INFO: # loops 0
09:10:06:ST3_smx:INFO: # loops 1
09:10:08:ST3_smx:INFO: # loops 2
09:10:09:ST3_smx:INFO: # loops 3
09:10:11:ST3_smx:INFO: # loops 4
09:10:12:ST3_smx:INFO: Total # of broken channels: 0
09:10:12:ST3_smx:INFO: List of broken channels: []
09:10:12:ST3_smx:INFO: Total # of broken channels: 1
09:10:12:ST3_smx:INFO: List of broken channels: [79]
09:10:14:ST3_smx:INFO: chip: 31-6 44.073563 C 1135.937260 mV
09:10:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:10:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:10:14:ST3_smx:INFO: Electrons
09:10:14:ST3_smx:INFO: # loops 0
09:10:16:ST3_smx:INFO: # loops 1
09:10:17:ST3_smx:INFO: # loops 2
09:10:19:ST3_smx:INFO: # loops 3
09:10:20:ST3_smx:INFO: # loops 4
09:10:22:ST3_smx:INFO: Total # of broken channels: 1
09:10:22:ST3_smx:INFO: List of broken channels: [2]
09:10:22:ST3_smx:INFO: Total # of broken channels: 4
09:10:22:ST3_smx:INFO: List of broken channels: [2, 4, 6, 8]
09:10:24:ST3_smx:INFO: chip: 27-7 40.898880 C 1129.995435 mV
09:10:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:10:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:10:24:ST3_smx:INFO: Electrons
09:10:24:ST3_smx:INFO: # loops 0
09:10:25:ST3_smx:INFO: # loops 1
09:10:27:ST3_smx:INFO: # loops 2
09:10:28:ST3_smx:INFO: # loops 3
09:10:30:ST3_smx:INFO: # loops 4
09:10:32:ST3_smx:INFO: Total # of broken channels: 0
09:10:32:ST3_smx:INFO: List of broken channels: []
09:10:32:ST3_smx:INFO: Total # of broken channels: 0
09:10:32:ST3_smx:INFO: List of broken channels: []
09:10:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:10:32:febtest:INFO: 28-00 | XA-000-09-004-005-004-019-06 | 28.2 | 1195.1
09:10:32:febtest:INFO: 24-01 | XA-000-09-004-004-002-018-11 | 28.2 | 1206.9
09:10:33:febtest:INFO: 29-02 | XA-000-09-004-004-002-019-11 | 37.7 | 1177.4
09:10:33:febtest:INFO: 25-03 | XA-000-09-004-004-002-017-11 | 25.1 | 1201.0
09:10:33:febtest:INFO: 30-04 | XA-000-09-004-004-003-020-06 | 31.4 | 1189.2
09:10:33:febtest:INFO: 26-05 | XA-000-09-004-004-002-015-12 | 40.9 | 1147.8
09:10:34:febtest:INFO: 31-06 | XA-000-09-004-004-003-021-06 | 44.1 | 1159.7
09:10:34:febtest:INFO: 27-07 | XA-000-09-004-004-002-014-12 | 40.9 | 1147.8
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_11_06-09_08_13
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 263| FEB_TYPE : 8.1| FEB_UPLINKS : 1| FEB_B
------------------------------------------------------------
SENSOR_NAME: 15133
| SIZE: | GRADE: Unknown
MODULE_NAME:
LADDER_NAME:
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8300', '1.849', '2.3620']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0180', '1.850', '2.6030']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9780', '1.850', '0.5294']
09:10:41:ST3_Shared:INFO: Listo of operators:Kerstin S.;
09:10:42:ST3_Shared:INFO: Listo of operators:Kerstin S.; Robert V.;