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FEB_263 30.10.24 14:02:23
Info
14:02:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:02:23:ST3_Shared:INFO: FEB-Microcable
14:02:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:02:23:febtest:INFO: Testing FEB with SN 263
14:02:25:smx_tester:INFO: Scanning setup
14:02:25:elinks:INFO: Disabling clock on downlink 0
14:02:25:elinks:INFO: Disabling clock on downlink 1
14:02:25:elinks:INFO: Disabling clock on downlink 2
14:02:25:elinks:INFO: Disabling clock on downlink 3
14:02:25:elinks:INFO: Disabling clock on downlink 4
14:02:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:02:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:02:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:02:25:elinks:INFO: Disabling clock on downlink 0
14:02:25:elinks:INFO: Disabling clock on downlink 1
14:02:25:elinks:INFO: Disabling clock on downlink 2
14:02:25:elinks:INFO: Disabling clock on downlink 3
14:02:25:elinks:INFO: Disabling clock on downlink 4
14:02:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:02:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:02:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:02:25:elinks:INFO: Disabling clock on downlink 0
14:02:25:elinks:INFO: Disabling clock on downlink 1
14:02:25:elinks:INFO: Disabling clock on downlink 2
14:02:25:elinks:INFO: Disabling clock on downlink 3
14:02:25:elinks:INFO: Disabling clock on downlink 4
14:02:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:02:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:02:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:02:25:elinks:INFO: Disabling clock on downlink 0
14:02:25:elinks:INFO: Disabling clock on downlink 1
14:02:25:elinks:INFO: Disabling clock on downlink 2
14:02:25:elinks:INFO: Disabling clock on downlink 3
14:02:25:elinks:INFO: Disabling clock on downlink 4
14:02:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:02:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:02:25:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 24
14:02:25:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 25
14:02:25:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 26
14:02:25:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 27
14:02:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:02:25:elinks:INFO: Disabling clock on downlink 0
14:02:25:elinks:INFO: Disabling clock on downlink 1
14:02:25:elinks:INFO: Disabling clock on downlink 2
14:02:25:elinks:INFO: Disabling clock on downlink 3
14:02:25:elinks:INFO: Disabling clock on downlink 4
14:02:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:02:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:02:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:02:25:setup_element:INFO: Scanning clock phase
14:02:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:02:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
14:02:26:setup_element:INFO: Clock phase scan results for group 0, downlink 3
14:02:26:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:02:26:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
14:02:26:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:02:26:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:02:26:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 3
==============================================OOO==============================================
14:02:26:setup_element:INFO: Scanning data phases
14:02:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:02:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
14:02:31:setup_element:INFO: Data phase scan results for group 0, downlink 3
14:02:31:setup_element:INFO: Eye window for uplink 24: ___XXXX_________________________________
Data delay found: 24
14:02:31:setup_element:INFO: Eye window for uplink 25: ______XXXXX_____________________________
Data delay found: 28
14:02:31:setup_element:INFO: Eye window for uplink 26: __XXXXX________________________________X
Data delay found: 22
14:02:31:setup_element:INFO: Eye window for uplink 27: ________XXXX____________________________
Data delay found: 29
14:02:31:setup_element:INFO: Setting the data phase to 24 for uplink 24
14:02:31:setup_element:INFO: Setting the data phase to 28 for uplink 25
14:02:31:setup_element:INFO: Setting the data phase to 22 for uplink 26
14:02:31:setup_element:INFO: Setting the data phase to 29 for uplink 27
==============================================OOO==============================================
14:02:31:setup_element:INFO: Beginning SMX ASICs map scan
14:02:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:02:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
14:02:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
14:02:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
14:02:31:uplink:INFO: Setting uplinks mask [24, 25, 26, 27]
14:02:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 24
14:02:31:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 25
14:02:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:02:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 27
14:02:33:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 3
Uplinks: [24, 25, 26, 27]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 24)
ASIC address 0x3: (ASIC uplink, uplink): (0, 25)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26)
ASIC address 0x7: (ASIC uplink, uplink): (0, 27)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 73
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXX____
Uplink 25: ________________________________________________________________________________
Uplink 26: _____________________________________________________________________XXXXXXX____
Uplink 27: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 25:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 26:
Optimal Phase: 22
Window Length: 32
Eye Window: __XXXXX________________________________X
Uplink 27:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
==============================================OOO==============================================
14:02:33:setup_element:INFO: Performing Elink synchronization
14:02:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:02:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
14:02:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
14:02:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
==============================================OOO==============================================
14:02:33:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 3
14:02:33:uplink:INFO: Enabling uplinks [24, 25, 26, 27]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 3 | 0 | [24] | 1 | [(0, 24)]
3 | [0] | 3 | 0 | [25] | 1 | [(0, 25)]
5 | [0] | 3 | 0 | [26] | 1 | [(0, 26)]
7 | [0] | 3 | 0 | [27] | 1 | [(0, 27)]
|_________________________________________________________________________|
14:02:34:febtest:INFO: Init all SMX (CSA): 30
14:02:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:02:42:febtest:INFO: 24-01 | XA-000-09-004-004-002-018-11 | 34.6 | 1177.4
14:02:42:febtest:INFO: 25-03 | XA-000-09-004-004-002-017-11 | 34.6 | 1171.5
14:02:42:febtest:INFO: 26-05 | XA-000-09-004-004-002-015-12 | 47.3 | 1124.0
14:02:42:febtest:INFO: 27-07 | XA-000-09-004-004-002-014-12 | 44.1 | 1124.0
14:02:43:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:02:45:ST3_smx:INFO: chip: 24-1 37.726682 C 1195.082160 mV
14:02:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:45:ST3_smx:INFO: Electrons
14:02:45:ST3_smx:INFO: # loops 0
14:02:47:ST3_smx:INFO: # loops 1
14:02:48:ST3_smx:INFO: # loops 2
14:02:50:ST3_smx:INFO: Total # of broken channels: 0
14:02:50:ST3_smx:INFO: List of broken channels: []
14:02:50:ST3_smx:INFO: Total # of broken channels: 0
14:02:50:ST3_smx:INFO: List of broken channels: []
14:02:52:ST3_smx:INFO: chip: 25-3 34.556970 C 1183.292940 mV
14:02:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:52:ST3_smx:INFO: Electrons
14:02:52:ST3_smx:INFO: # loops 0
14:02:53:ST3_smx:INFO: # loops 1
14:02:55:ST3_smx:INFO: # loops 2
14:02:57:ST3_smx:INFO: Total # of broken channels: 0
14:02:57:ST3_smx:INFO: List of broken channels: []
14:02:57:ST3_smx:INFO: Total # of broken channels: 3
14:02:57:ST3_smx:INFO: List of broken channels: [4, 6, 12]
14:02:58:ST3_smx:INFO: chip: 26-5 47.250730 C 1129.995435 mV
14:02:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:58:ST3_smx:INFO: Electrons
14:02:58:ST3_smx:INFO: # loops 0
14:03:00:ST3_smx:INFO: # loops 1
14:03:02:ST3_smx:INFO: # loops 2
14:03:03:ST3_smx:INFO: Total # of broken channels: 0
14:03:03:ST3_smx:INFO: List of broken channels: []
14:03:03:ST3_smx:INFO: Total # of broken channels: 1
14:03:03:ST3_smx:INFO: List of broken channels: [79]
14:03:05:ST3_smx:INFO: chip: 27-7 44.073563 C 1135.937260 mV
14:03:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:03:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:03:05:ST3_smx:INFO: Electrons
14:03:05:ST3_smx:INFO: # loops 0
14:03:07:ST3_smx:INFO: # loops 1
14:03:08:ST3_smx:INFO: # loops 2
14:03:10:ST3_smx:INFO: Total # of broken channels: 0
14:03:10:ST3_smx:INFO: List of broken channels: []
14:03:10:ST3_smx:INFO: Total # of broken channels: 1
14:03:10:ST3_smx:INFO: List of broken channels: [6]
14:03:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:03:10:febtest:INFO: 24-01 | XA-000-09-004-004-002-018-11 | 34.6 | 1236.2
14:03:11:febtest:INFO: 25-03 | XA-000-09-004-004-002-017-11 | 34.6 | 1201.0
14:03:11:febtest:INFO: 26-05 | XA-000-09-004-004-002-015-12 | 47.3 | 1153.7
14:03:11:febtest:INFO: 27-07 | XA-000-09-004-004-002-014-12 | 47.3 | 1153.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_30-14_02_23
OPERATOR : Olga B.; Irakli K.;
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 263| FEB_TYPE : 8.1| FEB_UPLINKS : 1| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8913', '1.849', '1.4000']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9921', '1.850', '1.2310']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9904', '1.850', '0.2660']