11:09:26:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:09:26:ST3_Shared:INFO:	                         FEB-Sensor                         
11:09:26:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:09:29:ST3_Shared:INFO:	STS mode selected
11:09:33:ST3_ModuleSelector:DEBUG:	M7UL5T2010402B2
11:09:33:ST3_ModuleSelector:DEBUG:	L7UL501040
11:09:33:ST3_ModuleSelector:DEBUG:	20364
11:09:33:ST3_ModuleSelector:DEBUG:	62x124
11:09:33:ST3_ModuleSelector:DEBUG:	A
11:09:33:ST3_ModuleSelector:DEBUG:	M7UL5T2010402B2
11:09:33:ST3_ModuleSelector:DEBUG:	L7UL501040
11:09:33:ST3_ModuleSelector:DEBUG:	20364
11:09:33:ST3_ModuleSelector:DEBUG:	62x124
11:09:33:ST3_ModuleSelector:DEBUG:	A
11:09:38:ST3_ModuleSelector:INFO:	M7UL5T2010402B2
11:09:38:ST3_ModuleSelector:INFO:	20364
11:09:38:febtest:INFO:	Testing FEB with SN 3062
11:09:40:smx_tester:INFO:	Scanning setup
11:09:40:elinks:INFO:	Disabling clock on downlink 0
11:09:40:elinks:INFO:	Disabling clock on downlink 1
11:09:40:elinks:INFO:	Disabling clock on downlink 2
11:09:40:elinks:INFO:	Disabling clock on downlink 3
11:09:40:elinks:INFO:	Disabling clock on downlink 4
11:09:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:09:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:09:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:09:40:elinks:INFO:	Disabling clock on downlink 0
11:09:40:elinks:INFO:	Disabling clock on downlink 1
11:09:40:elinks:INFO:	Disabling clock on downlink 2
11:09:40:elinks:INFO:	Disabling clock on downlink 3
11:09:40:elinks:INFO:	Disabling clock on downlink 4
11:09:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:09:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
11:09:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
11:09:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:09:40:elinks:INFO:	Disabling clock on downlink 0
11:09:40:elinks:INFO:	Disabling clock on downlink 1
11:09:40:elinks:INFO:	Disabling clock on downlink 2
11:09:40:elinks:INFO:	Disabling clock on downlink 3
11:09:40:elinks:INFO:	Disabling clock on downlink 4
11:09:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:09:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:09:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:09:40:elinks:INFO:	Disabling clock on downlink 0
11:09:40:elinks:INFO:	Disabling clock on downlink 1
11:09:40:elinks:INFO:	Disabling clock on downlink 2
11:09:40:elinks:INFO:	Disabling clock on downlink 3
11:09:40:elinks:INFO:	Disabling clock on downlink 4
11:09:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:09:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:09:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:09:40:elinks:INFO:	Disabling clock on downlink 0
11:09:40:elinks:INFO:	Disabling clock on downlink 1
11:09:40:elinks:INFO:	Disabling clock on downlink 2
11:09:40:elinks:INFO:	Disabling clock on downlink 3
11:09:40:elinks:INFO:	Disabling clock on downlink 4
11:09:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:09:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:09:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:09:40:setup_element:INFO:	Scanning clock phase
11:09:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:09:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:09:41:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
11:09:41:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:09:41:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:09:41:setup_element:INFO:	Eye window for uplink 2 : XXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXX
Clock Delay: 43
11:09:41:setup_element:INFO:	Eye window for uplink 3 : XXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXX
Clock Delay: 43
11:09:41:setup_element:INFO:	Eye window for uplink 4 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
11:09:41:setup_element:INFO:	Eye window for uplink 5 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
11:09:41:setup_element:INFO:	Eye window for uplink 6 : XXXXXXXXXXXXX________________________________________________________XXXXXXXXXXX
Clock Delay: 40
11:09:41:setup_element:INFO:	Eye window for uplink 7 : XXXXXXXXXXXXX________________________________________________________XXXXXXXXXXX
Clock Delay: 40
11:09:41:setup_element:INFO:	Eye window for uplink 8 : X___________________________________________________________________XXXXXXXXXXXX
Clock Delay: 34
11:09:41:setup_element:INFO:	Eye window for uplink 9 : X___________________________________________________________________XXXXXXXXXXXX
Clock Delay: 34
11:09:41:setup_element:INFO:	Eye window for uplink 10: XXXXXXX_________________________________________________________________________
Clock Delay: 43
11:09:41:setup_element:INFO:	Eye window for uplink 11: XXXXXXX_________________________________________________________________________
Clock Delay: 43
11:09:41:setup_element:INFO:	Eye window for uplink 12: __XXXXXX____________________________________________________________XXXXXXXXXXXX
Clock Delay: 37
11:09:41:setup_element:INFO:	Eye window for uplink 13: __XXXXXX____________________________________________________________XXXXXXXXXXXX
Clock Delay: 37
11:09:41:setup_element:INFO:	Eye window for uplink 14: XXXXXXXXXXX_____________________________________________________________________
Clock Delay: 45
11:09:41:setup_element:INFO:	Eye window for uplink 15: XXXXXXXXXXX_____________________________________________________________________
Clock Delay: 45
11:09:41:setup_element:INFO:	Setting the clock phase to 42 for group 0, downlink 1
==============================================OOO==============================================
11:09:41:setup_element:INFO:	Scanning data phases
11:09:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:09:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:09:46:setup_element:INFO:	Data phase scan results for group 0, downlink 1
11:09:46:setup_element:INFO:	Eye window for uplink 0 : ___XXXXXXXX_____________________________
Data delay found: 26
11:09:46:setup_element:INFO:	Eye window for uplink 1 : XXXXXX______________________________XX_X
Data delay found: 20
11:09:46:setup_element:INFO:	Eye window for uplink 2 : XXXXX______________________________X_XXX
Data delay found: 19
11:09:46:setup_element:INFO:	Eye window for uplink 3 : XX_______________________________XXXXXXX
Data delay found: 17
11:09:46:setup_element:INFO:	Eye window for uplink 4 : XXX________________________________XXXXX
Data delay found: 18
11:09:46:setup_element:INFO:	Eye window for uplink 5 : _______________________________XXXXXX___
Data delay found: 13
11:09:46:setup_element:INFO:	Eye window for uplink 6 : _X_________________________XXXXXXXX_____
Data delay found: 14
11:09:46:setup_element:INFO:	Eye window for uplink 7 : _X_____________________XXXXXXXXX________
Data delay found: 12
11:09:46:setup_element:INFO:	Eye window for uplink 8 : _____________XXXXXXX____________XXXXXX__
Data delay found: 5
11:09:46:setup_element:INFO:	Eye window for uplink 9 : __________________XXXXXXX_______XXXXXX__
Data delay found: 7
11:09:46:setup_element:INFO:	Eye window for uplink 10: ________XXXXXXXXXXXXXXX_XXXXXXXXXXXXXXXX
Data delay found: 3
11:09:46:setup_element:INFO:	Eye window for uplink 11: ________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 3
11:09:46:setup_element:INFO:	Eye window for uplink 12: _________________XXXXXXXXX______________
Data delay found: 1
11:09:46:setup_element:INFO:	Eye window for uplink 13: ____________________XXXXXXXXX___________
Data delay found: 4
11:09:46:setup_element:INFO:	Eye window for uplink 14: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 20
11:09:46:setup_element:INFO:	Eye window for uplink 15: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 20
11:09:46:setup_element:INFO:	Setting the data phase to 26 for uplink 0
11:09:46:setup_element:INFO:	Setting the data phase to 20 for uplink 1
11:09:46:setup_element:INFO:	Setting the data phase to 19 for uplink 2
11:09:46:setup_element:INFO:	Setting the data phase to 17 for uplink 3
11:09:46:setup_element:INFO:	Setting the data phase to 18 for uplink 4
11:09:46:setup_element:INFO:	Setting the data phase to 13 for uplink 5
11:09:46:setup_element:INFO:	Setting the data phase to 14 for uplink 6
11:09:46:setup_element:INFO:	Setting the data phase to 12 for uplink 7
11:09:47:setup_element:INFO:	Setting the data phase to 5 for uplink 8
11:09:47:setup_element:INFO:	Setting the data phase to 7 for uplink 9
11:09:47:setup_element:INFO:	Setting the data phase to 3 for uplink 10
11:09:47:setup_element:INFO:	Setting the data phase to 3 for uplink 11
11:09:47:setup_element:INFO:	Setting the data phase to 1 for uplink 12
11:09:47:setup_element:INFO:	Setting the data phase to 4 for uplink 13
11:09:47:setup_element:INFO:	Setting the data phase to 20 for uplink 14
11:09:47:setup_element:INFO:	Setting the data phase to 20 for uplink 15
==============================================OOO==============================================
11:09:47:setup_element:INFO:	Beginning SMX ASICs map scan
11:09:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:09:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:09:47:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:09:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
11:09:47:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:09:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:09:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:09:47:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:09:47:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:09:47:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:09:47:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:09:47:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:09:47:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:09:47:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:09:47:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:09:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:09:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:09:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:09:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:09:49:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
  Clock Phase Characteristic:
    Optimal Phase: 42
    Window Length: 51
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: XXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXX
      Uplink  3: XXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXX
      Uplink  4: X_______________________________________________________________________XXXXXXXX
      Uplink  5: X_______________________________________________________________________XXXXXXXX
      Uplink  6: XXXXXXXXXXXXX________________________________________________________XXXXXXXXXXX
      Uplink  7: XXXXXXXXXXXXX________________________________________________________XXXXXXXXXXX
      Uplink  8: X___________________________________________________________________XXXXXXXXXXXX
      Uplink  9: X___________________________________________________________________XXXXXXXXXXXX
      Uplink 10: XXXXXXX_________________________________________________________________________
      Uplink 11: XXXXXXX_________________________________________________________________________
      Uplink 12: __XXXXXX____________________________________________________________XXXXXXXXXXXX
      Uplink 13: __XXXXXX____________________________________________________________XXXXXXXXXXXX
      Uplink 14: XXXXXXXXXXX_____________________________________________________________________
      Uplink 15: XXXXXXXXXXX_____________________________________________________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 32
      Eye Window: ___XXXXXXXX_____________________________
    Uplink 1:
      Optimal Phase: 20
      Window Length: 30
      Eye Window: XXXXXX______________________________XX_X
    Uplink 2:
      Optimal Phase: 19
      Window Length: 30
      Eye Window: XXXXX______________________________X_XXX
    Uplink 3:
      Optimal Phase: 17
      Window Length: 31
      Eye Window: XX_______________________________XXXXXXX
    Uplink 4:
      Optimal Phase: 18
      Window Length: 32
      Eye Window: XXX________________________________XXXXX
    Uplink 5:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 6:
      Optimal Phase: 14
      Window Length: 25
      Eye Window: _X_________________________XXXXXXXX_____
    Uplink 7:
      Optimal Phase: 12
      Window Length: 21
      Eye Window: _X_____________________XXXXXXXXX________
    Uplink 8:
      Optimal Phase: 5
      Window Length: 15
      Eye Window: _____________XXXXXXX____________XXXXXX__
    Uplink 9:
      Optimal Phase: 7
      Window Length: 20
      Eye Window: __________________XXXXXXX_______XXXXXX__
    Uplink 10:
      Optimal Phase: 3
      Window Length: 8
      Eye Window: ________XXXXXXXXXXXXXXX_XXXXXXXXXXXXXXXX
    Uplink 11:
      Optimal Phase: 3
      Window Length: 8
      Eye Window: ________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 12:
      Optimal Phase: 1
      Window Length: 31
      Eye Window: _________________XXXXXXXXX______________
    Uplink 13:
      Optimal Phase: 4
      Window Length: 31
      Eye Window: ____________________XXXXXXXXX___________
    Uplink 14:
      Optimal Phase: 20
      Window Length: 1
      Eye Window: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 15:
      Optimal Phase: 20
      Window Length: 1
      Eye Window: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

==============================================OOO==============================================
11:09:49:setup_element:INFO:	Performing Elink synchronization
11:09:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:09:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:09:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:09:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:09:49:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
11:09:49:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
|_________________________________________________________________________|
11:09:50:febtest:INFO:	Init all SMX (CSA): 30
11:10:02:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:10:02:febtest:INFO:	01-00 | XA-000-08-003-000-004-212-10 |  37.7 | 1141.9
11:10:02:febtest:INFO:	08-01 | XA-000-08-003-000-004-223-10 |  28.2 | 1183.3
11:10:02:febtest:INFO:	03-02 | XA-000-08-003-000-004-214-10 |  37.7 | 1153.7
11:10:03:febtest:INFO:	10-03 | XA-000-08-003-000-004-224-03 |  37.7 | 1141.9
11:10:03:febtest:INFO:	05-04 | XA-000-08-003-000-004-219-10 |  34.6 | 1177.4
11:10:03:febtest:INFO:	12-05 | XA-000-08-003-000-003-207-05 |  47.3 | 1124.0
11:10:03:febtest:INFO:	07-06 | XA-000-08-003-000-004-220-10 |  44.1 | 1135.9
11:10:04:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:10:06:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1147.806000 mV
11:10:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:06:ST3_smx:INFO:		Electrons
11:10:06:ST3_smx:INFO:	# loops 0
11:10:08:ST3_smx:INFO:	# loops 1
11:10:09:ST3_smx:INFO:	# loops 2
11:10:11:ST3_smx:INFO:	# loops 3
11:10:13:ST3_smx:INFO:	# loops 4
11:10:14:ST3_smx:INFO:	Total # of broken channels: 0
11:10:14:ST3_smx:INFO:	List of broken channels: []
11:10:14:ST3_smx:INFO:	Total # of broken channels: 0
11:10:14:ST3_smx:INFO:	List of broken channels: []
11:10:16:ST3_smx:INFO:	chip: 8-1 	 28.225000 C 	 1189.190035 mV
11:10:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:16:ST3_smx:INFO:		Electrons
11:10:16:ST3_smx:INFO:	# loops 0
11:10:18:ST3_smx:INFO:	# loops 1
11:10:19:ST3_smx:INFO:	# loops 2
11:10:21:ST3_smx:INFO:	# loops 3
11:10:22:ST3_smx:INFO:	# loops 4
11:10:24:ST3_smx:INFO:	Total # of broken channels: 0
11:10:24:ST3_smx:INFO:	List of broken channels: []
11:10:24:ST3_smx:INFO:	Total # of broken channels: 0
11:10:24:ST3_smx:INFO:	List of broken channels: []
11:10:26:ST3_smx:INFO:	chip: 3-2 	 40.898880 C 	 1165.571835 mV
11:10:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:26:ST3_smx:INFO:		Electrons
11:10:26:ST3_smx:INFO:	# loops 0
11:10:27:ST3_smx:INFO:	# loops 1
11:10:29:ST3_smx:INFO:	# loops 2
11:10:30:ST3_smx:INFO:	# loops 3
11:10:32:ST3_smx:INFO:	# loops 4
11:10:33:ST3_smx:INFO:	Total # of broken channels: 0
11:10:33:ST3_smx:INFO:	List of broken channels: []
11:10:33:ST3_smx:INFO:	Total # of broken channels: 1
11:10:33:ST3_smx:INFO:	List of broken channels: [127]
11:10:35:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1147.806000 mV
11:10:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:35:ST3_smx:INFO:		Electrons
11:10:35:ST3_smx:INFO:	# loops 0
11:10:37:ST3_smx:INFO:	# loops 1
11:10:38:ST3_smx:INFO:	# loops 2
11:10:40:ST3_smx:INFO:	# loops 3
11:10:41:ST3_smx:INFO:	# loops 4
11:10:43:ST3_smx:INFO:	Total # of broken channels: 0
11:10:43:ST3_smx:INFO:	List of broken channels: []
11:10:43:ST3_smx:INFO:	Total # of broken channels: 0
11:10:43:ST3_smx:INFO:	List of broken channels: []
11:10:44:ST3_smx:INFO:	chip: 5-4 	 37.726682 C 	 1189.190035 mV
11:10:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:44:ST3_smx:INFO:		Electrons
11:10:45:ST3_smx:INFO:	# loops 0
11:10:46:ST3_smx:INFO:	# loops 1
11:10:48:ST3_smx:INFO:	# loops 2
11:10:49:ST3_smx:INFO:	# loops 3
11:10:51:ST3_smx:INFO:	# loops 4
11:10:52:ST3_smx:INFO:	Total # of broken channels: 0
11:10:52:ST3_smx:INFO:	List of broken channels: []
11:10:52:ST3_smx:INFO:	Total # of broken channels: 0
11:10:52:ST3_smx:INFO:	List of broken channels: []
11:10:54:ST3_smx:INFO:	chip: 12-5 	 50.430383 C 	 1124.048640 mV
11:10:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:10:54:ST3_smx:INFO:		Electrons
11:10:54:ST3_smx:INFO:	# loops 0
11:10:56:ST3_smx:INFO:	# loops 1
11:10:57:ST3_smx:INFO:	# loops 2
11:10:58:ST3_smx:INFO:	# loops 3
11:11:00:ST3_smx:INFO:	# loops 4
11:11:01:ST3_smx:INFO:	Total # of broken channels: 0
11:11:01:ST3_smx:INFO:	List of broken channels: []
11:11:01:ST3_smx:INFO:	Total # of broken channels: 0
11:11:01:ST3_smx:INFO:	List of broken channels: []
11:11:03:ST3_smx:INFO:	chip: 7-6 	 47.250730 C 	 1147.806000 mV
11:11:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:11:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:11:03:ST3_smx:INFO:		Electrons
11:11:03:ST3_smx:INFO:	# loops 0
11:11:05:ST3_smx:INFO:	# loops 1
11:11:06:ST3_smx:INFO:	# loops 2
11:11:08:ST3_smx:INFO:	# loops 3
11:11:09:ST3_smx:INFO:	# loops 4
11:11:11:ST3_smx:INFO:	Total # of broken channels: 0
11:11:11:ST3_smx:INFO:	List of broken channels: []
11:11:11:ST3_smx:INFO:	Total # of broken channels: 0
11:11:11:ST3_smx:INFO:	List of broken channels: []
11:11:11:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:11:11:febtest:INFO:	01-00 | XA-000-08-003-000-004-212-10 |  44.1 | 1171.5
11:11:12:febtest:INFO:	08-01 | XA-000-08-003-000-004-223-10 |  31.4 | 1212.7
11:11:12:febtest:INFO:	03-02 | XA-000-08-003-000-004-214-10 |  40.9 | 1183.3
11:11:12:febtest:INFO:	10-03 | XA-000-08-003-000-004-224-03 |  44.1 | 1165.6
11:11:12:febtest:INFO:	05-04 | XA-000-08-003-000-004-219-10 |  37.7 | 1206.9
11:11:13:febtest:INFO:	12-05 | XA-000-08-003-000-003-207-05 |  53.6 | 1141.9
11:11:13:febtest:INFO:	07-06 | XA-000-08-003-000-004-220-10 |  50.4 | 1165.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_20-11_09_26
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3062| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 20364 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M7UL5T2010402B2
LADDER_NAME: L7UL501040
------------------------------------------------------------
VI_before_Init : ['2.448', '1.9970', '1.849', '2.2070', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0310', '1.849', '2.2280', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9980', '1.850', '0.5934', '0.000', '0.0000', '0.000', '0.0000']