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FEB_3062 22.01.25 14:43:25
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14:43:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:43:25:ST3_Shared:INFO: FEB-Sensor
14:43:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:43:33:ST3_ModuleSelector:INFO: M7UL5T2010402B2
14:43:33:ST3_ModuleSelector:INFO: 20364
14:43:33:febtest:INFO: Testing FEB with SN 3062
14:43:34:smx_tester:INFO: Scanning setup
14:43:34:elinks:INFO: Disabling clock on downlink 0
14:43:34:elinks:INFO: Disabling clock on downlink 1
14:43:34:elinks:INFO: Disabling clock on downlink 2
14:43:34:elinks:INFO: Disabling clock on downlink 3
14:43:34:elinks:INFO: Disabling clock on downlink 4
14:43:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:43:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:34:elinks:INFO: Disabling clock on downlink 0
14:43:34:elinks:INFO: Disabling clock on downlink 1
14:43:34:elinks:INFO: Disabling clock on downlink 2
14:43:34:elinks:INFO: Disabling clock on downlink 3
14:43:34:elinks:INFO: Disabling clock on downlink 4
14:43:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:43:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:43:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:35:elinks:INFO: Disabling clock on downlink 0
14:43:35:elinks:INFO: Disabling clock on downlink 1
14:43:35:elinks:INFO: Disabling clock on downlink 2
14:43:35:elinks:INFO: Disabling clock on downlink 3
14:43:35:elinks:INFO: Disabling clock on downlink 4
14:43:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:43:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:35:elinks:INFO: Disabling clock on downlink 0
14:43:35:elinks:INFO: Disabling clock on downlink 1
14:43:35:elinks:INFO: Disabling clock on downlink 2
14:43:35:elinks:INFO: Disabling clock on downlink 3
14:43:35:elinks:INFO: Disabling clock on downlink 4
14:43:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:43:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:35:elinks:INFO: Disabling clock on downlink 0
14:43:35:elinks:INFO: Disabling clock on downlink 1
14:43:35:elinks:INFO: Disabling clock on downlink 2
14:43:35:elinks:INFO: Disabling clock on downlink 3
14:43:35:elinks:INFO: Disabling clock on downlink 4
14:43:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:43:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:43:35:setup_element:INFO: Scanning clock phase
14:43:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:35:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:43:35:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXX___________X_________________________________________________XXXXXXXX
Clock Delay: 47
14:43:35:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXX___________X_________________________________________________XXXXXXXX
Clock Delay: 47
14:43:35:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXX
Clock Delay: 43
14:43:35:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXX
Clock Delay: 43
14:43:35:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXX___________________________________________________________X________
Clock Delay: 41
14:43:35:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXX___________________________________________________________X________
Clock Delay: 41
14:43:35:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXXXXX________________________________________________________XXXXXXXXXX
Clock Delay: 41
14:43:35:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXXXX________________________________________________________XXXXXXXXXX
Clock Delay: 41
14:43:35:setup_element:INFO: Eye window for uplink 8 : XX__________________________________________________________________XXXXXXXXXXXX
Clock Delay: 34
14:43:35:setup_element:INFO: Eye window for uplink 9 : XX__________________________________________________________________XXXXXXXXXXXX
Clock Delay: 34
14:43:35:setup_element:INFO: Eye window for uplink 10: XX______________________________________________________________________________
Clock Delay: 40
14:43:35:setup_element:INFO: Eye window for uplink 11: XX______________________________________________________________________________
Clock Delay: 40
14:43:35:setup_element:INFO: Eye window for uplink 12: XXXXXXX_____________________________________________________________X_XXXXXXXXXX
Clock Delay: 37
14:43:35:setup_element:INFO: Eye window for uplink 13: XXXXXXX_____________________________________________________________X_XXXXXXXXXX
Clock Delay: 37
14:43:35:setup_element:INFO: Eye window for uplink 14: XXXXXXXXXXX_____________________________________________________________________
Clock Delay: 45
14:43:35:setup_element:INFO: Eye window for uplink 15: XXXXXXXXXXX_____________________________________________________________________
Clock Delay: 45
14:43:35:setup_element:INFO: Setting the clock phase to 45 for group 0, downlink 1
==============================================OOO==============================================
14:43:35:setup_element:INFO: Scanning data phases
14:43:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:40:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:43:40:setup_element:INFO: Eye window for uplink 0 : _XXXXXXX______________________________X_
Data delay found: 22
14:43:40:setup_element:INFO: Eye window for uplink 1 : XXXX______________________________XXXXXX
Data delay found: 18
14:43:40:setup_element:INFO: Eye window for uplink 2 : XX________________________________XXXXXX
Data delay found: 17
14:43:40:setup_element:INFO: Eye window for uplink 3 : ______________________________XXXXXXXX__
Data delay found: 13
14:43:40:setup_element:INFO: Eye window for uplink 4 : _____XXXXXXX____________________XXXXXXXX
Data delay found: 21
14:43:40:setup_element:INFO: Eye window for uplink 5 : _____XXXXXXX_______________X_XXXXXX_____
Data delay found: 19
14:43:40:setup_element:INFO: Eye window for uplink 6 : _____XXXXXXX_______XXXX_XXXXXXXX________
Data delay found: 38
14:43:40:setup_element:INFO: Eye window for uplink 7 : _____XXXXXXX_______XXXXXXXXXX___________
Data delay found: 36
14:43:40:setup_element:INFO: Eye window for uplink 8 : __________XXXXXXX__XXXX_________________
Data delay found: 36
14:43:40:setup_element:INFO: Eye window for uplink 9 : ______________X_XXXXXXX_________________
Data delay found: 38
14:43:40:setup_element:INFO: Eye window for uplink 10: ____________XXXXXXXX____________________
Data delay found: 35
14:43:40:setup_element:INFO: Eye window for uplink 11: ________________XXXXXXXX________________
Data delay found: 39
14:43:40:setup_element:INFO: Eye window for uplink 12: _XXX___________XXXXXXXXX________________
Data delay found: 32
14:43:40:setup_element:INFO: Eye window for uplink 13: _XXX______________XXXXXXXX______________
Data delay found: 33
14:43:40:setup_element:INFO: Eye window for uplink 14: ___________XXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
14:43:40:setup_element:INFO: Eye window for uplink 15: ____________XXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
14:43:40:setup_element:INFO: Setting the data phase to 22 for uplink 0
14:43:40:setup_element:INFO: Setting the data phase to 18 for uplink 1
14:43:40:setup_element:INFO: Setting the data phase to 17 for uplink 2
14:43:40:setup_element:INFO: Setting the data phase to 13 for uplink 3
14:43:40:setup_element:INFO: Setting the data phase to 21 for uplink 4
14:43:40:setup_element:INFO: Setting the data phase to 19 for uplink 5
14:43:40:setup_element:INFO: Setting the data phase to 38 for uplink 6
14:43:40:setup_element:INFO: Setting the data phase to 36 for uplink 7
14:43:40:setup_element:INFO: Setting the data phase to 36 for uplink 8
14:43:40:setup_element:INFO: Setting the data phase to 38 for uplink 9
14:43:40:setup_element:INFO: Setting the data phase to 35 for uplink 10
14:43:40:setup_element:INFO: Setting the data phase to 39 for uplink 11
14:43:40:setup_element:INFO: Setting the data phase to 32 for uplink 12
14:43:40:setup_element:INFO: Setting the data phase to 33 for uplink 13
14:43:40:setup_element:INFO: Setting the data phase to 5 for uplink 14
14:43:40:setup_element:INFO: Setting the data phase to 5 for uplink 15
==============================================OOO==============================================
14:43:40:setup_element:INFO: Beginning SMX ASICs map scan
14:43:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:43:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:43:40:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:43:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:43:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:43:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:43:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:43:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:43:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:43:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:43:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:43:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:43:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:43:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:43:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:43:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:43:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:43:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:43:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:43:43:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 45
Window Length: 45
Eye Windows:
Uplink 0: XXXXXXXXXXX___________X_________________________________________________XXXXXXXX
Uplink 1: XXXXXXXXXXX___________X_________________________________________________XXXXXXXX
Uplink 2: XXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXX
Uplink 3: XXXXXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXX
Uplink 4: XXXXXXXXXXXX___________________________________________________________X________
Uplink 5: XXXXXXXXXXXX___________________________________________________________X________
Uplink 6: XXXXXXXXXXXXXX________________________________________________________XXXXXXXXXX
Uplink 7: XXXXXXXXXXXXXX________________________________________________________XXXXXXXXXX
Uplink 8: XX__________________________________________________________________XXXXXXXXXXXX
Uplink 9: XX__________________________________________________________________XXXXXXXXXXXX
Uplink 10: XX______________________________________________________________________________
Uplink 11: XX______________________________________________________________________________
Uplink 12: XXXXXXX_____________________________________________________________X_XXXXXXXXXX
Uplink 13: XXXXXXX_____________________________________________________________X_XXXXXXXXXX
Uplink 14: XXXXXXXXXXX_____________________________________________________________________
Uplink 15: XXXXXXXXXXX_____________________________________________________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 22
Window Length: 30
Eye Window: _XXXXXXX______________________________X_
Uplink 1:
Optimal Phase: 18
Window Length: 30
Eye Window: XXXX______________________________XXXXXX
Uplink 2:
Optimal Phase: 17
Window Length: 32
Eye Window: XX________________________________XXXXXX
Uplink 3:
Optimal Phase: 13
Window Length: 32
Eye Window: ______________________________XXXXXXXX__
Uplink 4:
Optimal Phase: 21
Window Length: 20
Eye Window: _____XXXXXXX____________________XXXXXXXX
Uplink 5:
Optimal Phase: 19
Window Length: 15
Eye Window: _____XXXXXXX_______________X_XXXXXX_____
Uplink 6:
Optimal Phase: 38
Window Length: 13
Eye Window: _____XXXXXXX_______XXXX_XXXXXXXX________
Uplink 7:
Optimal Phase: 36
Window Length: 16
Eye Window: _____XXXXXXX_______XXXXXXXXXX___________
Uplink 8:
Optimal Phase: 36
Window Length: 27
Eye Window: __________XXXXXXX__XXXX_________________
Uplink 9:
Optimal Phase: 38
Window Length: 31
Eye Window: ______________X_XXXXXXX_________________
Uplink 10:
Optimal Phase: 35
Window Length: 32
Eye Window: ____________XXXXXXXX____________________
Uplink 11:
Optimal Phase: 39
Window Length: 32
Eye Window: ________________XXXXXXXX________________
Uplink 12:
Optimal Phase: 32
Window Length: 17
Eye Window: _XXX___________XXXXXXXXX________________
Uplink 13:
Optimal Phase: 33
Window Length: 15
Eye Window: _XXX______________XXXXXXXX______________
Uplink 14:
Optimal Phase: 5
Window Length: 11
Eye Window: ___________XXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 15:
Optimal Phase: 5
Window Length: 12
Eye Window: ____________XXXXXXXXXXXXXXXXXXXXXXXXXXXX
==============================================OOO==============================================
14:43:43:setup_element:INFO: Performing Elink synchronization
14:43:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:43:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
14:43:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:43:43:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:43:44:febtest:INFO: Init all SMX (CSA): 30
14:43:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:43:58:febtest:INFO: 01-00 | XA-000-08-003-000-004-212-10 | 37.7 | 1135.9
14:43:59:febtest:INFO: 08-01 | XA-000-08-003-000-004-223-10 | 28.2 | 1177.4
14:43:59:febtest:INFO: 03-02 | XA-000-08-003-000-004-214-10 | 37.7 | 1153.7
14:43:59:febtest:INFO: 10-03 | XA-000-08-003-000-004-224-03 | 37.7 | 1135.9
14:43:59:febtest:INFO: 05-04 | XA-000-08-003-000-004-219-10 | 31.4 | 1183.3
14:43:59:febtest:INFO: 12-05 | XA-000-08-003-000-003-207-05 | 44.1 | 1118.1
14:44:00:febtest:INFO: 07-06 | XA-000-08-003-000-004-220-10 | 44.1 | 1135.9
14:44:00:febtest:INFO: 14-07 | XA-000-08-003-000-004-225-03 | 40.9 | 1147.8
14:44:01:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:44:03:ST3_smx:INFO: chip: 1-0 37.726682 C 1147.806000 mV
14:44:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:03:ST3_smx:INFO: Electrons
14:44:03:ST3_smx:INFO: # loops 0
14:44:04:ST3_smx:INFO: # loops 1
14:44:06:ST3_smx:INFO: # loops 2
14:44:08:ST3_smx:INFO: # loops 3
14:44:09:ST3_smx:INFO: # loops 4
14:44:11:ST3_smx:INFO: Total # of broken channels: 0
14:44:11:ST3_smx:INFO: List of broken channels: []
14:44:11:ST3_smx:INFO: Total # of broken channels: 4
14:44:11:ST3_smx:INFO: List of broken channels: [112, 114, 116, 118]
14:44:12:ST3_smx:INFO: chip: 8-1 28.225000 C 1195.082160 mV
14:44:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:12:ST3_smx:INFO: Electrons
14:44:12:ST3_smx:INFO: # loops 0
14:44:14:ST3_smx:INFO: # loops 1
14:44:16:ST3_smx:INFO: # loops 2
14:44:17:ST3_smx:INFO: # loops 3
14:44:19:ST3_smx:INFO: # loops 4
14:44:20:ST3_smx:INFO: Total # of broken channels: 0
14:44:20:ST3_smx:INFO: List of broken channels: []
14:44:20:ST3_smx:INFO: Total # of broken channels: 0
14:44:20:ST3_smx:INFO: List of broken channels: []
14:44:22:ST3_smx:INFO: chip: 3-2 37.726682 C 1165.571835 mV
14:44:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:22:ST3_smx:INFO: Electrons
14:44:22:ST3_smx:INFO: # loops 0
14:44:24:ST3_smx:INFO: # loops 1
14:44:25:ST3_smx:INFO: # loops 2
14:44:27:ST3_smx:INFO: # loops 3
14:44:29:ST3_smx:INFO: # loops 4
14:44:30:ST3_smx:INFO: Total # of broken channels: 0
14:44:30:ST3_smx:INFO: List of broken channels: []
14:44:30:ST3_smx:INFO: Total # of broken channels: 1
14:44:30:ST3_smx:INFO: List of broken channels: [127]
14:44:32:ST3_smx:INFO: chip: 10-3 37.726682 C 1147.806000 mV
14:44:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:32:ST3_smx:INFO: Electrons
14:44:32:ST3_smx:INFO: # loops 0
14:44:33:ST3_smx:INFO: # loops 1
14:44:35:ST3_smx:INFO: # loops 2
14:44:37:ST3_smx:INFO: # loops 3
14:44:38:ST3_smx:INFO: # loops 4
14:44:40:ST3_smx:INFO: Total # of broken channels: 0
14:44:40:ST3_smx:INFO: List of broken channels: []
14:44:40:ST3_smx:INFO: Total # of broken channels: 0
14:44:40:ST3_smx:INFO: List of broken channels: []
14:44:42:ST3_smx:INFO: chip: 5-4 31.389742 C 1189.190035 mV
14:44:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:42:ST3_smx:INFO: Electrons
14:44:42:ST3_smx:INFO: # loops 0
14:44:43:ST3_smx:INFO: # loops 1
14:44:45:ST3_smx:INFO: # loops 2
14:44:46:ST3_smx:INFO: # loops 3
14:44:48:ST3_smx:INFO: # loops 4
14:44:50:ST3_smx:INFO: Total # of broken channels: 0
14:44:50:ST3_smx:INFO: List of broken channels: []
14:44:50:ST3_smx:INFO: Total # of broken channels: 0
14:44:50:ST3_smx:INFO: List of broken channels: []
14:44:51:ST3_smx:INFO: chip: 12-5 47.250730 C 1129.995435 mV
14:44:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:51:ST3_smx:INFO: Electrons
14:44:51:ST3_smx:INFO: # loops 0
14:44:53:ST3_smx:INFO: # loops 1
14:44:55:ST3_smx:INFO: # loops 2
14:44:56:ST3_smx:INFO: # loops 3
14:44:58:ST3_smx:INFO: # loops 4
14:44:59:ST3_smx:INFO: Total # of broken channels: 0
14:44:59:ST3_smx:INFO: List of broken channels: []
14:44:59:ST3_smx:INFO: Total # of broken channels: 0
14:45:00:ST3_smx:INFO: List of broken channels: []
14:45:01:ST3_smx:INFO: chip: 7-6 44.073563 C 1147.806000 mV
14:45:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:01:ST3_smx:INFO: Electrons
14:45:01:ST3_smx:INFO: # loops 0
14:45:03:ST3_smx:INFO: # loops 1
14:45:04:ST3_smx:INFO: # loops 2
14:45:06:ST3_smx:INFO: # loops 3
14:45:08:ST3_smx:INFO: # loops 4
14:45:09:ST3_smx:INFO: Total # of broken channels: 0
14:45:09:ST3_smx:INFO: List of broken channels: []
14:45:09:ST3_smx:INFO: Total # of broken channels: 0
14:45:09:ST3_smx:INFO: List of broken channels: []
14:45:11:ST3_smx:INFO: chip: 14-7 40.898880 C 1159.654860 mV
14:45:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:11:ST3_smx:INFO: Electrons
14:45:11:ST3_smx:INFO: # loops 0
14:45:13:ST3_smx:INFO: # loops 1
14:45:14:ST3_smx:INFO: # loops 2
14:45:16:ST3_smx:INFO: # loops 3
14:45:17:ST3_smx:INFO: # loops 4
14:45:19:ST3_smx:INFO: Total # of broken channels: 0
14:45:19:ST3_smx:INFO: List of broken channels: []
14:45:19:ST3_smx:INFO: Total # of broken channels: 0
14:45:19:ST3_smx:INFO: List of broken channels: []
14:45:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:45:20:febtest:INFO: 01-00 | XA-000-08-003-000-004-212-10 | 40.9 | 1171.5
14:45:20:febtest:INFO: 08-01 | XA-000-08-003-000-004-223-10 | 31.4 | 1212.7
14:45:20:febtest:INFO: 03-02 | XA-000-08-003-000-004-214-10 | 40.9 | 1183.3
14:45:20:febtest:INFO: 10-03 | XA-000-08-003-000-004-224-03 | 40.9 | 1171.5
14:45:20:febtest:INFO: 05-04 | XA-000-08-003-000-004-219-10 | 34.6 | 1206.9
14:45:21:febtest:INFO: 12-05 | XA-000-08-003-000-003-207-05 | 47.3 | 1147.8
14:45:21:febtest:INFO: 07-06 | XA-000-08-003-000-004-220-10 | 44.1 | 1165.6
14:45:21:febtest:INFO: 14-07 | XA-000-08-003-000-004-225-03 | 40.9 | 1177.4
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_22-14_43_25
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3062| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 20364 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M7UL5T2010402B2
LADDER_NAME: L7UL501040
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5590', '1.848', '2.3100', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0800', '1.850', '2.4860', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9930', '1.850', '0.5314', '0.000', '0.0000', '0.000', '0.0000']