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FEB_3088 14.11.24 11:36:38
Info
11:36:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:36:38:ST3_Shared:INFO: FEB-Microcable
11:36:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:36:38:febtest:INFO: Testing FEB with SN 3088
11:36:39:smx_tester:INFO: Scanning setup
11:36:39:elinks:INFO: Disabling clock on downlink 0
11:36:39:elinks:INFO: Disabling clock on downlink 1
11:36:39:elinks:INFO: Disabling clock on downlink 2
11:36:39:elinks:INFO: Disabling clock on downlink 3
11:36:39:elinks:INFO: Disabling clock on downlink 4
11:36:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:36:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:36:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:36:39:elinks:INFO: Disabling clock on downlink 0
11:36:39:elinks:INFO: Disabling clock on downlink 1
11:36:39:elinks:INFO: Disabling clock on downlink 2
11:36:39:elinks:INFO: Disabling clock on downlink 3
11:36:39:elinks:INFO: Disabling clock on downlink 4
11:36:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:36:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:36:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:36:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:36:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:36:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:36:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:36:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:36:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:36:39:elinks:INFO: Disabling clock on downlink 0
11:36:39:elinks:INFO: Disabling clock on downlink 1
11:36:39:elinks:INFO: Disabling clock on downlink 2
11:36:40:elinks:INFO: Disabling clock on downlink 3
11:36:40:elinks:INFO: Disabling clock on downlink 4
11:36:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:36:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:36:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:36:40:elinks:INFO: Disabling clock on downlink 0
11:36:40:elinks:INFO: Disabling clock on downlink 1
11:36:40:elinks:INFO: Disabling clock on downlink 2
11:36:40:elinks:INFO: Disabling clock on downlink 3
11:36:40:elinks:INFO: Disabling clock on downlink 4
11:36:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:36:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:36:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:36:40:elinks:INFO: Disabling clock on downlink 0
11:36:40:elinks:INFO: Disabling clock on downlink 1
11:36:40:elinks:INFO: Disabling clock on downlink 2
11:36:40:elinks:INFO: Disabling clock on downlink 3
11:36:40:elinks:INFO: Disabling clock on downlink 4
11:36:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:36:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:36:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:36:40:setup_element:INFO: Scanning clock phase
11:36:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:36:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:36:40:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:36:40:setup_element:INFO: Eye window for uplink 8 : ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:36:40:setup_element:INFO: Eye window for uplink 9 : ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:36:40:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:36:40:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:36:40:setup_element:INFO: Eye window for uplink 14: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:36:40:setup_element:INFO: Eye window for uplink 15: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:36:40:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 1
==============================================OOO==============================================
11:36:40:setup_element:INFO: Scanning data phases
11:36:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:36:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:36:46:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:36:46:setup_element:INFO: Eye window for uplink 8 : _____________________________XXXX_______
Data delay found: 10
11:36:46:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXXXX
Data delay found: 16
11:36:46:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXXXXX__
Data delay found: 13
11:36:46:setup_element:INFO: Eye window for uplink 13: XX________________________________XXXXXX
Data delay found: 17
11:36:46:setup_element:INFO: Eye window for uplink 14: ______________________________XXXXXX____
Data delay found: 12
11:36:46:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXXX__
Data delay found: 14
11:36:46:setup_element:INFO: Setting the data phase to 10 for uplink 8
11:36:46:setup_element:INFO: Setting the data phase to 16 for uplink 9
11:36:46:setup_element:INFO: Setting the data phase to 13 for uplink 12
11:36:46:setup_element:INFO: Setting the data phase to 17 for uplink 13
11:36:46:setup_element:INFO: Setting the data phase to 12 for uplink 14
11:36:46:setup_element:INFO: Setting the data phase to 14 for uplink 15
==============================================OOO==============================================
11:36:46:setup_element:INFO: Beginning SMX ASICs map scan
11:36:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:36:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:36:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:36:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:36:46:uplink:INFO: Setting uplinks mask [8, 9, 12, 13, 14, 15]
11:36:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:36:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:36:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:36:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:36:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:36:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:36:48:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 70
Eye Windows:
Uplink 8: ___________________________________________________________________XXXXXXXXX____
Uplink 9: ___________________________________________________________________XXXXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ___________________________________________________________________XXXXXXXXX____
Uplink 15: ___________________________________________________________________XXXXXXXXX____
Data phase characteristics:
Uplink 8:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 9:
Optimal Phase: 16
Window Length: 33
Eye Window: _________________________________XXXXXXX
Uplink 12:
Optimal Phase: 13
Window Length: 32
Eye Window: ______________________________XXXXXXXX__
Uplink 13:
Optimal Phase: 17
Window Length: 32
Eye Window: XX________________________________XXXXXX
Uplink 14:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 15:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
==============================================OOO==============================================
11:36:48:setup_element:INFO: Performing Elink synchronization
11:36:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:36:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:36:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:36:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:36:48:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:36:48:uplink:INFO: Enabling uplinks [8, 9, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
11:36:49:febtest:INFO: Init all SMX (CSA): 30
11:36:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:36:55:febtest:INFO: 08-01 | XA-000-09-004-004-008-006-03 | 31.4 | 1171.5
11:36:55:febtest:INFO: 12-05 | XA-000-09-004-004-008-012-03 | 31.4 | 1165.6
11:36:55:febtest:INFO: 14-07 | XA-000-09-004-004-008-015-03 | 37.7 | 1153.7
11:36:56:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:36:57:febtest:ERROR: HW addres 1 != 0
11:37:02:ST3_smx:INFO: chip: 8-1 34.556970 C 1177.390875 mV
11:37:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:02:ST3_smx:INFO: Electrons
11:37:02:ST3_smx:INFO: # loops 0
11:37:03:ST3_smx:INFO: # loops 1
11:37:05:ST3_smx:INFO: # loops 2
11:37:06:ST3_smx:INFO: Total # of broken channels: 1
11:37:06:ST3_smx:INFO: List of broken channels: [125]
11:37:06:ST3_smx:INFO: Total # of broken channels: 1
11:37:06:ST3_smx:INFO: List of broken channels: [125]
11:37:08:ST3_smx:INFO: chip: 12-5 31.389742 C 1171.483840 mV
11:37:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:08:ST3_smx:INFO: Electrons
11:37:08:ST3_smx:INFO: # loops 0
11:37:10:ST3_smx:INFO: # loops 1
11:37:11:ST3_smx:INFO: # loops 2
11:37:13:ST3_smx:INFO: Total # of broken channels: 0
11:37:13:ST3_smx:INFO: List of broken channels: []
11:37:13:ST3_smx:INFO: Total # of broken channels: 1
11:37:13:ST3_smx:INFO: List of broken channels: [121]
11:37:15:ST3_smx:INFO: chip: 14-7 37.726682 C 1159.654860 mV
11:37:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:15:ST3_smx:INFO: Electrons
11:37:15:ST3_smx:INFO: # loops 0
11:37:17:ST3_smx:INFO: # loops 1
11:37:18:ST3_smx:INFO: # loops 2
11:37:20:ST3_smx:INFO: Total # of broken channels: 1
11:37:20:ST3_smx:INFO: List of broken channels: [3]
11:37:20:ST3_smx:INFO: Total # of broken channels: 1
11:37:20:ST3_smx:INFO: List of broken channels: [3]
11:37:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:37:20:febtest:INFO: 08-01 | XA-000-09-004-004-008-006-03 | 34.6 | 1195.1
11:37:21:febtest:INFO: 12-05 | XA-000-09-004-004-008-012-03 | 31.4 | 1195.1
11:37:21:febtest:INFO: 14-07 | XA-000-09-004-004-008-015-03 | 37.7 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_14-11_36_38
OPERATOR : Oleksandr S.; Ralf K.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3088| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '0.6835', '1.850', '1.1270', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.7299', '1.850', '0.7303', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.7526', '1.850', '0.2034', '0.000', '0.0000', '0.000', '0.0000']