FEB_3088    15.11.24 13:16:33

TextEdit.txt
            13:16:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:16:33:ST3_Shared:INFO:	                       FEB-Microcable                       
13:16:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:16:33:febtest:INFO:	Testing FEB with SN 3088
13:16:35:smx_tester:INFO:	Scanning setup
13:16:35:elinks:INFO:	Disabling clock on downlink 0
13:16:35:elinks:INFO:	Disabling clock on downlink 1
13:16:35:elinks:INFO:	Disabling clock on downlink 2
13:16:35:elinks:INFO:	Disabling clock on downlink 3
13:16:35:elinks:INFO:	Disabling clock on downlink 4
13:16:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:16:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:16:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:16:35:elinks:INFO:	Disabling clock on downlink 0
13:16:35:elinks:INFO:	Disabling clock on downlink 1
13:16:35:elinks:INFO:	Disabling clock on downlink 2
13:16:35:elinks:INFO:	Disabling clock on downlink 3
13:16:35:elinks:INFO:	Disabling clock on downlink 4
13:16:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:16:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:16:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:16:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:16:35:elinks:INFO:	Disabling clock on downlink 0
13:16:35:elinks:INFO:	Disabling clock on downlink 1
13:16:35:elinks:INFO:	Disabling clock on downlink 2
13:16:35:elinks:INFO:	Disabling clock on downlink 3
13:16:35:elinks:INFO:	Disabling clock on downlink 4
13:16:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:16:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:16:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:16:35:elinks:INFO:	Disabling clock on downlink 0
13:16:35:elinks:INFO:	Disabling clock on downlink 1
13:16:35:elinks:INFO:	Disabling clock on downlink 2
13:16:35:elinks:INFO:	Disabling clock on downlink 3
13:16:35:elinks:INFO:	Disabling clock on downlink 4
13:16:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:16:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:16:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:16:35:elinks:INFO:	Disabling clock on downlink 0
13:16:35:elinks:INFO:	Disabling clock on downlink 1
13:16:35:elinks:INFO:	Disabling clock on downlink 2
13:16:35:elinks:INFO:	Disabling clock on downlink 3
13:16:35:elinks:INFO:	Disabling clock on downlink 4
13:16:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:16:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:16:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:16:36:setup_element:INFO:	Scanning clock phase
13:16:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:16:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:16:36:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:16:36:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:16:36:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:16:36:setup_element:INFO:	Eye window for uplink 2 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
13:16:36:setup_element:INFO:	Eye window for uplink 3 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
13:16:36:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:16:36:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:16:36:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:16:36:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:16:36:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:16:36:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:16:36:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:16:36:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:16:36:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:16:36:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:16:36:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:16:36:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:16:36:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
13:16:36:setup_element:INFO:	Scanning data phases
13:16:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:16:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:16:42:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:16:42:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXXX______________________
Data delay found: 34
13:16:42:setup_element:INFO:	Eye window for uplink 1 : ________XXXXXX__________________________
Data delay found: 30
13:16:42:setup_element:INFO:	Eye window for uplink 2 : ________XXXXXXXX________________________
Data delay found: 31
13:16:42:setup_element:INFO:	Eye window for uplink 3 : ____XXXXXXXXXX__________________________
Data delay found: 28
13:16:42:setup_element:INFO:	Eye window for uplink 4 : ____XXXXXXX_____________________________
Data delay found: 27
13:16:42:setup_element:INFO:	Eye window for uplink 5 : XXXXXXX________________________________X
Data delay found: 22
13:16:42:setup_element:INFO:	Eye window for uplink 6 : XXXXXXX______________________________XXX
Data delay found: 21
13:16:42:setup_element:INFO:	Eye window for uplink 7 : XXXX_____________________________XXXXXXX
Data delay found: 18
13:16:42:setup_element:INFO:	Eye window for uplink 8 : ______________________XXXXXX______XXXXXX
Data delay found: 10
13:16:42:setup_element:INFO:	Eye window for uplink 9 : ____________________________XXXXX_XXXXXX
Data delay found: 13
13:16:42:setup_element:INFO:	Eye window for uplink 10: ________________________XXXXXXXX________
Data delay found: 7
13:16:42:setup_element:INFO:	Eye window for uplink 11: ___________________________XXXXXXXXX____
Data delay found: 11
13:16:42:setup_element:INFO:	Eye window for uplink 12: ______________________XXXXXXXXXX________
Data delay found: 6
13:16:42:setup_element:INFO:	Eye window for uplink 13: _________________________XXXXXXXXXX_____
Data delay found: 9
13:16:42:setup_element:INFO:	Eye window for uplink 14: _______________________XXXXXXXXX________
Data delay found: 7
13:16:42:setup_element:INFO:	Eye window for uplink 15: ________________________XXXXXXXXXX______
Data delay found: 8
13:16:42:setup_element:INFO:	Setting the data phase to 34 for uplink 0
13:16:42:setup_element:INFO:	Setting the data phase to 30 for uplink 1
13:16:42:setup_element:INFO:	Setting the data phase to 31 for uplink 2
13:16:42:setup_element:INFO:	Setting the data phase to 28 for uplink 3
13:16:42:setup_element:INFO:	Setting the data phase to 27 for uplink 4
13:16:42:setup_element:INFO:	Setting the data phase to 22 for uplink 5
13:16:42:setup_element:INFO:	Setting the data phase to 21 for uplink 6
13:16:42:setup_element:INFO:	Setting the data phase to 18 for uplink 7
13:16:42:setup_element:INFO:	Setting the data phase to 10 for uplink 8
13:16:42:setup_element:INFO:	Setting the data phase to 13 for uplink 9
13:16:42:setup_element:INFO:	Setting the data phase to 7 for uplink 10
13:16:42:setup_element:INFO:	Setting the data phase to 11 for uplink 11
13:16:42:setup_element:INFO:	Setting the data phase to 6 for uplink 12
13:16:42:setup_element:INFO:	Setting the data phase to 9 for uplink 13
13:16:42:setup_element:INFO:	Setting the data phase to 7 for uplink 14
13:16:42:setup_element:INFO:	Setting the data phase to 8 for uplink 15
==============================================OOO==============================================
13:16:42:setup_element:INFO:	Beginning SMX ASICs map scan
13:16:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:16:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:16:42:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:16:42:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:16:42:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:16:42:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:16:42:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:16:42:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:16:42:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:16:42:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:16:42:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:16:43:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:16:43:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:16:43:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:16:43:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:16:43:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:16:43:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:16:43:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:16:43:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:16:43:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:16:43:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:16:45:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 67
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXXX
      Uplink  1: _______________________________________________________________________XXXXXXXXX
      Uplink  2: X_______________________________________________________________________XXXXXXXX
      Uplink  3: X_______________________________________________________________________XXXXXXXX
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: _________________________________________________________________________XXXXXX_
      Uplink  7: _________________________________________________________________________XXXXXX_
      Uplink  8: ____________________________________________________________________XXXXXXXX____
      Uplink  9: ____________________________________________________________________XXXXXXXX____
      Uplink 10: ______________________________________________________________________XXXXXXX___
      Uplink 11: ______________________________________________________________________XXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 32
      Eye Window: ________XXXXXXXX________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 30
      Eye Window: ____XXXXXXXXXX__________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 33
      Eye Window: ____XXXXXXX_____________________________
    Uplink 5:
      Optimal Phase: 22
      Window Length: 32
      Eye Window: XXXXXXX________________________________X
    Uplink 6:
      Optimal Phase: 21
      Window Length: 30
      Eye Window: XXXXXXX______________________________XXX
    Uplink 7:
      Optimal Phase: 18
      Window Length: 29
      Eye Window: XXXX_____________________________XXXXXXX
    Uplink 8:
      Optimal Phase: 10
      Window Length: 22
      Eye Window: ______________________XXXXXX______XXXXXX
    Uplink 9:
      Optimal Phase: 13
      Window Length: 28
      Eye Window: ____________________________XXXXX_XXXXXX
    Uplink 10:
      Optimal Phase: 7
      Window Length: 32
      Eye Window: ________________________XXXXXXXX________
    Uplink 11:
      Optimal Phase: 11
      Window Length: 31
      Eye Window: ___________________________XXXXXXXXX____
    Uplink 12:
      Optimal Phase: 6
      Window Length: 30
      Eye Window: ______________________XXXXXXXXXX________
    Uplink 13:
      Optimal Phase: 9
      Window Length: 30
      Eye Window: _________________________XXXXXXXXXX_____
    Uplink 14:
      Optimal Phase: 7
      Window Length: 31
      Eye Window: _______________________XXXXXXXXX________
    Uplink 15:
      Optimal Phase: 8
      Window Length: 30
      Eye Window: ________________________XXXXXXXXXX______

==============================================OOO==============================================
13:16:45:setup_element:INFO:	Performing Elink synchronization
13:16:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:16:45:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:16:45:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:16:45:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:16:45:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:16:45:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:16:45:febtest:INFO:	Init all SMX (CSA): 30
13:16:59:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:16:59:febtest:INFO:	01-00 | XA-000-09-004-004-007-008-07 |  50.4 | 1106.2
13:17:00:febtest:INFO:	08-01 | XA-000-09-004-004-008-006-03 |  34.6 | 1159.7
13:17:00:febtest:INFO:	03-02 | XA-000-09-004-004-007-005-07 |  56.8 | 1088.3
13:17:00:febtest:INFO:	10-03 | XA-000-09-004-004-008-009-03 |  40.9 | 1124.0
13:17:00:febtest:INFO:	05-04 | XA-000-09-004-004-008-003-03 |  40.9 | 1147.8
13:17:00:febtest:INFO:	12-05 | XA-000-09-004-004-008-012-03 |  34.6 | 1153.7
13:17:01:febtest:INFO:	07-06 | XA-000-09-004-004-008-005-03 |  21.9 | 1206.9
13:17:01:febtest:INFO:	14-07 | XA-000-09-004-002-014-012-04 |  28.2 | 1171.5
13:17:02:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:17:04:ST3_smx:INFO:	chip: 1-0 	 50.430383 C 	 1118.096875 mV
13:17:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:04:ST3_smx:INFO:		Electrons
13:17:04:ST3_smx:INFO:	# loops 0
13:17:06:ST3_smx:INFO:	# loops 1
13:17:07:ST3_smx:INFO:	# loops 2
13:17:09:ST3_smx:INFO:	Total # of broken channels: 1
13:17:09:ST3_smx:INFO:	List of broken channels: [105]
13:17:09:ST3_smx:INFO:	Total # of broken channels: 1
13:17:09:ST3_smx:INFO:	List of broken channels: [105]
13:17:10:ST3_smx:INFO:	chip: 8-1 	 34.556970 C 	 1171.483840 mV
13:17:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:11:ST3_smx:INFO:		Electrons
13:17:11:ST3_smx:INFO:	# loops 0
13:17:12:ST3_smx:INFO:	# loops 1
13:17:14:ST3_smx:INFO:	# loops 2
13:17:15:ST3_smx:INFO:	Total # of broken channels: 0
13:17:15:ST3_smx:INFO:	List of broken channels: []
13:17:15:ST3_smx:INFO:	Total # of broken channels: 0
13:17:15:ST3_smx:INFO:	List of broken channels: []
13:17:17:ST3_smx:INFO:	chip: 3-2 	 56.797143 C 	 1100.211760 mV
13:17:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:17:ST3_smx:INFO:		Electrons
13:17:17:ST3_smx:INFO:	# loops 0
13:17:19:ST3_smx:INFO:	# loops 1
13:17:20:ST3_smx:INFO:	# loops 2
13:17:22:ST3_smx:INFO:	Total # of broken channels: 0
13:17:22:ST3_smx:INFO:	List of broken channels: []
13:17:22:ST3_smx:INFO:	Total # of broken channels: 0
13:17:22:ST3_smx:INFO:	List of broken channels: []
13:17:24:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1141.874115 mV
13:17:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:24:ST3_smx:INFO:		Electrons
13:17:24:ST3_smx:INFO:	# loops 0
13:17:25:ST3_smx:INFO:	# loops 1
13:17:27:ST3_smx:INFO:	# loops 2
13:17:28:ST3_smx:INFO:	Total # of broken channels: 0
13:17:28:ST3_smx:INFO:	List of broken channels: []
13:17:28:ST3_smx:INFO:	Total # of broken channels: 1
13:17:28:ST3_smx:INFO:	List of broken channels: [15]
13:17:30:ST3_smx:INFO:	chip: 5-4 	 40.898880 C 	 1159.654860 mV
13:17:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:30:ST3_smx:INFO:		Electrons
13:17:30:ST3_smx:INFO:	# loops 0
13:17:32:ST3_smx:INFO:	# loops 1
13:17:33:ST3_smx:INFO:	# loops 2
13:17:35:ST3_smx:INFO:	Total # of broken channels: 0
13:17:35:ST3_smx:INFO:	List of broken channels: []
13:17:35:ST3_smx:INFO:	Total # of broken channels: 0
13:17:35:ST3_smx:INFO:	List of broken channels: []
13:17:36:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1165.571835 mV
13:17:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:36:ST3_smx:INFO:		Electrons
13:17:36:ST3_smx:INFO:	# loops 0
13:17:38:ST3_smx:INFO:	# loops 1
13:17:40:ST3_smx:INFO:	# loops 2
13:17:41:ST3_smx:INFO:	Total # of broken channels: 1
13:17:41:ST3_smx:INFO:	List of broken channels: [3]
13:17:41:ST3_smx:INFO:	Total # of broken channels: 3
13:17:41:ST3_smx:INFO:	List of broken channels: [3, 5, 11]
13:17:43:ST3_smx:INFO:	chip: 7-6 	 21.902970 C 	 1218.600960 mV
13:17:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:43:ST3_smx:INFO:		Electrons
13:17:43:ST3_smx:INFO:	# loops 0
13:17:44:ST3_smx:INFO:	# loops 1
13:17:46:ST3_smx:INFO:	# loops 2
13:17:48:ST3_smx:INFO:	Total # of broken channels: 0
13:17:48:ST3_smx:INFO:	List of broken channels: []
13:17:48:ST3_smx:INFO:	Total # of broken channels: 2
13:17:48:ST3_smx:INFO:	List of broken channels: [69, 71]
13:17:49:ST3_smx:INFO:	chip: 14-7 	 31.389742 C 	 1183.292940 mV
13:17:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:49:ST3_smx:INFO:		Electrons
13:17:49:ST3_smx:INFO:	# loops 0
13:17:51:ST3_smx:INFO:	# loops 1
13:17:53:ST3_smx:INFO:	# loops 2
13:17:54:ST3_smx:INFO:	Total # of broken channels: 1
13:17:54:ST3_smx:INFO:	List of broken channels: [1]
13:17:54:ST3_smx:INFO:	Total # of broken channels: 2
13:17:54:ST3_smx:INFO:	List of broken channels: [1, 41]
13:17:54:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:17:55:febtest:INFO:	01-00 | XA-000-09-004-004-007-008-07 |  50.4 | 1141.9
13:17:55:febtest:INFO:	08-01 | XA-000-09-004-004-008-006-03 |  37.7 | 1195.1
13:17:55:febtest:INFO:	03-02 | XA-000-09-004-004-007-005-07 |  56.8 | 1118.1
13:17:55:febtest:INFO:	10-03 | XA-000-09-004-004-008-009-03 |  40.9 | 1165.6
13:17:56:febtest:INFO:	05-04 | XA-000-09-004-004-008-003-03 |  40.9 | 1177.4
13:17:56:febtest:INFO:	12-05 | XA-000-09-004-004-008-012-03 |  34.6 | 1189.2
13:17:56:febtest:INFO:	07-06 | XA-000-09-004-004-008-005-03 |  21.9 | 1236.2
13:17:56:febtest:INFO:	14-07 | XA-000-09-004-002-014-012-04 |  31.4 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_15-13_16_33
OPERATOR  : Oleksandr S.; Irakli K.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3088| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9500', '1.849', '2.6920', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0020', '1.850', '2.3800', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9970', '1.850', '0.5353', '0.000', '0.0000', '0.000', '0.0000']