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FEB_3088 25.11.24 10:12:30
Info
10:12:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:12:30:ST3_Shared:INFO: FEB-Sensor
10:12:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:12:35:ST3_Shared:INFO: STS mode selected
10:12:43:ST3_ModuleSelector:DEBUG: M5UR0T2011562A2
10:12:43:ST3_ModuleSelector:DEBUG: L5UR001156
10:12:43:ST3_ModuleSelector:DEBUG: 24144
10:12:43:ST3_ModuleSelector:DEBUG: 62x124
10:12:43:ST3_ModuleSelector:DEBUG: A
10:12:43:ST3_ModuleSelector:DEBUG: M5UR0T2011562A2
10:12:43:ST3_ModuleSelector:DEBUG: L5UR001156
10:12:43:ST3_ModuleSelector:DEBUG: 24144
10:12:43:ST3_ModuleSelector:DEBUG: 62x124
10:12:43:ST3_ModuleSelector:DEBUG: A
10:12:55:ST3_ModuleSelector:INFO: M5UR0T2011562A2
10:12:55:ST3_ModuleSelector:INFO: 24144
10:12:55:febtest:INFO: Testing FEB with SN 3088
10:12:57:smx_tester:INFO: Scanning setup
10:12:57:elinks:INFO: Disabling clock on downlink 0
10:12:57:elinks:INFO: Disabling clock on downlink 1
10:12:57:elinks:INFO: Disabling clock on downlink 2
10:12:57:elinks:INFO: Disabling clock on downlink 3
10:12:57:elinks:INFO: Disabling clock on downlink 4
10:12:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:12:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:57:elinks:INFO: Disabling clock on downlink 0
10:12:57:elinks:INFO: Disabling clock on downlink 1
10:12:57:elinks:INFO: Disabling clock on downlink 2
10:12:57:elinks:INFO: Disabling clock on downlink 3
10:12:57:elinks:INFO: Disabling clock on downlink 4
10:12:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:12:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:12:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:57:elinks:INFO: Disabling clock on downlink 0
10:12:57:elinks:INFO: Disabling clock on downlink 1
10:12:57:elinks:INFO: Disabling clock on downlink 2
10:12:57:elinks:INFO: Disabling clock on downlink 3
10:12:57:elinks:INFO: Disabling clock on downlink 4
10:12:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:12:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:57:elinks:INFO: Disabling clock on downlink 0
10:12:57:elinks:INFO: Disabling clock on downlink 1
10:12:57:elinks:INFO: Disabling clock on downlink 2
10:12:57:elinks:INFO: Disabling clock on downlink 3
10:12:57:elinks:INFO: Disabling clock on downlink 4
10:12:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:12:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:57:elinks:INFO: Disabling clock on downlink 0
10:12:57:elinks:INFO: Disabling clock on downlink 1
10:12:57:elinks:INFO: Disabling clock on downlink 2
10:12:57:elinks:INFO: Disabling clock on downlink 3
10:12:57:elinks:INFO: Disabling clock on downlink 4
10:12:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:12:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:12:58:setup_element:INFO: Scanning clock phase
10:12:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:58:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:12:58:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:12:58:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:12:58:setup_element:INFO: Eye window for uplink 2 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:12:58:setup_element:INFO: Eye window for uplink 3 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:12:58:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:12:58:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:12:58:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:12:58:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:12:58:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:12:58:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:12:58:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:12:58:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:12:58:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:12:58:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:12:58:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:12:58:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:12:58:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
10:12:58:setup_element:INFO: Scanning data phases
10:12:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:13:03:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:13:03:setup_element:INFO: Eye window for uplink 0 : ____________XXXXXXX_____________________
Data delay found: 35
10:13:03:setup_element:INFO: Eye window for uplink 1 : _________XXXXX__________________________
Data delay found: 31
10:13:03:setup_element:INFO: Eye window for uplink 2 : ________XXXXXXXX________________________
Data delay found: 31
10:13:04:setup_element:INFO: Eye window for uplink 3 : ____XXXXXXXXX___________________________
Data delay found: 28
10:13:04:setup_element:INFO: Eye window for uplink 4 : ____XXXXXXX_____________________________
Data delay found: 27
10:13:04:setup_element:INFO: Eye window for uplink 5 : XXXXXXX________________________________X
Data delay found: 22
10:13:04:setup_element:INFO: Eye window for uplink 6 : XXXXXXX________________________________X
Data delay found: 22
10:13:04:setup_element:INFO: Eye window for uplink 7 : XXXX______________________________XXXXXX
Data delay found: 18
10:13:04:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXX____________
Data delay found: 5
10:13:04:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______
Data delay found: 10
10:13:04:setup_element:INFO: Eye window for uplink 10: ________________________XXXXXXXX________
Data delay found: 7
10:13:04:setup_element:INFO: Eye window for uplink 11: ___________________________XXXXXXXXX____
Data delay found: 11
10:13:04:setup_element:INFO: Eye window for uplink 12: ________________________XXXXXXXX________
Data delay found: 7
10:13:04:setup_element:INFO: Eye window for uplink 13: __________________________XXXXXXXXXX____
Data delay found: 10
10:13:04:setup_element:INFO: Eye window for uplink 14: _______________________XXXXXXXXXX_______
Data delay found: 7
10:13:04:setup_element:INFO: Eye window for uplink 15: _________________________XXXXXXXXXXX____
Data delay found: 10
10:13:04:setup_element:INFO: Setting the data phase to 35 for uplink 0
10:13:04:setup_element:INFO: Setting the data phase to 31 for uplink 1
10:13:04:setup_element:INFO: Setting the data phase to 31 for uplink 2
10:13:04:setup_element:INFO: Setting the data phase to 28 for uplink 3
10:13:04:setup_element:INFO: Setting the data phase to 27 for uplink 4
10:13:04:setup_element:INFO: Setting the data phase to 22 for uplink 5
10:13:04:setup_element:INFO: Setting the data phase to 22 for uplink 6
10:13:04:setup_element:INFO: Setting the data phase to 18 for uplink 7
10:13:04:setup_element:INFO: Setting the data phase to 5 for uplink 8
10:13:04:setup_element:INFO: Setting the data phase to 10 for uplink 9
10:13:04:setup_element:INFO: Setting the data phase to 7 for uplink 10
10:13:04:setup_element:INFO: Setting the data phase to 11 for uplink 11
10:13:04:setup_element:INFO: Setting the data phase to 7 for uplink 12
10:13:04:setup_element:INFO: Setting the data phase to 10 for uplink 13
10:13:04:setup_element:INFO: Setting the data phase to 7 for uplink 14
10:13:04:setup_element:INFO: Setting the data phase to 10 for uplink 15
==============================================OOO==============================================
10:13:04:setup_element:INFO: Beginning SMX ASICs map scan
10:13:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:13:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:13:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:13:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:13:04:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:13:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:13:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:13:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:13:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:13:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:13:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:13:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:13:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:13:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:13:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:13:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:13:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:13:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:13:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:13:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:13:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:13:06:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 67
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXXX
Uplink 1: _______________________________________________________________________XXXXXXXXX
Uplink 2: X_______________________________________________________________________XXXXXXXX
Uplink 3: X_______________________________________________________________________XXXXXXXX
Uplink 4: ______________________________________________________________________XXXXXXXXX_
Uplink 5: ______________________________________________________________________XXXXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXXX_
Uplink 7: ________________________________________________________________________XXXXXXX_
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ______________________________________________________________________XXXXXXXXX_
Uplink 15: ______________________________________________________________________XXXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 33
Eye Window: ____________XXXXXXX_____________________
Uplink 1:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 2:
Optimal Phase: 31
Window Length: 32
Eye Window: ________XXXXXXXX________________________
Uplink 3:
Optimal Phase: 28
Window Length: 31
Eye Window: ____XXXXXXXXX___________________________
Uplink 4:
Optimal Phase: 27
Window Length: 33
Eye Window: ____XXXXXXX_____________________________
Uplink 5:
Optimal Phase: 22
Window Length: 32
Eye Window: XXXXXXX________________________________X
Uplink 6:
Optimal Phase: 22
Window Length: 32
Eye Window: XXXXXXX________________________________X
Uplink 7:
Optimal Phase: 18
Window Length: 30
Eye Window: XXXX______________________________XXXXXX
Uplink 8:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 9:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 10:
Optimal Phase: 7
Window Length: 32
Eye Window: ________________________XXXXXXXX________
Uplink 11:
Optimal Phase: 11
Window Length: 31
Eye Window: ___________________________XXXXXXXXX____
Uplink 12:
Optimal Phase: 7
Window Length: 32
Eye Window: ________________________XXXXXXXX________
Uplink 13:
Optimal Phase: 10
Window Length: 30
Eye Window: __________________________XXXXXXXXXX____
Uplink 14:
Optimal Phase: 7
Window Length: 30
Eye Window: _______________________XXXXXXXXXX_______
Uplink 15:
Optimal Phase: 10
Window Length: 29
Eye Window: _________________________XXXXXXXXXXX____
==============================================OOO==============================================
10:13:06:setup_element:INFO: Performing Elink synchronization
10:13:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:13:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:13:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:13:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:13:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:13:06:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:13:07:febtest:INFO: Init all SMX (CSA): 30
10:13:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:13:22:febtest:INFO: 01-00 | XA-000-09-004-004-007-008-07 | 44.1 | 1112.1
10:13:22:febtest:INFO: 08-01 | XA-000-09-004-004-008-006-03 | 31.4 | 1159.7
10:13:23:febtest:INFO: 03-02 | XA-000-09-004-004-007-005-07 | 50.4 | 1088.3
10:13:23:febtest:INFO: 10-03 | XA-000-09-004-004-008-009-03 | 34.6 | 1130.0
10:13:23:febtest:INFO: 05-04 | XA-000-09-004-004-008-003-03 | 34.6 | 1147.8
10:13:23:febtest:INFO: 12-05 | XA-000-09-004-004-008-012-03 | 28.2 | 1159.7
10:13:23:febtest:INFO: 07-06 | XA-000-09-004-004-008-005-03 | 12.4 | 1212.7
10:13:24:febtest:INFO: 14-07 | XA-000-09-004-002-014-012-04 | 21.9 | 1177.4
10:13:25:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:13:27:ST3_smx:INFO: chip: 1-0 44.073563 C 1118.096875 mV
10:13:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:27:ST3_smx:INFO: Electrons
10:13:27:ST3_smx:INFO: # loops 0
10:13:28:ST3_smx:INFO: # loops 1
10:13:30:ST3_smx:INFO: # loops 2
10:13:32:ST3_smx:INFO: # loops 3
10:13:34:ST3_smx:INFO: # loops 4
10:13:35:ST3_smx:INFO: Total # of broken channels: 0
10:13:35:ST3_smx:INFO: List of broken channels: []
10:13:35:ST3_smx:INFO: Total # of broken channels: 0
10:13:35:ST3_smx:INFO: List of broken channels: []
10:13:37:ST3_smx:INFO: chip: 8-1 31.389742 C 1171.483840 mV
10:13:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:37:ST3_smx:INFO: Electrons
10:13:37:ST3_smx:INFO: # loops 0
10:13:39:ST3_smx:INFO: # loops 1
10:13:41:ST3_smx:INFO: # loops 2
10:13:42:ST3_smx:INFO: # loops 3
10:13:44:ST3_smx:INFO: # loops 4
10:13:46:ST3_smx:INFO: Total # of broken channels: 0
10:13:46:ST3_smx:INFO: List of broken channels: []
10:13:46:ST3_smx:INFO: Total # of broken channels: 0
10:13:46:ST3_smx:INFO: List of broken channels: []
10:13:47:ST3_smx:INFO: chip: 3-2 50.430383 C 1100.211760 mV
10:13:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:47:ST3_smx:INFO: Electrons
10:13:47:ST3_smx:INFO: # loops 0
10:13:49:ST3_smx:INFO: # loops 1
10:13:51:ST3_smx:INFO: # loops 2
10:13:52:ST3_smx:INFO: # loops 3
10:13:54:ST3_smx:INFO: # loops 4
10:13:56:ST3_smx:INFO: Total # of broken channels: 0
10:13:56:ST3_smx:INFO: List of broken channels: []
10:13:56:ST3_smx:INFO: Total # of broken channels: 0
10:13:56:ST3_smx:INFO: List of broken channels: []
10:13:58:ST3_smx:INFO: chip: 10-3 34.556970 C 1147.806000 mV
10:13:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:58:ST3_smx:INFO: Electrons
10:13:58:ST3_smx:INFO: # loops 0
10:13:59:ST3_smx:INFO: # loops 1
10:14:01:ST3_smx:INFO: # loops 2
10:14:03:ST3_smx:INFO: # loops 3
10:14:04:ST3_smx:INFO: # loops 4
10:14:06:ST3_smx:INFO: Total # of broken channels: 0
10:14:06:ST3_smx:INFO: List of broken channels: []
10:14:06:ST3_smx:INFO: Total # of broken channels: 0
10:14:06:ST3_smx:INFO: List of broken channels: []
10:14:08:ST3_smx:INFO: chip: 5-4 34.556970 C 1153.732915 mV
10:14:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:08:ST3_smx:INFO: Electrons
10:14:08:ST3_smx:INFO: # loops 0
10:14:09:ST3_smx:INFO: # loops 1
10:14:11:ST3_smx:INFO: # loops 2
10:14:13:ST3_smx:INFO: # loops 3
10:14:14:ST3_smx:INFO: # loops 4
10:14:16:ST3_smx:INFO: Total # of broken channels: 0
10:14:16:ST3_smx:INFO: List of broken channels: []
10:14:16:ST3_smx:INFO: Total # of broken channels: 0
10:14:16:ST3_smx:INFO: List of broken channels: []
10:14:18:ST3_smx:INFO: chip: 12-5 28.225000 C 1165.571835 mV
10:14:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:18:ST3_smx:INFO: Electrons
10:14:18:ST3_smx:INFO: # loops 0
10:14:19:ST3_smx:INFO: # loops 1
10:14:21:ST3_smx:INFO: # loops 2
10:14:23:ST3_smx:INFO: # loops 3
10:14:24:ST3_smx:INFO: # loops 4
10:14:26:ST3_smx:INFO: Total # of broken channels: 0
10:14:26:ST3_smx:INFO: List of broken channels: []
10:14:26:ST3_smx:INFO: Total # of broken channels: 0
10:14:26:ST3_smx:INFO: List of broken channels: []
10:14:28:ST3_smx:INFO: chip: 7-6 15.590880 C 1224.468235 mV
10:14:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:28:ST3_smx:INFO: Electrons
10:14:28:ST3_smx:INFO: # loops 0
10:14:29:ST3_smx:INFO: # loops 1
10:14:31:ST3_smx:INFO: # loops 2
10:14:33:ST3_smx:INFO: # loops 3
10:14:34:ST3_smx:INFO: # loops 4
10:14:36:ST3_smx:INFO: Total # of broken channels: 0
10:14:36:ST3_smx:INFO: List of broken channels: []
10:14:36:ST3_smx:INFO: Total # of broken channels: 0
10:14:36:ST3_smx:INFO: List of broken channels: []
10:14:38:ST3_smx:INFO: chip: 14-7 25.062742 C 1189.190035 mV
10:14:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:14:38:ST3_smx:INFO: Electrons
10:14:38:ST3_smx:INFO: # loops 0
10:14:40:ST3_smx:INFO: # loops 1
10:14:41:ST3_smx:INFO: # loops 2
10:14:43:ST3_smx:INFO: # loops 3
10:14:45:ST3_smx:INFO: # loops 4
10:14:46:ST3_smx:INFO: Total # of broken channels: 0
10:14:46:ST3_smx:INFO: List of broken channels: []
10:14:46:ST3_smx:INFO: Total # of broken channels: 0
10:14:46:ST3_smx:INFO: List of broken channels: []
10:14:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:14:47:febtest:INFO: 01-00 | XA-000-09-004-004-007-008-07 | 47.3 | 1141.9
10:14:47:febtest:INFO: 08-01 | XA-000-09-004-004-008-006-03 | 31.4 | 1189.2
10:14:47:febtest:INFO: 03-02 | XA-000-09-004-004-007-005-07 | 53.6 | 1118.1
10:14:48:febtest:INFO: 10-03 | XA-000-09-004-004-008-009-03 | 34.6 | 1171.5
10:14:48:febtest:INFO: 05-04 | XA-000-09-004-004-008-003-03 | 37.7 | 1177.4
10:14:48:febtest:INFO: 12-05 | XA-000-09-004-004-008-012-03 | 28.2 | 1195.1
10:14:48:febtest:INFO: 07-06 | XA-000-09-004-004-008-005-03 | 15.6 | 1242.0
10:14:48:febtest:INFO: 14-07 | XA-000-09-004-002-014-012-04 | 25.1 | 1206.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_11_25-10_12_30
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3088| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 24144 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M5UR0T2011562A2
LADDER_NAME: L5UR001156
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9460', '1.849', '2.6110', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0140', '1.850', '2.5040', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9970', '1.850', '0.5344', '0.000', '0.0000', '0.000', '0.0000']