Go Back
FEB_3102 06.06.25 11:35:00
TextEdit.txt
11:35:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:35:00:ST3_Shared:INFO: FEB-Sensor
11:35:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:35:16:ST3_ModuleSelector:INFO: M7UR2T2011392A2
11:35:16:ST3_ModuleSelector:INFO: 06234
11:35:16:febtest:INFO: Testing FEB with SN 3102
==============================================OOO==============================================
11:35:18:smx_tester:INFO: Scanning setup
11:35:18:elinks:INFO: Disabling clock on downlink 0
11:35:18:elinks:INFO: Disabling clock on downlink 1
11:35:18:elinks:INFO: Disabling clock on downlink 2
11:35:18:elinks:INFO: Disabling clock on downlink 3
11:35:18:elinks:INFO: Disabling clock on downlink 4
11:35:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:35:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:18:elinks:INFO: Disabling clock on downlink 0
11:35:18:elinks:INFO: Disabling clock on downlink 1
11:35:18:elinks:INFO: Disabling clock on downlink 2
11:35:18:elinks:INFO: Disabling clock on downlink 3
11:35:18:elinks:INFO: Disabling clock on downlink 4
11:35:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:35:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:35:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:18:elinks:INFO: Disabling clock on downlink 0
11:35:18:elinks:INFO: Disabling clock on downlink 1
11:35:18:elinks:INFO: Disabling clock on downlink 2
11:35:18:elinks:INFO: Disabling clock on downlink 3
11:35:18:elinks:INFO: Disabling clock on downlink 4
11:35:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:35:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:18:elinks:INFO: Disabling clock on downlink 0
11:35:18:elinks:INFO: Disabling clock on downlink 1
11:35:18:elinks:INFO: Disabling clock on downlink 2
11:35:18:elinks:INFO: Disabling clock on downlink 3
11:35:18:elinks:INFO: Disabling clock on downlink 4
11:35:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:35:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:18:elinks:INFO: Disabling clock on downlink 0
11:35:18:elinks:INFO: Disabling clock on downlink 1
11:35:18:elinks:INFO: Disabling clock on downlink 2
11:35:18:elinks:INFO: Disabling clock on downlink 3
11:35:18:elinks:INFO: Disabling clock on downlink 4
11:35:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:35:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:35:18:setup_element:INFO: Scanning clock phase
11:35:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:35:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:35:19:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:35:19:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:35:19:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:35:19:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:35:19:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:35:19:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:35:19:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:35:19:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:35:19:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:35:19:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:35:19:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:35:19:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:35:19:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:35:19:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:35:19:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:35:19:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:35:19:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:35:19:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
11:35:19:setup_element:INFO: Scanning data phases
11:35:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:35:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:35:24:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:35:24:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
11:35:24:setup_element:INFO: Eye window for uplink 1 : ___________XXXXX________________________
Data delay found: 33
11:35:24:setup_element:INFO: Eye window for uplink 2 : ____________XXXX________________________
Data delay found: 33
11:35:24:setup_element:INFO: Eye window for uplink 3 : ____________XXXXX_______________________
Data delay found: 34
11:35:24:setup_element:INFO: Eye window for uplink 4 : ___________XXXXX________________________
Data delay found: 33
11:35:24:setup_element:INFO: Eye window for uplink 5 : _________XXXXX__________________________
Data delay found: 31
11:35:24:setup_element:INFO: Eye window for uplink 6 : _____XXXXX______________________________
Data delay found: 27
11:35:24:setup_element:INFO: Eye window for uplink 7 : ___XXXXX________________________________
Data delay found: 25
11:35:24:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXXX____
Data delay found: 13
11:35:24:setup_element:INFO: Eye window for uplink 9 : __________________________________XXXXXX
Data delay found: 16
11:35:24:setup_element:INFO: Eye window for uplink 10: X_________________________________XXXXX_
Data delay found: 17
11:35:24:setup_element:INFO: Eye window for uplink 11: X__________________________________XXXXX
Data delay found: 17
11:35:24:setup_element:INFO: Eye window for uplink 12: X__________________________________XXXXX
Data delay found: 17
11:35:24:setup_element:INFO: Eye window for uplink 13: XX_________________________________XXXXX
Data delay found: 18
11:35:24:setup_element:INFO: Eye window for uplink 14: X___________________________________XXXX
Data delay found: 18
11:35:24:setup_element:INFO: Eye window for uplink 15: XX__________________________________XXXX
Data delay found: 18
11:35:24:setup_element:INFO: Setting the data phase to 35 for uplink 0
11:35:24:setup_element:INFO: Setting the data phase to 33 for uplink 1
11:35:24:setup_element:INFO: Setting the data phase to 33 for uplink 2
11:35:24:setup_element:INFO: Setting the data phase to 34 for uplink 3
11:35:24:setup_element:INFO: Setting the data phase to 33 for uplink 4
11:35:24:setup_element:INFO: Setting the data phase to 31 for uplink 5
11:35:24:setup_element:INFO: Setting the data phase to 27 for uplink 6
11:35:24:setup_element:INFO: Setting the data phase to 25 for uplink 7
11:35:24:setup_element:INFO: Setting the data phase to 13 for uplink 8
11:35:24:setup_element:INFO: Setting the data phase to 16 for uplink 9
11:35:24:setup_element:INFO: Setting the data phase to 17 for uplink 10
11:35:24:setup_element:INFO: Setting the data phase to 17 for uplink 11
11:35:24:setup_element:INFO: Setting the data phase to 17 for uplink 12
11:35:24:setup_element:INFO: Setting the data phase to 18 for uplink 13
11:35:24:setup_element:INFO: Setting the data phase to 18 for uplink 14
11:35:24:setup_element:INFO: Setting the data phase to 18 for uplink 15
==============================================OOO==============================================
11:35:24:setup_element:INFO: Beginning SMX ASICs map scan
11:35:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:35:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:35:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:35:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:35:24:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:35:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:35:25:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:35:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:35:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:35:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:35:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:35:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:35:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:35:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:35:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:35:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:35:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:35:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:35:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:35:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:35:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:35:27:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXXX__
Uplink 1: ______________________________________________________________________XXXXXXXX__
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXXXX_
Uplink 5: ______________________________________________________________________XXXXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXXXX
Uplink 7: _______________________________________________________________________XXXXXXXXX
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXXX__
Uplink 11: _____________________________________________________________________XXXXXXXXX__
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 2:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 3:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 4:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 5:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 6:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 7:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 8:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 9:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 10:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 11:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 12:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 13:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 14:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 15:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
==============================================OOO==============================================
11:35:27:setup_element:INFO: Performing Elink synchronization
11:35:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:35:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:35:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:35:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:35:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:35:27:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:35:28:ST3_emu_feb:DEBUG: Chip address: 0x0
11:35:28:ST3_emu_feb:DEBUG: Chip address: 0x1
11:35:28:ST3_emu_feb:DEBUG: Chip address: 0x2
11:35:28:ST3_emu_feb:DEBUG: Chip address: 0x3
11:35:28:ST3_emu_feb:DEBUG: Chip address: 0x4
11:35:28:ST3_emu_feb:DEBUG: Chip address: 0x5
11:35:28:ST3_emu_feb:DEBUG: Chip address: 0x6
11:35:28:ST3_emu_feb:DEBUG: Chip address: 0x7
11:35:28:febtest:INFO: Init all SMX (CSA): 30
11:35:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:35:43:febtest:INFO: 01-00 | XA-000-09-004-020-012-006-10 | 34.6 | 1141.9
11:35:43:febtest:INFO: 08-01 | XA-000-09-004-020-012-008-10 | 18.7 | 1195.1
11:35:43:febtest:INFO: 03-02 | XA-000-09-004-020-009-008-01 | 31.4 | 1153.7
11:35:44:febtest:INFO: 10-03 | XA-000-09-004-020-006-007-05 | 25.1 | 1177.4
11:35:44:febtest:INFO: 05-04 | XA-000-09-004-020-003-007-14 | 18.7 | 1195.1
11:35:44:febtest:INFO: 12-05 | XA-000-09-004-020-015-007-04 | 28.2 | 1171.5
11:35:44:febtest:INFO: 07-06 | XA-000-09-004-020-012-026-13 | 21.9 | 1171.5
11:35:44:febtest:INFO: 14-07 | XA-000-09-004-020-015-008-04 | 34.6 | 1135.9
11:35:45:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:35:48:ST3_smx:INFO: chip: 1-0 34.556970 C 1153.732915 mV
11:35:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:35:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:35:48:ST3_smx:INFO: Electrons
11:35:54:ST3_smx:INFO: Total # of broken channels: 6
11:35:54:ST3_smx:INFO: List of broken channels: [11, 49, 57, 78, 98, 116]
11:35:54:ST3_smx:INFO: Total # of broken channels: 1
11:35:54:ST3_smx:INFO: List of broken channels: [120]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:35:56:ST3_smx:INFO: chip: 8-1 18.745682 C 1206.851500 mV
11:35:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:35:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:35:56:ST3_smx:INFO: Electrons
11:36:03:ST3_smx:INFO: Total # of broken channels: 5
11:36:03:ST3_smx:INFO: List of broken channels: [8, 49, 68, 83, 102]
11:36:03:ST3_smx:INFO: Total # of broken channels: 0
11:36:03:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:36:05:ST3_smx:INFO: chip: 3-2 31.389742 C 1165.571835 mV
11:36:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:05:ST3_smx:INFO: Electrons
11:36:12:ST3_smx:INFO: Total # of broken channels: 9
11:36:12:ST3_smx:INFO: List of broken channels: [10, 20, 25, 26, 67, 78, 81, 99, 113]
11:36:12:ST3_smx:INFO: Total # of broken channels: 0
11:36:12:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:36:14:ST3_smx:INFO: chip: 10-3 25.062742 C 1189.190035 mV
11:36:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:14:ST3_smx:INFO: Electrons
11:36:20:ST3_smx:INFO: Total # of broken channels: 3
11:36:20:ST3_smx:INFO: List of broken channels: [53, 76, 87]
11:36:20:ST3_smx:INFO: Total # of broken channels: 0
11:36:20:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:36:22:ST3_smx:INFO: chip: 5-4 18.745682 C 1212.728715 mV
11:36:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:22:ST3_smx:INFO: Electrons
11:36:29:ST3_smx:INFO: Total # of broken channels: 3
11:36:29:ST3_smx:INFO: List of broken channels: [46, 83, 122]
11:36:29:ST3_smx:INFO: Total # of broken channels: 0
11:36:29:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:36:31:ST3_smx:INFO: chip: 12-5 28.225000 C 1183.292940 mV
11:36:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:31:ST3_smx:INFO: Electrons
11:36:38:ST3_smx:INFO: Total # of broken channels: 14
11:36:38:ST3_smx:INFO: List of broken channels: [23, 38, 43, 47, 48, 49, 55, 59, 87, 88, 92, 95, 101, 106]
11:36:38:ST3_smx:INFO: Total # of broken channels: 0
11:36:38:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:36:39:ST3_smx:INFO: chip: 7-6 25.062742 C 1183.292940 mV
11:36:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:39:ST3_smx:INFO: Electrons
11:36:46:ST3_smx:INFO: Total # of broken channels: 3
11:36:46:ST3_smx:INFO: List of broken channels: [100, 112, 117]
11:36:46:ST3_smx:INFO: Total # of broken channels: 0
11:36:46:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:36:48:ST3_smx:INFO: chip: 14-7 37.726682 C 1141.874115 mV
11:36:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:48:ST3_smx:INFO: Electrons
11:36:55:ST3_smx:INFO: Total # of broken channels: 8
11:36:55:ST3_smx:INFO: List of broken channels: [0, 14, 15, 18, 24, 35, 58, 98]
11:36:55:ST3_smx:INFO: Total # of broken channels: 0
11:36:55:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:36:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:36:55:febtest:INFO: 01-00 | XA-000-09-004-020-012-006-10 | 34.6 | 1177.4
11:36:56:febtest:INFO: 08-01 | XA-000-09-004-020-012-008-10 | 18.7 | 1224.5
11:36:56:febtest:INFO: 03-02 | XA-000-09-004-020-009-008-01 | 31.4 | 1183.3
11:36:56:febtest:INFO: 10-03 | XA-000-09-004-020-006-007-05 | 28.2 | 1206.9
11:36:56:febtest:INFO: 05-04 | XA-000-09-004-020-003-007-14 | 18.7 | 1236.2
11:36:56:febtest:INFO: 12-05 | XA-000-09-004-020-015-007-04 | 31.4 | 1201.0
11:36:57:febtest:INFO: 07-06 | XA-000-09-004-020-012-026-13 | 28.2 | 1201.0
11:36:57:febtest:INFO: 14-07 | XA-000-09-004-020-015-008-04 | 37.7 | 1165.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_06_06-11_35_00
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3102| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 06234 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M7UR2T2011392A2
LADDER_NAME: L7UR201139
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4590', '1.849', '2.6820', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0300', '1.850', '2.4450', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9720', '1.850', '0.5220', '0.000', '0.0000', '0.000', '0.0000']