09:50:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:50:41:ST3_Shared:INFO:	                         FEB-Sensor                         
09:50:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:50:45:ST3_Shared:INFO:	STS mode selected
09:50:57:ST3_ModuleSelector:DEBUG:	M5UR0T2011562A2
09:50:57:ST3_ModuleSelector:DEBUG:	L5UR001156
09:50:57:ST3_ModuleSelector:DEBUG:	24144
09:50:57:ST3_ModuleSelector:DEBUG:	62x124
09:50:57:ST3_ModuleSelector:DEBUG:	A
09:50:57:ST3_ModuleSelector:DEBUG:	M5UR0T2011562A2
09:50:57:ST3_ModuleSelector:DEBUG:	L5UR001156
09:50:57:ST3_ModuleSelector:DEBUG:	24144
09:50:57:ST3_ModuleSelector:DEBUG:	62x124
09:50:57:ST3_ModuleSelector:DEBUG:	A
09:51:05:ST3_ModuleSelector:INFO:	M5UR0T2011562A2
09:51:05:ST3_ModuleSelector:INFO:	24144
09:51:05:febtest:INFO:	Testing FEB with SN 4088
09:51:07:smx_tester:INFO:	Scanning setup
09:51:07:elinks:INFO:	Disabling clock on downlink 0
09:51:07:elinks:INFO:	Disabling clock on downlink 1
09:51:07:elinks:INFO:	Disabling clock on downlink 2
09:51:07:elinks:INFO:	Disabling clock on downlink 3
09:51:07:elinks:INFO:	Disabling clock on downlink 4
09:51:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:51:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:51:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:51:07:elinks:INFO:	Disabling clock on downlink 0
09:51:07:elinks:INFO:	Disabling clock on downlink 1
09:51:07:elinks:INFO:	Disabling clock on downlink 2
09:51:07:elinks:INFO:	Disabling clock on downlink 3
09:51:07:elinks:INFO:	Disabling clock on downlink 4
09:51:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:51:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:51:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:51:07:elinks:INFO:	Disabling clock on downlink 0
09:51:07:elinks:INFO:	Disabling clock on downlink 1
09:51:07:elinks:INFO:	Disabling clock on downlink 2
09:51:07:elinks:INFO:	Disabling clock on downlink 3
09:51:07:elinks:INFO:	Disabling clock on downlink 4
09:51:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:51:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:51:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:51:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:51:07:elinks:INFO:	Disabling clock on downlink 0
09:51:07:elinks:INFO:	Disabling clock on downlink 1
09:51:07:elinks:INFO:	Disabling clock on downlink 2
09:51:07:elinks:INFO:	Disabling clock on downlink 3
09:51:07:elinks:INFO:	Disabling clock on downlink 4
09:51:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:51:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:51:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:51:07:elinks:INFO:	Disabling clock on downlink 0
09:51:07:elinks:INFO:	Disabling clock on downlink 1
09:51:07:elinks:INFO:	Disabling clock on downlink 2
09:51:07:elinks:INFO:	Disabling clock on downlink 3
09:51:07:elinks:INFO:	Disabling clock on downlink 4
09:51:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:51:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:51:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:51:07:setup_element:INFO:	Scanning clock phase
09:51:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:51:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:51:08:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:51:08:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:51:08:setup_element:INFO:	Eye window for uplink 17: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:51:08:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
09:51:08:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
09:51:08:setup_element:INFO:	Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:51:08:setup_element:INFO:	Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:51:08:setup_element:INFO:	Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:51:08:setup_element:INFO:	Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:51:08:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
09:51:08:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
09:51:08:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:51:08:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:51:08:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:51:08:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:51:08:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:51:08:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:51:08:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
09:51:08:setup_element:INFO:	Scanning data phases
09:51:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:51:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:51:13:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:51:13:setup_element:INFO:	Eye window for uplink 16: XXXXX__________________________________X
Data delay found: 21
09:51:13:setup_element:INFO:	Eye window for uplink 17: XX___________________________________XXX
Data delay found: 19
09:51:13:setup_element:INFO:	Eye window for uplink 18: XXXX___________________________________X
Data delay found: 21
09:51:13:setup_element:INFO:	Eye window for uplink 19: XX___________________________________XXX
Data delay found: 19
09:51:13:setup_element:INFO:	Eye window for uplink 20: XXX_X__________________________________X
Data delay found: 21
09:51:13:setup_element:INFO:	Eye window for uplink 21: XXX__________________________________XXX
Data delay found: 19
09:51:13:setup_element:INFO:	Eye window for uplink 22: XXXXX_______________XXXXXXXXXXXXXXXXXXXX
Data delay found: 12
09:51:13:setup_element:INFO:	Eye window for uplink 23: XXXXXXX_____________XXXXXXXXXXXXXXXXXXXX
Data delay found: 13
09:51:13:setup_element:INFO:	Eye window for uplink 24: __________XXXXX_________________________
Data delay found: 32
09:51:13:setup_element:INFO:	Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
09:51:13:setup_element:INFO:	Eye window for uplink 26: _________XXXXXX_________________________
Data delay found: 31
09:51:13:setup_element:INFO:	Eye window for uplink 27: ____________XXXXXX______________________
Data delay found: 34
09:51:13:setup_element:INFO:	Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
09:51:13:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
09:51:13:setup_element:INFO:	Eye window for uplink 30: ________________XXXXX___________________
Data delay found: 38
09:51:13:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
09:51:13:setup_element:INFO:	Setting the data phase to 21 for uplink 16
09:51:13:setup_element:INFO:	Setting the data phase to 19 for uplink 17
09:51:13:setup_element:INFO:	Setting the data phase to 21 for uplink 18
09:51:13:setup_element:INFO:	Setting the data phase to 19 for uplink 19
09:51:13:setup_element:INFO:	Setting the data phase to 21 for uplink 20
09:51:13:setup_element:INFO:	Setting the data phase to 19 for uplink 21
09:51:13:setup_element:INFO:	Setting the data phase to 12 for uplink 22
09:51:13:setup_element:INFO:	Setting the data phase to 13 for uplink 23
09:51:13:setup_element:INFO:	Setting the data phase to 32 for uplink 24
09:51:13:setup_element:INFO:	Setting the data phase to 34 for uplink 25
09:51:13:setup_element:INFO:	Setting the data phase to 31 for uplink 26
09:51:13:setup_element:INFO:	Setting the data phase to 34 for uplink 27
09:51:13:setup_element:INFO:	Setting the data phase to 36 for uplink 28
09:51:13:setup_element:INFO:	Setting the data phase to 37 for uplink 29
09:51:13:setup_element:INFO:	Setting the data phase to 38 for uplink 30
09:51:13:setup_element:INFO:	Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
09:51:13:setup_element:INFO:	Beginning SMX ASICs map scan
09:51:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:51:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:51:14:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:51:14:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:51:14:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:51:14:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:51:14:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:51:14:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:51:14:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:51:14:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:51:14:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:51:14:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:51:14:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:51:14:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:51:14:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:51:15:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:51:15:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:51:15:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:51:15:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:51:15:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:51:15:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:51:16:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXXX___
      Uplink 17: ______________________________________________________________________XXXXXXX___
      Uplink 18: ________________________________________________________________________________
      Uplink 19: ________________________________________________________________________________
      Uplink 20: _____________________________________________________________________XXXXXXXXX__
      Uplink 21: _____________________________________________________________________XXXXXXXXX__
      Uplink 22: _____________________________________________________________________XXXXXXXX___
      Uplink 23: _____________________________________________________________________XXXXXXXX___
      Uplink 24: ________________________________________________________________________________
      Uplink 25: ________________________________________________________________________________
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: ____________________________________________________________________XXXXXXXXX___
      Uplink 29: ____________________________________________________________________XXXXXXXXX___
      Uplink 30: _____________________________________________________________________XXXXXXXXX__
      Uplink 31: _____________________________________________________________________XXXXXXXXX__
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 17:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 18:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 19:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 20:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXX_X__________________________________X
    Uplink 21:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 22:
      Optimal Phase: 12
      Window Length: 15
      Eye Window: XXXXX_______________XXXXXXXXXXXXXXXXXXXX
    Uplink 23:
      Optimal Phase: 13
      Window Length: 13
      Eye Window: XXXXXXX_____________XXXXXXXXXXXXXXXXXXXX
    Uplink 24:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 25:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 27:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 28:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 30:
      Optimal Phase: 38
      Window Length: 35
      Eye Window: ________________XXXXX___________________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________

==============================================OOO==============================================
09:51:16:setup_element:INFO:	Performing Elink synchronization
09:51:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:51:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:51:16:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:51:16:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
09:51:16:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:51:16:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:51:17:febtest:INFO:	Init all SMX (CSA): 30
09:51:31:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:51:31:febtest:INFO:	23-00 | XA-000-09-004-004-008-002-03 |  25.1 | 1153.7
09:51:31:febtest:INFO:	30-01 | XA-000-09-004-004-007-009-07 |  28.2 | 1147.8
09:51:32:febtest:INFO:	21-02 | XA-000-09-004-004-007-004-07 |  31.4 | 1141.9
09:51:32:febtest:INFO:	28-03 | XA-000-09-004-004-007-006-07 |  31.4 | 1135.9
09:51:32:febtest:INFO:	19-04 | XA-000-09-004-004-007-007-07 |  25.1 | 1159.7
09:51:32:febtest:INFO:	26-05 | XA-000-09-004-004-007-003-07 |  21.9 | 1165.6
09:51:32:febtest:INFO:	17-06 | XA-000-09-004-004-007-011-07 |  31.4 | 1147.8
09:51:33:febtest:INFO:	24-07 | XA-000-09-004-004-008-004-03 |  31.4 | 1147.8
09:51:34:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:51:36:ST3_smx:INFO:	chip: 23-0 	 25.062742 C 	 1165.571835 mV
09:51:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:51:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:51:36:ST3_smx:INFO:		Electrons
09:51:36:ST3_smx:INFO:	# loops 0
09:51:37:ST3_smx:INFO:	# loops 1
09:51:39:ST3_smx:INFO:	# loops 2
09:51:41:ST3_smx:INFO:	# loops 3
09:51:42:ST3_smx:INFO:	# loops 4
09:51:44:ST3_smx:INFO:	Total # of broken channels: 0
09:51:44:ST3_smx:INFO:	List of broken channels: []
09:51:44:ST3_smx:INFO:	Total # of broken channels: 0
09:51:44:ST3_smx:INFO:	List of broken channels: []
09:51:46:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1159.654860 mV
09:51:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:51:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:51:46:ST3_smx:INFO:		Electrons
09:51:46:ST3_smx:INFO:	# loops 0
09:51:47:ST3_smx:INFO:	# loops 1
09:51:49:ST3_smx:INFO:	# loops 2
09:51:50:ST3_smx:INFO:	# loops 3
09:51:52:ST3_smx:INFO:	# loops 4
09:51:53:ST3_smx:INFO:	Total # of broken channels: 0
09:51:53:ST3_smx:INFO:	List of broken channels: []
09:51:53:ST3_smx:INFO:	Total # of broken channels: 0
09:51:53:ST3_smx:INFO:	List of broken channels: []
09:51:55:ST3_smx:INFO:	chip: 21-2 	 31.389742 C 	 1147.806000 mV
09:51:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:51:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:51:55:ST3_smx:INFO:		Electrons
09:51:55:ST3_smx:INFO:	# loops 0
09:51:57:ST3_smx:INFO:	# loops 1
09:51:58:ST3_smx:INFO:	# loops 2
09:52:00:ST3_smx:INFO:	# loops 3
09:52:01:ST3_smx:INFO:	# loops 4
09:52:03:ST3_smx:INFO:	Total # of broken channels: 0
09:52:03:ST3_smx:INFO:	List of broken channels: []
09:52:03:ST3_smx:INFO:	Total # of broken channels: 8
09:52:03:ST3_smx:INFO:	List of broken channels: [1, 5, 7, 9, 17, 87, 95, 117]
09:52:05:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1147.806000 mV
09:52:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:52:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:52:05:ST3_smx:INFO:		Electrons
09:52:05:ST3_smx:INFO:	# loops 0
09:52:06:ST3_smx:INFO:	# loops 1
09:52:08:ST3_smx:INFO:	# loops 2
09:52:09:ST3_smx:INFO:	# loops 3
09:52:11:ST3_smx:INFO:	# loops 4
09:52:12:ST3_smx:INFO:	Total # of broken channels: 0
09:52:12:ST3_smx:INFO:	List of broken channels: []
09:52:12:ST3_smx:INFO:	Total # of broken channels: 0
09:52:12:ST3_smx:INFO:	List of broken channels: []
09:52:14:ST3_smx:INFO:	chip: 19-4 	 28.225000 C 	 1165.571835 mV
09:52:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:52:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:52:14:ST3_smx:INFO:		Electrons
09:52:14:ST3_smx:INFO:	# loops 0
09:52:15:ST3_smx:INFO:	# loops 1
09:52:17:ST3_smx:INFO:	# loops 2
09:52:18:ST3_smx:INFO:	# loops 3
09:52:20:ST3_smx:INFO:	# loops 4
09:52:21:ST3_smx:INFO:	Total # of broken channels: 0
09:52:21:ST3_smx:INFO:	List of broken channels: []
09:52:21:ST3_smx:INFO:	Total # of broken channels: 1
09:52:21:ST3_smx:INFO:	List of broken channels: [65]
09:52:23:ST3_smx:INFO:	chip: 26-5 	 21.902970 C 	 1177.390875 mV
09:52:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:52:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:52:23:ST3_smx:INFO:		Electrons
09:52:23:ST3_smx:INFO:	# loops 0
09:52:25:ST3_smx:INFO:	# loops 1
09:52:26:ST3_smx:INFO:	# loops 2
09:52:28:ST3_smx:INFO:	# loops 3
09:52:29:ST3_smx:INFO:	# loops 4
09:52:31:ST3_smx:INFO:	Total # of broken channels: 0
09:52:31:ST3_smx:INFO:	List of broken channels: []
09:52:31:ST3_smx:INFO:	Total # of broken channels: 0
09:52:31:ST3_smx:INFO:	List of broken channels: []
09:52:33:ST3_smx:INFO:	chip: 17-6 	 31.389742 C 	 1153.732915 mV
09:52:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:52:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:52:33:ST3_smx:INFO:		Electrons
09:52:33:ST3_smx:INFO:	# loops 0
09:52:34:ST3_smx:INFO:	# loops 1
09:52:36:ST3_smx:INFO:	# loops 2
09:52:37:ST3_smx:INFO:	# loops 3
09:52:39:ST3_smx:INFO:	# loops 4
09:52:40:ST3_smx:INFO:	Total # of broken channels: 0
09:52:40:ST3_smx:INFO:	List of broken channels: []
09:52:40:ST3_smx:INFO:	Total # of broken channels: 0
09:52:40:ST3_smx:INFO:	List of broken channels: []
09:52:42:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1153.732915 mV
09:52:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:52:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:52:42:ST3_smx:INFO:		Electrons
09:52:42:ST3_smx:INFO:	# loops 0
09:52:44:ST3_smx:INFO:	# loops 1
09:52:46:ST3_smx:INFO:	# loops 2
09:52:47:ST3_smx:INFO:	# loops 3
09:52:49:ST3_smx:INFO:	# loops 4
09:52:50:ST3_smx:INFO:	Total # of broken channels: 0
09:52:50:ST3_smx:INFO:	List of broken channels: []
09:52:50:ST3_smx:INFO:	Total # of broken channels: 0
09:52:50:ST3_smx:INFO:	List of broken channels: []
09:52:50:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:52:51:febtest:INFO:	23-00 | XA-000-09-004-004-008-002-03 |  28.2 | 1183.3
09:52:51:febtest:INFO:	30-01 | XA-000-09-004-004-007-009-07 |  31.4 | 1177.4
09:52:51:febtest:INFO:	21-02 | XA-000-09-004-004-007-004-07 |  34.6 | 1165.6
09:52:51:febtest:INFO:	28-03 | XA-000-09-004-004-007-006-07 |  31.4 | 1165.6
09:52:52:febtest:INFO:	19-04 | XA-000-09-004-004-007-007-07 |  28.2 | 1183.3
09:52:52:febtest:INFO:	26-05 | XA-000-09-004-004-007-003-07 |  25.1 | 1195.1
09:52:52:febtest:INFO:	17-06 | XA-000-09-004-004-007-011-07 |  34.6 | 1177.4
09:52:52:febtest:INFO:	24-07 | XA-000-09-004-004-008-004-03 |  34.6 | 1171.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_12_02-09_50_41
OPERATOR  : Kerstin S.; Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4088| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 24144 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M5UR0T2011562A2
LADDER_NAME: L5UR001156
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4500', '1.848', '2.0820']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0670', '1.850', '2.5980']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9820', '1.850', '0.5194']