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FEB_5032 25.07.25 10:59:22
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10:59:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:59:22:ST3_Shared:INFO: FEB-Microcable
10:59:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:59:22:febtest:INFO: Testing FEB with SN 5032
==============================================OOO==============================================
10:59:24:smx_tester:INFO: Scanning setup
10:59:24:elinks:INFO: Disabling clock on downlink 0
10:59:24:elinks:INFO: Disabling clock on downlink 1
10:59:24:elinks:INFO: Disabling clock on downlink 2
10:59:24:elinks:INFO: Disabling clock on downlink 3
10:59:24:elinks:INFO: Disabling clock on downlink 4
10:59:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:59:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:59:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:59:24:elinks:INFO: Disabling clock on downlink 0
10:59:24:elinks:INFO: Disabling clock on downlink 1
10:59:24:elinks:INFO: Disabling clock on downlink 2
10:59:24:elinks:INFO: Disabling clock on downlink 3
10:59:24:elinks:INFO: Disabling clock on downlink 4
10:59:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:59:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:59:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:59:24:elinks:INFO: Disabling clock on downlink 0
10:59:24:elinks:INFO: Disabling clock on downlink 1
10:59:24:elinks:INFO: Disabling clock on downlink 2
10:59:24:elinks:INFO: Disabling clock on downlink 3
10:59:24:elinks:INFO: Disabling clock on downlink 4
10:59:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:59:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:59:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 8
10:59:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 9
10:59:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 10
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 11
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 12
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 13
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:59:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:59:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:59:25:elinks:INFO: Disabling clock on downlink 0
10:59:25:elinks:INFO: Disabling clock on downlink 1
10:59:25:elinks:INFO: Disabling clock on downlink 2
10:59:25:elinks:INFO: Disabling clock on downlink 3
10:59:25:elinks:INFO: Disabling clock on downlink 4
10:59:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:59:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:59:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:59:25:elinks:INFO: Disabling clock on downlink 0
10:59:25:elinks:INFO: Disabling clock on downlink 1
10:59:25:elinks:INFO: Disabling clock on downlink 2
10:59:25:elinks:INFO: Disabling clock on downlink 3
10:59:25:elinks:INFO: Disabling clock on downlink 4
10:59:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:59:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:59:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:59:25:setup_element:INFO: Scanning clock phase
10:59:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:59:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:59:25:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:59:25:setup_element:INFO: Eye window for uplink 8 : XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
10:59:25:setup_element:INFO: Eye window for uplink 9 : XXXXX____________________________________________________________________XXXXXXX
Clock Delay: 38
10:59:25:setup_element:INFO: Eye window for uplink 10: XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
10:59:25:setup_element:INFO: Eye window for uplink 11: XXXXX____________________________________________________________________XXXXXXX
Clock Delay: 38
10:59:25:setup_element:INFO: Eye window for uplink 12: XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
10:59:25:setup_element:INFO: Eye window for uplink 13: XXXXX____________________________________________________________________XXXXXXX
Clock Delay: 38
10:59:25:setup_element:INFO: Eye window for uplink 16: XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
10:59:25:setup_element:INFO: Eye window for uplink 17: XXXXXX____________________________________________________________________XXXXXX
Clock Delay: 39
10:59:25:setup_element:INFO: Eye window for uplink 18: XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
10:59:25:setup_element:INFO: Eye window for uplink 19: XXXXXX____________________________________________________________________XXXXXX
Clock Delay: 39
10:59:25:setup_element:INFO: Eye window for uplink 20: XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
10:59:25:setup_element:INFO: Eye window for uplink 21: XXXXX____________________________________________________________________XXXXXXX
Clock Delay: 38
10:59:25:setup_element:INFO: Eye window for uplink 22: XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
10:59:25:setup_element:INFO: Eye window for uplink 23: XXXXX____________________________________________________________________XXXXXXX
Clock Delay: 38
10:59:25:setup_element:INFO: Eye window for uplink 26: XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
10:59:25:setup_element:INFO: Eye window for uplink 27: XXXXXX____________________________________________________________________XXXXXX
Clock Delay: 39
10:59:25:setup_element:INFO: Eye window for uplink 28: XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
10:59:25:setup_element:INFO: Eye window for uplink 29: XXXXXX____________________________________________________________________XXXXXX
Clock Delay: 39
10:59:25:setup_element:INFO: Eye window for uplink 30: XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
10:59:25:setup_element:INFO: Eye window for uplink 31: XXXXXX____________________________________________________________________XXXXXX
Clock Delay: 39
10:59:25:setup_element:INFO: Setting the clock phase to 39 for group 0, downlink 2
==============================================OOO==============================================
10:59:25:setup_element:INFO: Scanning data phases
10:59:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:59:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:59:31:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:59:31:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXX___________
Data delay found: 6
10:59:31:setup_element:INFO: Eye window for uplink 9 : _________________________XXXXX__________
Data delay found: 7
10:59:31:setup_element:INFO: Eye window for uplink 10: ______________________XXXXXX____________
Data delay found: 4
10:59:31:setup_element:INFO: Eye window for uplink 11: ________________________XXXXX___________
Data delay found: 6
10:59:31:setup_element:INFO: Eye window for uplink 12: ________________________XXXXXXX_________
Data delay found: 7
10:59:31:setup_element:INFO: Eye window for uplink 13: _______________________XXXXXX___________
Data delay found: 5
10:59:31:setup_element:INFO: Eye window for uplink 16: ______________________________XXXXXX____
Data delay found: 12
10:59:31:setup_element:INFO: Eye window for uplink 17: ____________________________XXXX________
Data delay found: 9
10:59:31:setup_element:INFO: Eye window for uplink 18: _____________________________XXXXX______
Data delay found: 11
10:59:31:setup_element:INFO: Eye window for uplink 19: __________________________XXXXXX________
Data delay found: 8
10:59:31:setup_element:INFO: Eye window for uplink 20: ____________________________XXXXXX______
Data delay found: 10
10:59:31:setup_element:INFO: Eye window for uplink 21: ____________________________XXXX________
Data delay found: 9
10:59:31:setup_element:INFO: Eye window for uplink 22: _____________________________XXXXXX_____
Data delay found: 11
10:59:31:setup_element:INFO: Eye window for uplink 23: __________________________XXXXX_________
Data delay found: 8
10:59:31:setup_element:INFO: Eye window for uplink 26: ___________________________XXXXXX_______
Data delay found: 9
10:59:31:setup_element:INFO: Eye window for uplink 27: ___________________________XXXXX________
Data delay found: 9
10:59:31:setup_element:INFO: Eye window for uplink 28: ____________________________XXXXXX______
Data delay found: 10
10:59:31:setup_element:INFO: Eye window for uplink 29: ____________________________XXXXX_______
Data delay found: 10
10:59:31:setup_element:INFO: Eye window for uplink 30: ________________________________XXXXX___
Data delay found: 14
10:59:31:setup_element:INFO: Eye window for uplink 31: ____________________________XXXXXX______
Data delay found: 10
10:59:31:setup_element:INFO: Setting the data phase to 6 for uplink 8
10:59:31:setup_element:INFO: Setting the data phase to 7 for uplink 9
10:59:31:setup_element:INFO: Setting the data phase to 4 for uplink 10
10:59:31:setup_element:INFO: Setting the data phase to 6 for uplink 11
10:59:31:setup_element:INFO: Setting the data phase to 7 for uplink 12
10:59:31:setup_element:INFO: Setting the data phase to 5 for uplink 13
10:59:31:setup_element:INFO: Setting the data phase to 12 for uplink 16
10:59:31:setup_element:INFO: Setting the data phase to 9 for uplink 17
10:59:31:setup_element:INFO: Setting the data phase to 11 for uplink 18
10:59:31:setup_element:INFO: Setting the data phase to 8 for uplink 19
10:59:31:setup_element:INFO: Setting the data phase to 10 for uplink 20
10:59:31:setup_element:INFO: Setting the data phase to 9 for uplink 21
10:59:31:setup_element:INFO: Setting the data phase to 11 for uplink 22
10:59:31:setup_element:INFO: Setting the data phase to 8 for uplink 23
10:59:31:setup_element:INFO: Setting the data phase to 9 for uplink 26
10:59:31:setup_element:INFO: Setting the data phase to 9 for uplink 27
10:59:31:setup_element:INFO: Setting the data phase to 10 for uplink 28
10:59:31:setup_element:INFO: Setting the data phase to 10 for uplink 29
10:59:31:setup_element:INFO: Setting the data phase to 14 for uplink 30
10:59:31:setup_element:INFO: Setting the data phase to 10 for uplink 31
==============================================OOO==============================================
10:59:31:setup_element:INFO: Beginning SMX ASICs map scan
10:59:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:59:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:59:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:59:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:59:31:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 16, 17, 18, 19, 20, 21, 22, 23, 26, 27, 28, 29, 30, 31]
10:59:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 11
10:59:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 13
10:59:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 2, uplink 21
10:59:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 3, uplink 23
10:59:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 4, uplink 9
10:59:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:59:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 26
10:59:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 2, uplink 18
10:59:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 3, uplink 16
10:59:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 4, uplink 30
10:59:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10
10:59:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 12
10:59:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 2, uplink 20
10:59:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 3, uplink 22
10:59:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 4, uplink 8
10:59:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 29
10:59:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 27
10:59:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 2, uplink 19
10:59:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 3, uplink 17
10:59:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 4, uplink 31
10:59:34:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [8, 9, 10, 11, 12, 13, 16, 17, 18, 19, 20, 21, 22, 23, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 11), (1, 13), (2, 21), (3, 23), (4, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 26), (2, 18), (3, 16), (4, 30)
ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 12), (2, 20), (3, 22), (4, 8)
ASIC address 0x7: (ASIC uplink, uplink): (0, 29), (1, 27), (2, 19), (3, 17), (4, 31)
Clock Phase Characteristic:
Optimal Phase: 39
Window Length: 66
Eye Windows:
Uplink 8: XXXXXXX___________________________________________________________________XXXXXX
Uplink 9: XXXXX____________________________________________________________________XXXXXXX
Uplink 10: XXXXXXX___________________________________________________________________XXXXXX
Uplink 11: XXXXX____________________________________________________________________XXXXXXX
Uplink 12: XXXXXXX___________________________________________________________________XXXXXX
Uplink 13: XXXXX____________________________________________________________________XXXXXXX
Uplink 16: XXXXXXX___________________________________________________________________XXXXXX
Uplink 17: XXXXXX____________________________________________________________________XXXXXX
Uplink 18: XXXXXXX___________________________________________________________________XXXXXX
Uplink 19: XXXXXX____________________________________________________________________XXXXXX
Uplink 20: XXXXXXX___________________________________________________________________XXXXXX
Uplink 21: XXXXX____________________________________________________________________XXXXXXX
Uplink 22: XXXXXXX___________________________________________________________________XXXXXX
Uplink 23: XXXXX____________________________________________________________________XXXXXXX
Uplink 26: XXXXXXX___________________________________________________________________XXXXXX
Uplink 27: XXXXXX____________________________________________________________________XXXXXX
Uplink 28: XXXXXXX___________________________________________________________________XXXXXX
Uplink 29: XXXXXX____________________________________________________________________XXXXXX
Uplink 30: XXXXXXX___________________________________________________________________XXXXXX
Uplink 31: XXXXXX____________________________________________________________________XXXXXX
Data phase characteristics:
Uplink 8:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 9:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 10:
Optimal Phase: 4
Window Length: 34
Eye Window: ______________________XXXXXX____________
Uplink 11:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 12:
Optimal Phase: 7
Window Length: 33
Eye Window: ________________________XXXXXXX_________
Uplink 13:
Optimal Phase: 5
Window Length: 34
Eye Window: _______________________XXXXXX___________
Uplink 16:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 17:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 18:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 19:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 20:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 21:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 22:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 23:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 26:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 27:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 28:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 29:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 30:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 31:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
==============================================OOO==============================================
10:59:34:setup_element:INFO: Performing Elink synchronization
10:59:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:59:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:59:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:59:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:59:34:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:59:34:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 16, 17, 18, 19, 20, 21, 22, 23, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [11] | 5 | [(0, 11), (1, 13), (2, 21), (3, 23), (4, 9)]
3 | [0] | 2 | 0 | [28] | 5 | [(0, 28), (1, 26), (2, 18), (3, 16), (4, 30)]
5 | [0] | 2 | 0 | [10] | 5 | [(0, 10), (1, 12), (2, 20), (3, 22), (4, 8)]
7 | [0] | 2 | 0 | [29] | 5 | [(0, 29), (1, 27), (2, 19), (3, 17), (4, 31)]
|_________________________________________________________________________|
10:59:34:ST3_emu_feb:DEBUG: Chip address: 0x1
10:59:34:ST3_emu_feb:DEBUG: Chip address: 0x3
10:59:34:ST3_emu_feb:DEBUG: Chip address: 0x5
10:59:34:ST3_emu_feb:DEBUG: Chip address: 0x7
10:59:34:febtest:INFO: Init all SMX (CSA): 30
10:59:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:59:42:febtest:INFO: 11-01 | XA-000-09-004-043-010-009-02 | 28.2 | 1177.4
10:59:42:febtest:INFO: 28-03 | XA-000-09-004-043-013-010-10 | 18.7 | 1201.0
10:59:42:febtest:INFO: 10-05 | XA-000-09-004-043-016-009-01 | 15.6 | 1206.9
10:59:43:febtest:INFO: 29-07 | XA-000-09-004-043-013-009-10 | 21.9 | 1189.2
10:59:44:febtest:INFO: Set all CSA to ZERO
FEB type: FEB_A: 1 FEB_B: 0
10:59:46:ST3_smx:INFO: chip: 11-1 25.062742 C 1183.292940 mV
10:59:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:59:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:59:46:ST3_smx:INFO: Electrons
10:59:50:ST3_smx:INFO: Total # of broken channels: 14
10:59:50:ST3_smx:INFO: List of broken channels: [10, 12, 20, 27, 46, 54, 62, 77, 96, 99, 101, 105, 116, 122]
10:59:50:ST3_smx:INFO: Total # of broken channels: 0
10:59:50:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:59:52:ST3_smx:INFO: chip: 28-3 18.745682 C 1212.728715 mV
10:59:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:59:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:59:52:ST3_smx:INFO: Electrons
10:59:57:ST3_smx:INFO: Total # of broken channels: 7
10:59:57:ST3_smx:INFO: List of broken channels: [11, 16, 83, 91, 100, 111, 115]
10:59:57:ST3_smx:INFO: Total # of broken channels: 1
10:59:57:ST3_smx:INFO: List of broken channels: [65]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:59:59:ST3_smx:INFO: chip: 10-5 15.590880 C 1212.728715 mV
10:59:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:59:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:59:59:ST3_smx:INFO: Electrons
11:00:04:ST3_smx:INFO: Total # of broken channels: 7
11:00:04:ST3_smx:INFO: List of broken channels: [6, 7, 10, 25, 57, 92, 108]
11:00:04:ST3_smx:INFO: Total # of broken channels: 0
11:00:04:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:00:05:ST3_smx:INFO: chip: 29-7 21.902970 C 1195.082160 mV
11:00:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:00:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:00:05:ST3_smx:INFO: Electrons
11:00:10:ST3_smx:INFO: Total # of broken channels: 6
11:00:10:ST3_smx:INFO: List of broken channels: [57, 62, 91, 113, 122, 124]
11:00:10:ST3_smx:INFO: Total # of broken channels: 0
11:00:10:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
11:00:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:00:11:febtest:INFO: 11-01 | XA-000-09-004-043-010-009-02 | 28.2 | 1206.9
11:00:11:febtest:INFO: 28-03 | XA-000-09-004-043-013-010-10 | 18.7 | 1236.2
11:00:11:febtest:INFO: 10-05 | XA-000-09-004-043-016-009-01 | 15.6 | 1236.2
11:00:11:febtest:INFO: 29-07 | XA-000-09-004-043-013-009-10 | 25.1 | 1218.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_25-10_59_22
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 5032| FEB_TYPE : 8.5| FEB_UPLINKS : 5| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '0.9940', '1.849', '0.8768', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0090', '1.850', '1.0740', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9989', '1.850', '0.2695', '0.000', '0.0000', '0.000', '0.0000']