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FEB_6013 10.11.23 10:44:42
Info
10:44:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:44:42:ST3_Shared:INFO: --------------------------FEB-ASIC--------------------------
10:44:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:44:42:febtest:INFO: Tsting FEB with SN 6013
10:44:43:smx_tester:INFO: Scanning setup
10:44:43:elinks:INFO: Disabling clock on downlink 0
10:44:43:elinks:INFO: Disabling clock on downlink 1
10:44:43:elinks:INFO: Disabling clock on downlink 2
10:44:43:elinks:INFO: Disabling clock on downlink 3
10:44:43:elinks:INFO: Disabling clock on downlink 4
10:44:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:44:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:43:elinks:INFO: Disabling clock on downlink 0
10:44:43:elinks:INFO: Disabling clock on downlink 1
10:44:43:elinks:INFO: Disabling clock on downlink 2
10:44:43:elinks:INFO: Disabling clock on downlink 3
10:44:43:elinks:INFO: Disabling clock on downlink 4
10:44:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:44:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:44:elinks:INFO: Disabling clock on downlink 0
10:44:44:elinks:INFO: Disabling clock on downlink 1
10:44:44:elinks:INFO: Disabling clock on downlink 2
10:44:44:elinks:INFO: Disabling clock on downlink 3
10:44:44:elinks:INFO: Disabling clock on downlink 4
10:44:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 0
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 1
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 2
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 3
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 4
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 5
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 6
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 7
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 8
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 9
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 10
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 11
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 12
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 13
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 14
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 15
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 32
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 33
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 34
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 35
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 36
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 37
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 38
10:44:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 39
10:44:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:44:elinks:INFO: Disabling clock on downlink 0
10:44:44:elinks:INFO: Disabling clock on downlink 1
10:44:44:elinks:INFO: Disabling clock on downlink 2
10:44:44:elinks:INFO: Disabling clock on downlink 3
10:44:44:elinks:INFO: Disabling clock on downlink 4
10:44:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:44:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:44:elinks:INFO: Disabling clock on downlink 0
10:44:44:elinks:INFO: Disabling clock on downlink 1
10:44:44:elinks:INFO: Disabling clock on downlink 2
10:44:44:elinks:INFO: Disabling clock on downlink 3
10:44:44:elinks:INFO: Disabling clock on downlink 4
10:44:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:44:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:44:setup_element:INFO: Scanning clock phase
10:44:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:44:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:44:45:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:44:45:setup_element:INFO: Eye window for uplink 0 : _____XXXXXX_____________________________________________________________________
Clock Delay: 47
10:44:45:setup_element:INFO: Eye window for uplink 1 : ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 2 : _____XXXXXX_____________________________________________________________________
Clock Delay: 47
10:44:45:setup_element:INFO: Eye window for uplink 3 : ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 4 : _____XXXXXX_____________________________________________________________________
Clock Delay: 47
10:44:45:setup_element:INFO: Eye window for uplink 5 : ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 6 : _____XXXXXX_____________________________________________________________________
Clock Delay: 47
10:44:45:setup_element:INFO: Eye window for uplink 7 : ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 8 : ___XXXXXX_______________________________________________________________________
Clock Delay: 45
10:44:45:setup_element:INFO: Eye window for uplink 9 : ____XXXXX_______________________________________________________________________
Clock Delay: 46
10:44:45:setup_element:INFO: Eye window for uplink 10: ___XXXXXX_______________________________________________________________________
Clock Delay: 45
10:44:45:setup_element:INFO: Eye window for uplink 11: ____XXXXX_______________________________________________________________________
Clock Delay: 46
10:44:45:setup_element:INFO: Eye window for uplink 12: ___XXXXXX_______________________________________________________________________
Clock Delay: 45
10:44:45:setup_element:INFO: Eye window for uplink 13: ____XXXXX_______________________________________________________________________
Clock Delay: 46
10:44:45:setup_element:INFO: Eye window for uplink 14: _____XXXXXX_____________________________________________________________________
Clock Delay: 47
10:44:45:setup_element:INFO: Eye window for uplink 15: ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 16: ____XXXXX_______________________________________________________________________
Clock Delay: 46
10:44:45:setup_element:INFO: Eye window for uplink 17: ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 18: ____XXXXX_______________________________________________________________________
Clock Delay: 46
10:44:45:setup_element:INFO: Eye window for uplink 19: ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 20: ___XXXXXX_______________________________________________________________________
Clock Delay: 45
10:44:45:setup_element:INFO: Eye window for uplink 21: ____XXXXX_______________________________________________________________________
Clock Delay: 46
10:44:45:setup_element:INFO: Eye window for uplink 22: ___XXXXXX_______________________________________________________________________
Clock Delay: 45
10:44:45:setup_element:INFO: Eye window for uplink 23: ____XXXXX_______________________________________________________________________
Clock Delay: 46
10:44:45:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 25: _____XXXXXX_____________________________________________________________________
Clock Delay: 47
10:44:45:setup_element:INFO: Eye window for uplink 26: ____XXXXX_______________________________________________________________________
Clock Delay: 46
10:44:45:setup_element:INFO: Eye window for uplink 27: ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 28: ____XXXXX_______________________________________________________________________
Clock Delay: 46
10:44:45:setup_element:INFO: Eye window for uplink 29: ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 30: ____XXXXX_______________________________________________________________________
Clock Delay: 46
10:44:45:setup_element:INFO: Eye window for uplink 31: ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 32: ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 33: _____XXXXXX_____________________________________________________________________
Clock Delay: 47
10:44:45:setup_element:INFO: Eye window for uplink 34: ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 35: _____XXXXXX_____________________________________________________________________
Clock Delay: 47
10:44:45:setup_element:INFO: Eye window for uplink 36: ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 37: _____XXXXXX_____________________________________________________________________
Clock Delay: 47
10:44:45:setup_element:INFO: Eye window for uplink 38: ______XXXXXX____________________________________________________________________
Clock Delay: 48
10:44:45:setup_element:INFO: Eye window for uplink 39: _____XXXXXX_____________________________________________________________________
Clock Delay: 47
10:44:45:setup_element:INFO: Setting the clock phase to 47 for group 0, downlink 2
10:44:45:setup_element:INFO: Scanning data phases
10:44:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:44:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:44:51:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:44:51:setup_element:INFO: Eye window for uplink 0 : _______________________XXXXXX___________
Data delay found: 5
10:44:51:setup_element:INFO: Eye window for uplink 1 : _______________________________XXXX_____
Data delay found: 12
10:44:51:setup_element:INFO: Eye window for uplink 2 : ________________________XXXXXX__________
Data delay found: 6
10:44:51:setup_element:INFO: Eye window for uplink 3 : _______________________________XXXXX____
Data delay found: 13
10:44:51:setup_element:INFO: Eye window for uplink 4 : _________________________XXXXX__________
Data delay found: 7
10:44:51:setup_element:INFO: Eye window for uplink 5 : _________________________________XXXX___
Data delay found: 14
10:44:51:setup_element:INFO: Eye window for uplink 6 : _____________________XXXXXX_____________
Data delay found: 3
10:44:51:setup_element:INFO: Eye window for uplink 7 : _____________________________XXXXX______
Data delay found: 11
10:44:51:setup_element:INFO: Eye window for uplink 8 : _______XXXXXX___________________________
Data delay found: 29
10:44:51:setup_element:INFO: Eye window for uplink 9 : __________XXXX__________________________
Data delay found: 31
10:44:51:setup_element:INFO: Eye window for uplink 10: __________XXXXX_________________________
Data delay found: 32
10:44:51:setup_element:INFO: Eye window for uplink 11: ___________XXXX_________________________
Data delay found: 32
10:44:51:setup_element:INFO: Eye window for uplink 12: __________XXXXX_________________________
Data delay found: 32
10:44:51:setup_element:INFO: Eye window for uplink 13: __________XXXXX_________________________
Data delay found: 32
10:44:51:setup_element:INFO: Eye window for uplink 14: ______________________XXXXX_____________
Data delay found: 4
10:44:51:setup_element:INFO: Eye window for uplink 15: _______________________________XXXX_____
Data delay found: 12
10:44:51:setup_element:INFO: Eye window for uplink 16: ____________XXXX________________________
Data delay found: 33
10:44:51:setup_element:INFO: Eye window for uplink 17: _________________XXXXX__________________
Data delay found: 39
10:44:51:setup_element:INFO: Eye window for uplink 18: _____________XXXX_______________________
Data delay found: 34
10:44:51:setup_element:INFO: Eye window for uplink 19: __________________XXXXX_________________
Data delay found: 0
10:44:51:setup_element:INFO: Eye window for uplink 20: _____________XXXXX______________________
Data delay found: 35
10:44:51:setup_element:INFO: Eye window for uplink 21: _____________XXXXX______________________
Data delay found: 35
10:44:51:setup_element:INFO: Eye window for uplink 22: ______________XXXX______________________
Data delay found: 35
10:44:51:setup_element:INFO: Eye window for uplink 23: ___________XXXXX________________________
Data delay found: 33
10:44:51:setup_element:INFO: Eye window for uplink 24: _____________________________XXXXXX_____
Data delay found: 11
10:44:51:setup_element:INFO: Eye window for uplink 25: _______________________XXXXX____________
Data delay found: 5
10:44:51:setup_element:INFO: Eye window for uplink 26: _________XXXXX__________________________
Data delay found: 31
10:44:51:setup_element:INFO: Eye window for uplink 27: _________________XXXXXX_________________
Data delay found: 39
10:44:51:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
10:44:51:setup_element:INFO: Eye window for uplink 29: ____________________XXXX________________
Data delay found: 1
10:44:51:setup_element:INFO: Eye window for uplink 30: _____________XXXXX______________________
Data delay found: 35
10:44:51:setup_element:INFO: Eye window for uplink 31: __________________XXXXX_________________
Data delay found: 0
10:44:51:setup_element:INFO: Eye window for uplink 32: ______________________________XXXXX_____
Data delay found: 12
10:44:51:setup_element:INFO: Eye window for uplink 33: ________________________XXXXX___________
Data delay found: 6
10:44:51:setup_element:INFO: Eye window for uplink 34: ______________________________XXXXXX____
Data delay found: 12
10:44:51:setup_element:INFO: Eye window for uplink 35: ________________________XXXXX___________
Data delay found: 6
10:44:51:setup_element:INFO: Eye window for uplink 36: _____________________________XXXXX______
Data delay found: 11
10:44:51:setup_element:INFO: Eye window for uplink 37: ________________________XXXXX___________
Data delay found: 6
10:44:51:setup_element:INFO: Eye window for uplink 38: ___________________________XXXXX________
Data delay found: 9
10:44:51:setup_element:INFO: Eye window for uplink 39: _______________________XXXXX____________
Data delay found: 5
10:44:51:setup_element:INFO: Setting the data phase to 5 for uplink 0
10:44:51:setup_element:INFO: Setting the data phase to 12 for uplink 1
10:44:51:setup_element:INFO: Setting the data phase to 6 for uplink 2
10:44:51:setup_element:INFO: Setting the data phase to 13 for uplink 3
10:44:51:setup_element:INFO: Setting the data phase to 7 for uplink 4
10:44:51:setup_element:INFO: Setting the data phase to 14 for uplink 5
10:44:51:setup_element:INFO: Setting the data phase to 3 for uplink 6
10:44:51:setup_element:INFO: Setting the data phase to 11 for uplink 7
10:44:51:setup_element:INFO: Setting the data phase to 29 for uplink 8
10:44:51:setup_element:INFO: Setting the data phase to 31 for uplink 9
10:44:51:setup_element:INFO: Setting the data phase to 32 for uplink 10
10:44:51:setup_element:INFO: Setting the data phase to 32 for uplink 11
10:44:51:setup_element:INFO: Setting the data phase to 32 for uplink 12
10:44:51:setup_element:INFO: Setting the data phase to 32 for uplink 13
10:44:51:setup_element:INFO: Setting the data phase to 4 for uplink 14
10:44:51:setup_element:INFO: Setting the data phase to 12 for uplink 15
10:44:51:setup_element:INFO: Setting the data phase to 33 for uplink 16
10:44:51:setup_element:INFO: Setting the data phase to 39 for uplink 17
10:44:51:setup_element:INFO: Setting the data phase to 34 for uplink 18
10:44:51:setup_element:INFO: Setting the data phase to 0 for uplink 19
10:44:51:setup_element:INFO: Setting the data phase to 35 for uplink 20
10:44:51:setup_element:INFO: Setting the data phase to 35 for uplink 21
10:44:51:setup_element:INFO: Setting the data phase to 35 for uplink 22
10:44:51:setup_element:INFO: Setting the data phase to 33 for uplink 23
10:44:51:setup_element:INFO: Setting the data phase to 11 for uplink 24
10:44:51:setup_element:INFO: Setting the data phase to 5 for uplink 25
10:44:51:setup_element:INFO: Setting the data phase to 31 for uplink 26
10:44:51:setup_element:INFO: Setting the data phase to 39 for uplink 27
10:44:51:setup_element:INFO: Setting the data phase to 35 for uplink 28
10:44:51:setup_element:INFO: Setting the data phase to 1 for uplink 29
10:44:51:setup_element:INFO: Setting the data phase to 35 for uplink 30
10:44:51:setup_element:INFO: Setting the data phase to 0 for uplink 31
10:44:51:setup_element:INFO: Setting the data phase to 12 for uplink 32
10:44:51:setup_element:INFO: Setting the data phase to 6 for uplink 33
10:44:51:setup_element:INFO: Setting the data phase to 12 for uplink 34
10:44:51:setup_element:INFO: Setting the data phase to 6 for uplink 35
10:44:51:setup_element:INFO: Setting the data phase to 11 for uplink 36
10:44:51:setup_element:INFO: Setting the data phase to 6 for uplink 37
10:44:52:setup_element:INFO: Setting the data phase to 9 for uplink 38
10:44:52:setup_element:INFO: Setting the data phase to 5 for uplink 39
10:44:52:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 47
Window Length: 71
Eye Windows:
Uplink 0: _____XXXXXX_____________________________________________________________________
Uplink 1: ______XXXXXX____________________________________________________________________
Uplink 2: _____XXXXXX_____________________________________________________________________
Uplink 3: ______XXXXXX____________________________________________________________________
Uplink 4: _____XXXXXX_____________________________________________________________________
Uplink 5: ______XXXXXX____________________________________________________________________
Uplink 6: _____XXXXXX_____________________________________________________________________
Uplink 7: ______XXXXXX____________________________________________________________________
Uplink 8: ___XXXXXX_______________________________________________________________________
Uplink 9: ____XXXXX_______________________________________________________________________
Uplink 10: ___XXXXXX_______________________________________________________________________
Uplink 11: ____XXXXX_______________________________________________________________________
Uplink 12: ___XXXXXX_______________________________________________________________________
Uplink 13: ____XXXXX_______________________________________________________________________
Uplink 14: _____XXXXXX_____________________________________________________________________
Uplink 15: ______XXXXXX____________________________________________________________________
Uplink 16: ____XXXXX_______________________________________________________________________
Uplink 17: ______XXXXXX____________________________________________________________________
Uplink 18: ____XXXXX_______________________________________________________________________
Uplink 19: ______XXXXXX____________________________________________________________________
Uplink 20: ___XXXXXX_______________________________________________________________________
Uplink 21: ____XXXXX_______________________________________________________________________
Uplink 22: ___XXXXXX_______________________________________________________________________
Uplink 23: ____XXXXX_______________________________________________________________________
Uplink 24: ______XXXXXX____________________________________________________________________
Uplink 25: _____XXXXXX_____________________________________________________________________
Uplink 26: ____XXXXX_______________________________________________________________________
Uplink 27: ______XXXXXX____________________________________________________________________
Uplink 28: ____XXXXX_______________________________________________________________________
Uplink 29: ______XXXXXX____________________________________________________________________
Uplink 30: ____XXXXX_______________________________________________________________________
Uplink 31: ______XXXXXX____________________________________________________________________
Uplink 32: ______XXXXXX____________________________________________________________________
Uplink 33: _____XXXXXX_____________________________________________________________________
Uplink 34: ______XXXXXX____________________________________________________________________
Uplink 35: _____XXXXXX_____________________________________________________________________
Uplink 36: ______XXXXXX____________________________________________________________________
Uplink 37: _____XXXXXX_____________________________________________________________________
Uplink 38: ______XXXXXX____________________________________________________________________
Uplink 39: _____XXXXXX_____________________________________________________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 5
Window Length: 34
Eye Window: _______________________XXXXXX___________
Uplink 1:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 2:
Optimal Phase: 6
Window Length: 34
Eye Window: ________________________XXXXXX__________
Uplink 3:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 4:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 5:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 6:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 7:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 8:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 9:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 10:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 11:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 12:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 13:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 14:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 15:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 16:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 17:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 18:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
Uplink 19:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 20:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 21:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 22:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
Uplink 23:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 24:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 25:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 26:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 27:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 1
Window Length: 36
Eye Window: ____________________XXXX________________
Uplink 30:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 31:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 32:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 33:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 34:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 35:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 36:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 37:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 38:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 39:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
]
10:44:52:setup_element:INFO: Beginning SMX ASICs map scan
10:44:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:44:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:44:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:44:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:44:52:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39]
10:44:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 21
10:44:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 23
10:44:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 2, uplink 9
10:44:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 3, uplink 11
10:44:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 4, uplink 13
10:44:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 15
10:44:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 1
10:44:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 2, uplink 3
10:44:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 3, uplink 5
10:44:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 4, uplink 7
10:44:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 18
10:44:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 16
10:44:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 2, uplink 30
10:44:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 3, uplink 28
10:44:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 4, uplink 26
10:44:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 24
10:44:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 38
10:44:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 2, uplink 36
10:44:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 3, uplink 34
10:44:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 4, uplink 32
10:44:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 20
10:44:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 22
10:44:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 2, uplink 8
10:44:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 3, uplink 10
10:44:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 4, uplink 12
10:44:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 14
10:44:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 0
10:44:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 2, uplink 2
10:44:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 3, uplink 4
10:44:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 4, uplink 6
10:44:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 19
10:44:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 17
10:44:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 2, uplink 31
10:44:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 3, uplink 29
10:44:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 4, uplink 27
10:44:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 25
10:44:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 39
10:44:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 2, uplink 37
10:44:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 3, uplink 35
10:44:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 4, uplink 33
10:44:55:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 21), (1, 23), (2, 9), (3, 11), (4, 13)
ASIC address 0x1: (ASIC uplink, uplink): (0, 15), (1, 1), (2, 3), (3, 5), (4, 7)
ASIC address 0x2: (ASIC uplink, uplink): (0, 18), (1, 16), (2, 30), (3, 28), (4, 26)
ASIC address 0x3: (ASIC uplink, uplink): (0, 24), (1, 38), (2, 36), (3, 34), (4, 32)
ASIC address 0x4: (ASIC uplink, uplink): (0, 20), (1, 22), (2, 8), (3, 10), (4, 12)
ASIC address 0x5: (ASIC uplink, uplink): (0, 14), (1, 0), (2, 2), (3, 4), (4, 6)
ASIC address 0x6: (ASIC uplink, uplink): (0, 19), (1, 17), (2, 31), (3, 29), (4, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 25), (1, 39), (2, 37), (3, 35), (4, 33)
Clock Phase Characteristic:
Optimal Phase: 47
Window Length: 71
Eye Windows:
Uplink 0: _____XXXXXX_____________________________________________________________________
Uplink 1: ______XXXXXX____________________________________________________________________
Uplink 2: _____XXXXXX_____________________________________________________________________
Uplink 3: ______XXXXXX____________________________________________________________________
Uplink 4: _____XXXXXX_____________________________________________________________________
Uplink 5: ______XXXXXX____________________________________________________________________
Uplink 6: _____XXXXXX_____________________________________________________________________
Uplink 7: ______XXXXXX____________________________________________________________________
Uplink 8: ___XXXXXX_______________________________________________________________________
Uplink 9: ____XXXXX_______________________________________________________________________
Uplink 10: ___XXXXXX_______________________________________________________________________
Uplink 11: ____XXXXX_______________________________________________________________________
Uplink 12: ___XXXXXX_______________________________________________________________________
Uplink 13: ____XXXXX_______________________________________________________________________
Uplink 14: _____XXXXXX_____________________________________________________________________
Uplink 15: ______XXXXXX____________________________________________________________________
Uplink 16: ____XXXXX_______________________________________________________________________
Uplink 17: ______XXXXXX____________________________________________________________________
Uplink 18: ____XXXXX_______________________________________________________________________
Uplink 19: ______XXXXXX____________________________________________________________________
Uplink 20: ___XXXXXX_______________________________________________________________________
Uplink 21: ____XXXXX_______________________________________________________________________
Uplink 22: ___XXXXXX_______________________________________________________________________
Uplink 23: ____XXXXX_______________________________________________________________________
Uplink 24: ______XXXXXX____________________________________________________________________
Uplink 25: _____XXXXXX_____________________________________________________________________
Uplink 26: ____XXXXX_______________________________________________________________________
Uplink 27: ______XXXXXX____________________________________________________________________
Uplink 28: ____XXXXX_______________________________________________________________________
Uplink 29: ______XXXXXX____________________________________________________________________
Uplink 30: ____XXXXX_______________________________________________________________________
Uplink 31: ______XXXXXX____________________________________________________________________
Uplink 32: ______XXXXXX____________________________________________________________________
Uplink 33: _____XXXXXX_____________________________________________________________________
Uplink 34: ______XXXXXX____________________________________________________________________
Uplink 35: _____XXXXXX_____________________________________________________________________
Uplink 36: ______XXXXXX____________________________________________________________________
Uplink 37: _____XXXXXX_____________________________________________________________________
Uplink 38: ______XXXXXX____________________________________________________________________
Uplink 39: _____XXXXXX_____________________________________________________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 5
Window Length: 34
Eye Window: _______________________XXXXXX___________
Uplink 1:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 2:
Optimal Phase: 6
Window Length: 34
Eye Window: ________________________XXXXXX__________
Uplink 3:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 4:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 5:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 6:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 7:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 8:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 9:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 10:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 11:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 12:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 13:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 14:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 15:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 16:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 17:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 18:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
Uplink 19:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 20:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 21:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 22:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
Uplink 23:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 24:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 25:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 26:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 27:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 1
Window Length: 36
Eye Window: ____________________XXXX________________
Uplink 30:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 31:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 32:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 33:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 34:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 35:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 36:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 37:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 38:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 39:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
10:44:55:setup_element:INFO: Performing Elink synchronization
10:44:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:44:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:44:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:44:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:44:55:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:44:55:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39]
10:44:55:ST3_emu:INFO: Number of chips: 8
10:44:55:ST3_emu:INFO: Chip address: 0x0
10:44:55:ST3_emu:INFO: Chip address: 0x1
10:44:55:ST3_emu:INFO: Chip address: 0x2
10:44:55:ST3_emu:INFO: Chip address: 0x3
10:44:55:ST3_emu:INFO: Chip address: 0x4
10:44:55:ST3_emu:INFO: Chip address: 0x5
10:44:55:ST3_emu:INFO: Chip address: 0x6
10:44:55:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
10:44:56:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:44:56:febtest:INFO: 0-0 | XA-000-08-002-000-002-065-08 | 60.0 | 1094.2
10:44:56:febtest:INFO: 0-1 | XA-000-08-002-000-006-115-07 | 28.2 | 1206.9
10:44:56:febtest:INFO: 0-2 | XA-000-08-002-000-002-120-01 | 47.3 | 1141.9
10:44:57:febtest:INFO: 0-3 | XA-000-08-002-000-006-095-09 | 31.4 | 1183.3
10:44:57:febtest:INFO: 0-4 | XA-000-08-002-000-002-145-00 | 3.0 | 1288.7
10:44:57:febtest:INFO: 0-5 | XA-000-08-002-000-006-127-07 | 25.1 | 1224.5
10:44:57:febtest:INFO: 0-6 | XA-000-08-002-000-003-046-14 | 40.9 | 1153.7
10:44:58:febtest:INFO: 0-7 | XA-000-08-002-000-002-153-00 | 9.3 | 1271.2
10:44:58:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:45:01:ST3_smx:INFO: chip: 0-0 56.797143 C 1088.263500 mV
10:45:01:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:45:01:ST3_smx:INFO: Electrons
10:45:01:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:03:ST3_smx:INFO: ----> Checking Analog response
10:45:03:ST3_smx:INFO: ----> Checking broken channels
10:45:03:ST3_smx:INFO: Total # broken ch: 0
10:45:03:ST3_smx:INFO: List FAST: []
10:45:03:ST3_smx:INFO: List SLOW: []
10:45:03:ST3_smx:INFO: Holes
10:45:03:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:05:ST3_smx:INFO: ----> Checking Analog response
10:45:05:ST3_smx:INFO: ----> Checking broken channels
10:45:06:ST3_smx:INFO: Total # broken ch: 0
10:45:06:ST3_smx:INFO: List FAST: []
10:45:06:ST3_smx:INFO: List SLOW: []
10:45:06:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:45:06:febtest:INFO: 0-0 | XA-000-08-002-000-002-065-08 | 60.0 | 1082.3
10:45:06:febtest:INFO: 0-1 | XA-000-08-002-000-006-115-07 | 28.2 | 1201.0
10:45:06:febtest:INFO: 0-2 | XA-000-08-002-000-002-120-01 | 47.3 | 1135.9
10:45:07:febtest:INFO: 0-3 | XA-000-08-002-000-006-095-09 | 31.4 | 1189.2
10:45:07:febtest:INFO: 0-4 | XA-000-08-002-000-002-145-00 | 3.0 | 1282.9
10:45:07:febtest:INFO: 0-5 | XA-000-08-002-000-006-127-07 | 25.1 | 1224.5
10:45:07:febtest:INFO: 0-6 | XA-000-08-002-000-003-046-14 | 40.9 | 1147.8
10:45:08:febtest:INFO: 0-7 | XA-000-08-002-000-002-153-00 | 9.3 | 1271.2
10:45:08:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:45:11:ST3_smx:INFO: chip: 0-1 28.225000 C 1189.190035 mV
10:45:11:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:45:11:ST3_smx:INFO: Electrons
10:45:11:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:13:ST3_smx:INFO: ----> Checking Analog response
10:45:13:ST3_smx:INFO: ----> Checking broken channels
10:45:14:ST3_smx:INFO: Total # broken ch: 1
10:45:14:ST3_smx:INFO: List FAST: [78]
10:45:14:ST3_smx:INFO: List SLOW: []
10:45:14:ST3_smx:INFO: Holes
10:45:14:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:16:ST3_smx:INFO: ----> Checking Analog response
10:45:16:ST3_smx:INFO: ----> Checking broken channels
10:45:16:ST3_smx:INFO: Total # broken ch: 1
10:45:16:ST3_smx:INFO: List FAST: [78]
10:45:16:ST3_smx:INFO: List SLOW: []
10:45:16:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:45:16:febtest:INFO: 0-0 | XA-000-08-002-000-002-065-08 | 60.0 | 1082.3
10:45:16:febtest:INFO: 0-1 | XA-000-08-002-000-006-115-07 | 28.2 | 1189.2
10:45:17:febtest:INFO: 0-2 | XA-000-08-002-000-002-120-01 | 44.1 | 1135.9
10:45:17:febtest:INFO: 0-3 | XA-000-08-002-000-006-095-09 | 31.4 | 1183.3
10:45:17:febtest:INFO: 0-4 | XA-000-08-002-000-002-145-00 | 3.0 | 1282.9
10:45:17:febtest:INFO: 0-5 | XA-000-08-002-000-006-127-07 | 25.1 | 1224.5
10:45:18:febtest:INFO: 0-6 | XA-000-08-002-000-003-046-14 | 40.9 | 1147.8
10:45:18:febtest:INFO: 0-7 | XA-000-08-002-000-002-153-00 | 9.3 | 1271.2
10:45:18:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:45:22:ST3_smx:INFO: chip: 0-2 50.430383 C 1112.140140 mV
10:45:22:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:45:22:ST3_smx:INFO: Electrons
10:45:22:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:24:ST3_smx:INFO: ----> Checking Analog response
10:45:24:ST3_smx:INFO: ----> Checking broken channels
10:45:24:ST3_smx:INFO: Total # broken ch: 0
10:45:24:ST3_smx:INFO: List FAST: []
10:45:24:ST3_smx:INFO: List SLOW: []
10:45:24:ST3_smx:INFO: Holes
10:45:24:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:26:ST3_smx:INFO: ----> Checking Analog response
10:45:26:ST3_smx:INFO: ----> Checking broken channels
10:45:26:ST3_smx:INFO: Total # broken ch: 0
10:45:26:ST3_smx:INFO: List FAST: []
10:45:26:ST3_smx:INFO: List SLOW: []
10:45:26:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:45:26:febtest:INFO: 0-0 | XA-000-08-002-000-002-065-08 | 60.0 | 1082.3
10:45:26:febtest:INFO: 0-1 | XA-000-08-002-000-006-115-07 | 28.2 | 1189.2
10:45:27:febtest:INFO: 0-2 | XA-000-08-002-000-002-120-01 | 53.6 | 1106.2
10:45:27:febtest:INFO: 0-3 | XA-000-08-002-000-006-095-09 | 31.4 | 1183.3
10:45:27:febtest:INFO: 0-4 | XA-000-08-002-000-002-145-00 | 3.0 | 1282.9
10:45:27:febtest:INFO: 0-5 | XA-000-08-002-000-006-127-07 | 25.1 | 1224.5
10:45:28:febtest:INFO: 0-6 | XA-000-08-002-000-003-046-14 | 40.9 | 1147.8
10:45:28:febtest:INFO: 0-7 | XA-000-08-002-000-002-153-00 | 9.3 | 1271.2
10:45:28:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:45:32:ST3_smx:INFO: chip: 0-3 34.556970 C 1165.571835 mV
10:45:32:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:45:32:ST3_smx:INFO: Electrons
10:45:32:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:34:ST3_smx:INFO: ----> Checking Analog response
10:45:34:ST3_smx:INFO: ----> Checking broken channels
10:45:34:ST3_smx:INFO: Total # broken ch: 3
10:45:34:ST3_smx:INFO: List FAST: [87, 122, 123]
10:45:34:ST3_smx:INFO: List SLOW: []
10:45:34:ST3_smx:INFO: Holes
10:45:34:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:36:ST3_smx:INFO: ----> Checking Analog response
10:45:36:ST3_smx:INFO: ----> Checking broken channels
10:45:37:ST3_smx:INFO: Total # broken ch: 3
10:45:37:ST3_smx:INFO: List FAST: [87, 122, 123]
10:45:37:ST3_smx:INFO: List SLOW: []
10:45:37:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:45:37:febtest:INFO: 0-0 | XA-000-08-002-000-002-065-08 | 60.0 | 1082.3
10:45:37:febtest:INFO: 0-1 | XA-000-08-002-000-006-115-07 | 28.2 | 1183.3
10:45:37:febtest:INFO: 0-2 | XA-000-08-002-000-002-120-01 | 53.6 | 1106.2
10:45:38:febtest:INFO: 0-3 | XA-000-08-002-000-006-095-09 | 34.6 | 1159.7
10:45:38:febtest:INFO: 0-4 | XA-000-08-002-000-002-145-00 | 3.0 | 1282.9
10:45:38:febtest:INFO: 0-5 | XA-000-08-002-000-006-127-07 | 25.1 | 1218.6
10:45:38:febtest:INFO: 0-6 | XA-000-08-002-000-003-046-14 | 40.9 | 1147.8
10:45:39:febtest:INFO: 0-7 | XA-000-08-002-000-002-153-00 | 9.3 | 1271.2
10:45:39:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:45:42:ST3_smx:INFO: chip: 0-4 15.590880 C 1230.330540 mV
10:45:42:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:45:42:ST3_smx:INFO: Electrons
10:45:42:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:44:ST3_smx:INFO: ----> Checking Analog response
10:45:44:ST3_smx:INFO: ----> Checking broken channels
10:45:45:ST3_smx:INFO: Total # broken ch: 0
10:45:45:ST3_smx:INFO: List FAST: []
10:45:45:ST3_smx:INFO: List SLOW: []
10:45:45:ST3_smx:INFO: Holes
10:45:45:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:46:ST3_smx:INFO: ----> Checking Analog response
10:45:46:ST3_smx:INFO: ----> Checking broken channels
10:45:47:ST3_smx:INFO: Total # broken ch: 0
10:45:47:ST3_smx:INFO: List FAST: []
10:45:47:ST3_smx:INFO: List SLOW: []
10:45:47:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:45:47:febtest:INFO: 0-0 | XA-000-08-002-000-002-065-08 | 60.0 | 1082.3
10:45:47:febtest:INFO: 0-1 | XA-000-08-002-000-006-115-07 | 28.2 | 1189.2
10:45:47:febtest:INFO: 0-2 | XA-000-08-002-000-002-120-01 | 53.6 | 1106.2
10:45:48:febtest:INFO: 0-3 | XA-000-08-002-000-006-095-09 | 34.6 | 1159.7
10:45:48:febtest:INFO: 0-4 | XA-000-08-002-000-002-145-00 | 18.7 | 1224.5
10:45:48:febtest:INFO: 0-5 | XA-000-08-002-000-006-127-07 | 25.1 | 1218.6
10:45:48:febtest:INFO: 0-6 | XA-000-08-002-000-003-046-14 | 40.9 | 1147.8
10:45:49:febtest:INFO: 0-7 | XA-000-08-002-000-002-153-00 | 9.3 | 1271.2
10:45:49:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:45:52:ST3_smx:INFO: chip: 0-5 18.745682 C 1224.468235 mV
10:45:52:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:45:52:ST3_smx:INFO: Electrons
10:45:52:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:54:ST3_smx:INFO: ----> Checking Analog response
10:45:54:ST3_smx:INFO: ----> Checking broken channels
10:45:55:ST3_smx:INFO: Total # broken ch: 5
10:45:55:ST3_smx:INFO: List FAST: [75, 77, 98, 105, 123]
10:45:55:ST3_smx:INFO: List SLOW: []
10:45:55:ST3_smx:INFO: Holes
10:45:55:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:45:56:ST3_smx:INFO: ----> Checking Analog response
10:45:56:ST3_smx:INFO: ----> Checking broken channels
10:45:57:ST3_smx:INFO: Total # broken ch: 5
10:45:57:ST3_smx:INFO: List FAST: [75, 77, 98, 105, 123]
10:45:57:ST3_smx:INFO: List SLOW: []
10:45:57:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:45:57:febtest:INFO: 0-0 | XA-000-08-002-000-002-065-08 | 60.0 | 1082.3
10:45:57:febtest:INFO: 0-1 | XA-000-08-002-000-006-115-07 | 28.2 | 1189.2
10:45:58:febtest:INFO: 0-2 | XA-000-08-002-000-002-120-01 | 53.6 | 1106.2
10:45:58:febtest:INFO: 0-3 | XA-000-08-002-000-006-095-09 | 34.6 | 1159.7
10:45:58:febtest:INFO: 0-4 | XA-000-08-002-000-002-145-00 | 18.7 | 1224.5
10:45:58:febtest:INFO: 0-5 | XA-000-08-002-000-006-127-07 | 21.9 | 1224.5
10:45:59:febtest:INFO: 0-6 | XA-000-08-002-000-003-046-14 | 44.1 | 1147.8
10:45:59:febtest:INFO: 0-7 | XA-000-08-002-000-002-153-00 | 9.3 | 1265.4
10:45:59:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:46:03:ST3_smx:INFO: chip: 0-6 40.898880 C 1141.874115 mV
10:46:03:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:46:03:ST3_smx:INFO: Electrons
10:46:03:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:46:04:ST3_smx:INFO: ----> Checking Analog response
10:46:04:ST3_smx:INFO: ----> Checking broken channels
10:46:05:ST3_smx:INFO: Total # broken ch: 0
10:46:05:ST3_smx:INFO: List FAST: []
10:46:05:ST3_smx:INFO: List SLOW: []
10:46:05:ST3_smx:INFO: Holes
10:46:05:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:46:07:ST3_smx:INFO: ----> Checking Analog response
10:46:07:ST3_smx:INFO: ----> Checking broken channels
10:46:07:ST3_smx:INFO: Total # broken ch: 0
10:46:07:ST3_smx:INFO: List FAST: []
10:46:07:ST3_smx:INFO: List SLOW: []
10:46:07:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:46:07:febtest:INFO: 0-0 | XA-000-08-002-000-002-065-08 | 60.0 | 1082.3
10:46:07:febtest:INFO: 0-1 | XA-000-08-002-000-006-115-07 | 28.2 | 1189.2
10:46:07:febtest:INFO: 0-2 | XA-000-08-002-000-002-120-01 | 53.6 | 1106.2
10:46:08:febtest:INFO: 0-3 | XA-000-08-002-000-006-095-09 | 34.6 | 1159.7
10:46:08:febtest:INFO: 0-4 | XA-000-08-002-000-002-145-00 | 18.7 | 1224.5
10:46:08:febtest:INFO: 0-5 | XA-000-08-002-000-006-127-07 | 21.9 | 1218.6
10:46:08:febtest:INFO: 0-6 | XA-000-08-002-000-003-046-14 | 40.9 | 1135.9
10:46:09:febtest:INFO: 0-7 | XA-000-08-002-000-002-153-00 | 9.3 | 1265.4
10:46:09:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:46:12:ST3_smx:INFO: chip: 0-7 25.062742 C 1212.728715 mV
10:46:12:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
10:46:12:ST3_smx:INFO: Electrons
10:46:12:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:46:15:ST3_smx:INFO: ----> Checking Analog response
10:46:15:ST3_smx:INFO: ----> Checking broken channels
10:46:15:ST3_smx:INFO: Total # broken ch: 0
10:46:15:ST3_smx:INFO: List FAST: []
10:46:15:ST3_smx:INFO: List SLOW: []
10:46:15:ST3_smx:INFO: Holes
10:46:15:ST3_smx:INFO: Injected pulses: 125LSB, amp_cal 7.000000 fC
10:46:17:ST3_smx:INFO: ----> Checking Analog response
10:46:17:ST3_smx:INFO: ----> Checking broken channels
10:46:17:ST3_smx:INFO: Total # broken ch: 0
10:46:17:ST3_smx:INFO: List FAST: []
10:46:17:ST3_smx:INFO: List SLOW: []
10:46:17:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:46:17:febtest:INFO: 0-0 | XA-000-08-002-000-002-065-08 | 60.0 | 1082.3
10:46:17:febtest:INFO: 0-1 | XA-000-08-002-000-006-115-07 | 28.2 | 1189.2
10:46:18:febtest:INFO: 0-2 | XA-000-08-002-000-002-120-01 | 53.6 | 1106.2
10:46:18:febtest:INFO: 0-3 | XA-000-08-002-000-006-095-09 | 37.7 | 1159.7
10:46:18:febtest:INFO: 0-4 | XA-000-08-002-000-002-145-00 | 18.7 | 1224.5
10:46:18:febtest:INFO: 0-5 | XA-000-08-002-000-006-127-07 | 21.9 | 1218.6
10:46:19:febtest:INFO: 0-6 | XA-000-08-002-000-003-046-14 | 40.9 | 1135.9
10:46:19:febtest:INFO: 0-7 | XA-000-08-002-000-002-153-00 | 25.1 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'TEST_NAME': 'FEB-ASIC', 'TEST_DATE': '2023_11_10-10_44_42', 'OPERATOR': 'Alois Alzheimer', 'PROJECT': 'Production', 'SITE': 'GSI', 'SETUP': 'GSI_TEST_SETUP_1', 'ASIC_ID': 'XA-000-08-002-000-002-153-00', 'FUSED_ID': 6359364699116546448, 'HW_ADDR': 7, 'VERS_NO': '2.2', 'CABLE_SET_ID': '', 'IC_TEMP': '0', 'VDDM': '0', 'AUX': '0', 'CSABIAS': '0', 'VDDM_INT': '0', 'ADC_Chi2': 0.0, 'ADC_NDF': 0, 'ADC_P0': 0.0, 'ADC_P1': 0.006824, 'ADC_P2': -2.485e-06, 'ADC_P0err': 0.001, 'ADC_P1err': 0.001, 'ADC_P2err': 1e-05, 'ADC_VREF_P': 58, 'ADC_VREF_N': 30, 'ADC_VREF_T': 128, 'ADC_VREF_TR': 122, 'THR2_GLB': 30, 'LOOP__PLS': 100, 'CALIB_PLS': 250, 'SnsLoop': 5, 'IFED': 31, 'CSA_BIAS': 15, 'CSA_Chi2': 0.0, 'CSA_NDF': 0, 'CSA_P0': 0.0, 'CSA_P1': 0.0, 'CSA_P2': 0.0, 'CSA_P0err': 0.0, 'CSA_P1err': 0.0, 'CSA_P2err': 0.0, 'CONF_FAIL_REG': 0, 'N_BROKEN_DISC': 0, 'N_BROKEN_FAST': '[]', 'N_BROKEN_SLOW': '[]', 'P_BROKEN_DISC': 0, 'P_BROKEN_FAST': '[]', 'P_BROKEN_SLOW': '[]', 'ASIC_QA_category': '', 'N_BROKEN_CABLE': 0, 'LIST_OF_BROKEN_CABLES': 0, 'VI_bInit': ['2.447', '2.1330', '1.846', '2.5170', '7.000', '1.5570', '7.000', '1.5570'], 'VI_aInit': ['0', '0', '0', '0', '0', '0'], 'VI_atEnd': ['0', '0', '0', '0', '0', '0'], 'AMP_CAL': 125, 'PlsLoop': 3, 'N_ANA_PRESENT': 'Analog response OK', 'N_DISC_FAIL_CH': 0, 'N_ANA_FAIL_CH': '0', 'P_ANA_PRESENT': 'Analog response OK', 'P_DISC_FAIL_CH': 0, 'P_ANA_FAIL_CH': '0'}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 125, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 125, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 125, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 125, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 125, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 125, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 125, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 125, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
10:46:39:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_6013/TestDate_2023_11_10-10_44_42/