
FEB_6016 02.07.25 14:42:25
TextEdit.txt
14:42:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:42:25:ST3_Shared:INFO: FEB-Microcable 14:42:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:42:25:febtest:INFO: Testing FEB with SN 6016 ==============================================OOO============================================== 14:42:26:smx_tester:INFO: Scanning setup 14:42:26:elinks:INFO: Disabling clock on downlink 0 14:42:26:elinks:INFO: Disabling clock on downlink 1 14:42:26:elinks:INFO: Disabling clock on downlink 2 14:42:26:elinks:INFO: Disabling clock on downlink 3 14:42:26:elinks:INFO: Disabling clock on downlink 4 14:42:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:42:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:42:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:42:26:elinks:INFO: Disabling clock on downlink 0 14:42:26:elinks:INFO: Disabling clock on downlink 1 14:42:26:elinks:INFO: Disabling clock on downlink 2 14:42:26:elinks:INFO: Disabling clock on downlink 3 14:42:26:elinks:INFO: Disabling clock on downlink 4 14:42:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:42:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:42:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:42:27:elinks:INFO: Disabling clock on downlink 0 14:42:27:elinks:INFO: Disabling clock on downlink 1 14:42:27:elinks:INFO: Disabling clock on downlink 2 14:42:27:elinks:INFO: Disabling clock on downlink 3 14:42:27:elinks:INFO: Disabling clock on downlink 4 14:42:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:42:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 0 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 1 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 2 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 3 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 4 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 5 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 6 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 7 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 14 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 15 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 32 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 33 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 34 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 35 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 36 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 37 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 38 14:42:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 39 14:42:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:42:27:elinks:INFO: Disabling clock on downlink 0 14:42:27:elinks:INFO: Disabling clock on downlink 1 14:42:27:elinks:INFO: Disabling clock on downlink 2 14:42:27:elinks:INFO: Disabling clock on downlink 3 14:42:27:elinks:INFO: Disabling clock on downlink 4 14:42:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:42:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:42:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:42:27:elinks:INFO: Disabling clock on downlink 0 14:42:27:elinks:INFO: Disabling clock on downlink 1 14:42:27:elinks:INFO: Disabling clock on downlink 2 14:42:27:elinks:INFO: Disabling clock on downlink 3 14:42:27:elinks:INFO: Disabling clock on downlink 4 14:42:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:42:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:42:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 14:42:27:setup_element:INFO: Scanning clock phase 14:42:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:42:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:42:27:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:42:27:setup_element:INFO: Eye window for uplink 0 : XXXXX____________________________________________________________________XXXXXXX Clock Delay: 38 14:42:27:setup_element:INFO: Eye window for uplink 1 : XXXXXXX____________________________________________________________________XXXXX Clock Delay: 40 14:42:27:setup_element:INFO: Eye window for uplink 2 : XXXXX____________________________________________________________________XXXXXXX Clock Delay: 38 14:42:27:setup_element:INFO: Eye window for uplink 3 : XXXXXXX____________________________________________________________________XXXXX Clock Delay: 40 14:42:27:setup_element:INFO: Eye window for uplink 4 : XXXXX____________________________________________________________________XXXXXXX Clock Delay: 38 14:42:27:setup_element:INFO: Eye window for uplink 5 : XXXXXXX____________________________________________________________________XXXXX Clock Delay: 40 14:42:27:setup_element:INFO: Eye window for uplink 6 : XXXXX____________________________________________________________________XXXXXXX Clock Delay: 38 14:42:27:setup_element:INFO: Eye window for uplink 7 : XXXXXXX____________________________________________________________________XXXXX Clock Delay: 40 14:42:27:setup_element:INFO: Eye window for uplink 14: XXXXX____________________________________________________________________XXXXXXX Clock Delay: 38 14:42:27:setup_element:INFO: Eye window for uplink 15: XXXXXXX____________________________________________________________________XXXXX Clock Delay: 40 14:42:27:setup_element:INFO: Eye window for uplink 24: XXXXX_____________________________________________________________________XXXXXX Clock Delay: 39 14:42:27:setup_element:INFO: Eye window for uplink 25: XXXXXX____________________________________________________________________XXXXXX Clock Delay: 39 14:42:27:setup_element:INFO: Eye window for uplink 32: XXXXX_____________________________________________________________________XXXXXX Clock Delay: 39 14:42:27:setup_element:INFO: Eye window for uplink 33: XXXXXX____________________________________________________________________XXXXXX Clock Delay: 39 14:42:27:setup_element:INFO: Eye window for uplink 34: XXXXX_____________________________________________________________________XXXXXX Clock Delay: 39 14:42:27:setup_element:INFO: Eye window for uplink 35: XXXXXX____________________________________________________________________XXXXXX Clock Delay: 39 14:42:27:setup_element:INFO: Eye window for uplink 36: XXXXX_____________________________________________________________________XXXXXX Clock Delay: 39 14:42:27:setup_element:INFO: Eye window for uplink 37: XXXXXX____________________________________________________________________XXXXXX Clock Delay: 39 14:42:27:setup_element:INFO: Eye window for uplink 38: XXXXX_____________________________________________________________________XXXXXX Clock Delay: 39 14:42:27:setup_element:INFO: Eye window for uplink 39: XXXXXX____________________________________________________________________XXXXXX Clock Delay: 39 14:42:27:setup_element:INFO: Setting the clock phase to 39 for group 0, downlink 2 ==============================================OOO============================================== 14:42:28:setup_element:INFO: Scanning data phases 14:42:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:42:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:42:33:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:42:33:setup_element:INFO: Eye window for uplink 0 : _________________________________XXXXX__ Data delay found: 15 14:42:33:setup_element:INFO: Eye window for uplink 1 : ___XXXXXX_______________________________ Data delay found: 25 14:42:33:setup_element:INFO: Eye window for uplink 2 : __________________________________XXXXXX Data delay found: 16 14:42:33:setup_element:INFO: Eye window for uplink 3 : _____XXXX_______________________________ Data delay found: 26 14:42:33:setup_element:INFO: Eye window for uplink 4 : X___________________________________XXXX Data delay found: 18 14:42:33:setup_element:INFO: Eye window for uplink 5 : ______XXXX______________________________ Data delay found: 27 14:42:33:setup_element:INFO: Eye window for uplink 6 : _______________________________XXXXXX___ Data delay found: 13 14:42:33:setup_element:INFO: Eye window for uplink 7 : __XXXXXX________________________________ Data delay found: 24 14:42:33:setup_element:INFO: Eye window for uplink 14: ________________________________XXXX____ Data delay found: 13 14:42:33:setup_element:INFO: Eye window for uplink 15: ____XXXX________________________________ Data delay found: 25 14:42:33:setup_element:INFO: Eye window for uplink 24: XXXXX_________________________________XX Data delay found: 21 14:42:33:setup_element:INFO: Eye window for uplink 25: ___________________________________XXXXX Data delay found: 17 14:42:33:setup_element:INFO: Eye window for uplink 32: XXXXXX_________________________________X Data delay found: 22 14:42:33:setup_element:INFO: Eye window for uplink 33: XX_________________________________XXXXX Data delay found: 18 14:42:33:setup_element:INFO: Eye window for uplink 34: XXXXXX________________________________XX Data delay found: 21 14:42:33:setup_element:INFO: Eye window for uplink 35: XX_________________________________XXXXX Data delay found: 18 14:42:33:setup_element:INFO: Eye window for uplink 36: XXXXX_________________________________XX Data delay found: 21 14:42:33:setup_element:INFO: Eye window for uplink 37: XX__________________________________XXXX Data delay found: 18 14:42:33:setup_element:INFO: Eye window for uplink 38: XXX_________________________________XXXX Data delay found: 19 14:42:33:setup_element:INFO: Eye window for uplink 39: X_________________________________XXXXX_ Data delay found: 17 14:42:33:setup_element:INFO: Setting the data phase to 15 for uplink 0 14:42:33:setup_element:INFO: Setting the data phase to 25 for uplink 1 14:42:33:setup_element:INFO: Setting the data phase to 16 for uplink 2 14:42:33:setup_element:INFO: Setting the data phase to 26 for uplink 3 14:42:33:setup_element:INFO: Setting the data phase to 18 for uplink 4 14:42:33:setup_element:INFO: Setting the data phase to 27 for uplink 5 14:42:33:setup_element:INFO: Setting the data phase to 13 for uplink 6 14:42:33:setup_element:INFO: Setting the data phase to 24 for uplink 7 14:42:33:setup_element:INFO: Setting the data phase to 13 for uplink 14 14:42:33:setup_element:INFO: Setting the data phase to 25 for uplink 15 14:42:33:setup_element:INFO: Setting the data phase to 21 for uplink 24 14:42:33:setup_element:INFO: Setting the data phase to 17 for uplink 25 14:42:33:setup_element:INFO: Setting the data phase to 22 for uplink 32 14:42:33:setup_element:INFO: Setting the data phase to 18 for uplink 33 14:42:33:setup_element:INFO: Setting the data phase to 21 for uplink 34 14:42:33:setup_element:INFO: Setting the data phase to 18 for uplink 35 14:42:33:setup_element:INFO: Setting the data phase to 21 for uplink 36 14:42:33:setup_element:INFO: Setting the data phase to 18 for uplink 37 14:42:33:setup_element:INFO: Setting the data phase to 19 for uplink 38 14:42:33:setup_element:INFO: Setting the data phase to 17 for uplink 39 ==============================================OOO============================================== 14:42:33:setup_element:INFO: Beginning SMX ASICs map scan 14:42:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:42:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:42:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:42:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:42:33:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 14, 15, 24, 25, 32, 33, 34, 35, 36, 37, 38, 39] 14:42:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 15 14:42:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 1 14:42:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 2, uplink 3 14:42:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 3, uplink 5 14:42:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 4, uplink 7 14:42:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 24 14:42:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 38 14:42:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 2, uplink 36 14:42:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 3, uplink 34 14:42:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 4, uplink 32 14:42:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 14 14:42:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 0 14:42:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 2, uplink 2 14:42:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 3, uplink 4 14:42:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 4, uplink 6 14:42:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 25 14:42:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 39 14:42:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 2, uplink 37 14:42:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 3, uplink 35 14:42:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 4, uplink 33 14:42:36:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 14, 15, 24, 25, 32, 33, 34, 35, 36, 37, 38, 39] ASICs Map: ASIC address 0x1: (ASIC uplink, uplink): (0, 15), (1, 1), (2, 3), (3, 5), (4, 7) ASIC address 0x3: (ASIC uplink, uplink): (0, 24), (1, 38), (2, 36), (3, 34), (4, 32) ASIC address 0x5: (ASIC uplink, uplink): (0, 14), (1, 0), (2, 2), (3, 4), (4, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 25), (1, 39), (2, 37), (3, 35), (4, 33) Clock Phase Characteristic: Optimal Phase: 39 Window Length: 66 Eye Windows: Uplink 0: XXXXX____________________________________________________________________XXXXXXX Uplink 1: XXXXXXX____________________________________________________________________XXXXX Uplink 2: XXXXX____________________________________________________________________XXXXXXX Uplink 3: XXXXXXX____________________________________________________________________XXXXX Uplink 4: XXXXX____________________________________________________________________XXXXXXX Uplink 5: XXXXXXX____________________________________________________________________XXXXX Uplink 6: XXXXX____________________________________________________________________XXXXXXX Uplink 7: XXXXXXX____________________________________________________________________XXXXX Uplink 14: XXXXX____________________________________________________________________XXXXXXX Uplink 15: XXXXXXX____________________________________________________________________XXXXX Uplink 24: XXXXX_____________________________________________________________________XXXXXX Uplink 25: XXXXXX____________________________________________________________________XXXXXX Uplink 32: XXXXX_____________________________________________________________________XXXXXX Uplink 33: XXXXXX____________________________________________________________________XXXXXX Uplink 34: XXXXX_____________________________________________________________________XXXXXX Uplink 35: XXXXXX____________________________________________________________________XXXXXX Uplink 36: XXXXX_____________________________________________________________________XXXXXX Uplink 37: XXXXXX____________________________________________________________________XXXXXX Uplink 38: XXXXX_____________________________________________________________________XXXXXX Uplink 39: XXXXXX____________________________________________________________________XXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 1: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 2: Optimal Phase: 16 Window Length: 34 Eye Window: __________________________________XXXXXX Uplink 3: Optimal Phase: 26 Window Length: 36 Eye Window: _____XXXX_______________________________ Uplink 4: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 5: Optimal Phase: 27 Window Length: 36 Eye Window: ______XXXX______________________________ Uplink 6: Optimal Phase: 13 Window Length: 34 Eye Window: _______________________________XXXXXX___ Uplink 7: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 14: Optimal Phase: 13 Window Length: 36 Eye Window: ________________________________XXXX____ Uplink 15: Optimal Phase: 25 Window Length: 36 Eye Window: ____XXXX________________________________ Uplink 24: Optimal Phase: 21 Window Length: 33 Eye Window: XXXXX_________________________________XX Uplink 25: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 32: Optimal Phase: 22 Window Length: 33 Eye Window: XXXXXX_________________________________X Uplink 33: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 34: Optimal Phase: 21 Window Length: 32 Eye Window: XXXXXX________________________________XX Uplink 35: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 36: Optimal Phase: 21 Window Length: 33 Eye Window: XXXXX_________________________________XX Uplink 37: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 38: Optimal Phase: 19 Window Length: 33 Eye Window: XXX_________________________________XXXX Uplink 39: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXX_ ==============================================OOO============================================== 14:42:36:setup_element:INFO: Performing Elink synchronization 14:42:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:42:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:42:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:42:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 14:42:36:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:42:36:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 14, 15, 24, 25, 32, 33, 34, 35, 36, 37, 38, 39] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [15] | 5 | [(0, 15), (1, 1), (2, 3), (3, 5), (4, 7)] 3 | [0] | 2 | 0 | [24] | 5 | [(0, 24), (1, 38), (2, 36), (3, 34), (4, 32)] 5 | [0] | 2 | 0 | [14] | 5 | [(0, 14), (1, 0), (2, 2), (3, 4), (4, 6)] 7 | [0] | 2 | 0 | [25] | 5 | [(0, 25), (1, 39), (2, 37), (3, 35), (4, 33)] |_________________________________________________________________________| 14:42:36:ST3_emu_feb:DEBUG: Chip address: 0x1 14:42:36:ST3_emu_feb:DEBUG: Chip address: 0x3 14:42:36:ST3_emu_feb:DEBUG: Chip address: 0x5 14:42:36:ST3_emu_feb:DEBUG: Chip address: 0x7 14:42:36:febtest:INFO: Init all SMX (CSA): 30 14:42:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:42:44:febtest:INFO: 15-01 | XA-000-09-004-015-007-026-14 | 50.4 | 1100.2 14:42:44:febtest:INFO: 24-03 | XA-000-09-004-015-013-011-06 | 47.3 | 1118.1 14:42:44:febtest:INFO: 14-05 | XA-000-09-004-015-013-010-06 | 40.9 | 1135.9 14:42:44:febtest:INFO: 25-07 | XA-000-09-004-015-016-010-13 | 31.4 | 1183.3 14:42:45:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 0 FEB_B: 1 14:42:48:ST3_smx:INFO: chip: 15-1 50.430383 C 1112.140140 mV 14:42:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:42:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:42:48:ST3_smx:INFO: Electrons 14:42:52:ST3_smx:INFO: Total # of broken channels: 7 14:42:52:ST3_smx:INFO: List of broken channels: [14, 40, 41, 79, 112, 115, 118] 14:42:52:ST3_smx:INFO: Total # of broken channels: 0 14:42:52:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:42:54:ST3_smx:INFO: chip: 24-3 47.250730 C 1124.048640 mV 14:42:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:42:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:42:54:ST3_smx:INFO: Electrons 14:42:59:ST3_smx:INFO: Total # of broken channels: 10 14:42:59:ST3_smx:INFO: List of broken channels: [3, 4, 29, 36, 51, 64, 73, 79, 90, 114] 14:42:59:ST3_smx:INFO: Total # of broken channels: 0 14:42:59:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:43:00:ST3_smx:INFO: chip: 14-5 40.898880 C 1141.874115 mV 14:43:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:43:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:43:00:ST3_smx:INFO: Electrons 14:43:05:ST3_smx:INFO: Total # of broken channels: 7 14:43:05:ST3_smx:INFO: List of broken channels: [16, 40, 53, 58, 69, 102, 103] 14:43:05:ST3_smx:INFO: Total # of broken channels: 0 14:43:05:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:43:07:ST3_smx:INFO: chip: 25-7 31.389742 C 1189.190035 mV 14:43:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:43:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:43:07:ST3_smx:INFO: Electrons 14:43:11:ST3_smx:INFO: Total # of broken channels: 12 14:43:11:ST3_smx:INFO: List of broken channels: [1, 17, 18, 26, 50, 67, 70, 71, 100, 106, 114, 121] 14:43:11:ST3_smx:INFO: Total # of broken channels: 0 14:43:11:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:43:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:43:12:febtest:INFO: 15-01 | XA-000-09-004-015-007-026-14 | 50.4 | 1135.9 14:43:12:febtest:INFO: 24-03 | XA-000-09-004-015-013-011-06 | 47.3 | 1147.8 14:43:13:febtest:INFO: 14-05 | XA-000-09-004-015-013-010-06 | 44.1 | 1165.6 14:43:13:febtest:INFO: 25-07 | XA-000-09-004-015-016-010-13 | 31.4 | 1224.5 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_07_02-14_42_25 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 6016| FEB_TYPE : 8.5| FEB_UPLINKS : 5| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0520', '1.848', '1.0510'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0260', '1.850', '1.2690'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9997', '1.850', '0.2722']