XA-000-08-001-064-052-040-02    31.08.23 07:43:56

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            07:43:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:43:56:ST3_Shared:INFO:	-------------------------Microcable-------------------------
07:43:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:43:58:smx_tester:INFO:	Scanning setup
07:43:58:elinks:INFO:	Disabling clock on downlink 0
07:43:58:elinks:INFO:	Disabling clock on downlink 1
07:43:58:elinks:INFO:	Disabling clock on downlink 2
07:43:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:43:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:43:58:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
07:43:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:43:58:elinks:INFO:	Disabling clock on downlink 0
07:43:58:elinks:INFO:	Disabling clock on downlink 1
07:43:58:elinks:INFO:	Disabling clock on downlink 2
07:43:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:43:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:43:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:43:58:elinks:INFO:	Disabling clock on downlink 0
07:43:58:elinks:INFO:	Disabling clock on downlink 1
07:43:58:elinks:INFO:	Disabling clock on downlink 2
07:43:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:43:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:43:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:43:58:setup_element:INFO:	Scanning clock phase
07:43:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:43:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:43:58:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
07:43:58:setup_element:INFO:	Eye window for uplink 0 : __________________________________________________XXXXXX________________________
Clock Delay: 12
07:43:58:setup_element:INFO:	Setting the clock phase to 12 for group 0, downlink 0
07:43:58:setup_element:INFO:	Scanning data phases
07:43:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:43:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:44:03:setup_element:INFO:	Data phase scan results for group 0, downlink 0
07:44:03:setup_element:INFO:	Eye window for uplink 0 : _XXXX___________________________________
Data delay found: 22
07:44:03:setup_element:INFO:	Setting the data phase to 22 for uplink 0
07:44:03:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 12
    Window Length: 74
    Eye Windows:
      Uplink  0: __________________________________________________XXXXXX________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________
]
07:44:03:setup_element:INFO:	Beginning SMX ASICs map scan
07:44:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:44:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:44:03:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
07:44:03:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
07:44:03:uplink:INFO:	Setting uplinks mask [0]
07:44:05:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
07:44:06:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 12
    Window Length: 74
    Eye Windows:
      Uplink  0: __________________________________________________XXXXXX________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________

07:44:06:setup_element:INFO:	Performing Elink synchronization
07:44:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:44:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:44:06:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
07:44:06:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
07:44:06:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
07:44:06:uplink:INFO:	Enabling uplinks [0]
07:44:06:ST3_emu:INFO:	Number of chips: 1
07:44:06:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
07:44:07:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
07:44:11:asictest:WARNING:	Fused ID is not zero 6359364698915422850
07:44:11:asictest:INFO:	 Starting ADC calibration/scan 
07:44:17:asictest:INFO:	0,	0,	0.000000
07:44:23:asictest:INFO:	1,	38,	0.300000
07:44:28:asictest:INFO:	2,	76,	0.600000
07:44:34:asictest:INFO:	3,	120,	0.900000
07:44:40:asictest:INFO:	4,	166,	1.200000
07:44:46:asictest:INFO:	5,	182,	1.300000
07:44:51:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
07:44:52:asictest:INFO:	 18.96 1200.64  775.40    0.00
07:44:53:ST3_smx:INFO:	chip: 0-7 	 18.962313 C 	 1200.639485 mV
07:44:53:ST3_smx:INFO:	# loops 0
07:44:55:ST3_smx:INFO:	# loops 1
07:44:56:ST3_smx:INFO:	# loops 2
07:44:58:ST3_smx:INFO:	# loops 3
07:45:00:ST3_smx:INFO:	# loops 4
07:45:01:ST3_smx:INFO:	Total # of broken channels: 0
07:45:01:ST3_smx:INFO:	List of broken channels: []
07:45:01:ST3_smx:INFO:	Total # of broken channels: 0
07:45:01:ST3_smx:INFO:	List of broken channels: []
07:45:02:asictest:INFO:	 Starting CSA scan -
07:45:03:asictest:INFO:	0,	0.067600
07:45:04:asictest:INFO:	9,	0.151500
07:45:04:asictest:INFO:	18,	0.227300
07:45:05:asictest:INFO:	27,	0.300800
07:45:06:asictest:INFO:	36,	0.369000
07:45:06:asictest:INFO:	45,	0.431300
07:45:07:asictest:INFO:	54,	0.484100
07:45:08:asictest:INFO:	63,	0.519200
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_31-07_43_56
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0093L012-M000 | side-P | index: (8/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-001-064-052-040-02 | FUSED_ID : 6359364698915422850
  IC_TEMP :    8.23 | VDDM : 1105.21 | AUX_INT :    0.00 | CsaBias :   97.45
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 6.48325e-07 / 0
  ADC_P0  : 0.00000e+00 ± 1.00000e+00
  ADC_P1  : 8.19026e-03 ± 2.66460e-02
  ADC_P2  : -5.76804e-06 ± 1.60713e-04
  CSA_Chi2/NDF : 8.63219e-05 / 0
  CSA_P0  : 6.52667e-02 ± 3.49699e-03
  CSA_P1  : 9.97354e-03 ± 2.59308e-04
  CSA_P2  : -4.27396e-05 ± 3.95764e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.1449', '1.800', '0.0702', '1.800', '0.1460', '7.000', '0.6897']
VI_after__Init : ['1.200', '0.1459', '1.800', '0.0701', '1.800', '0.1457', '7.000', '0.6905']
VI_at__the_End : ['1.200', '0.5175', '1.800', '0.0752', '1.800', '0.1733', '7.000', '0.6905']
07:45:16:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-001-064-052-040-02//TestDate_2023_08_31-07_43_56/