XA-000-08-001-064-060-000-00    31.08.23 07:30:13

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            07:30:13:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:30:13:ST3_Shared:INFO:	-------------------------Microcable-------------------------
07:30:13:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:30:15:smx_tester:INFO:	Scanning setup
07:30:15:elinks:INFO:	Disabling clock on downlink 0
07:30:15:elinks:INFO:	Disabling clock on downlink 1
07:30:15:elinks:INFO:	Disabling clock on downlink 2
07:30:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:30:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:30:15:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
07:30:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:30:15:elinks:INFO:	Disabling clock on downlink 0
07:30:15:elinks:INFO:	Disabling clock on downlink 1
07:30:15:elinks:INFO:	Disabling clock on downlink 2
07:30:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:30:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:30:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:30:15:elinks:INFO:	Disabling clock on downlink 0
07:30:15:elinks:INFO:	Disabling clock on downlink 1
07:30:15:elinks:INFO:	Disabling clock on downlink 2
07:30:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:30:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:30:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:30:15:setup_element:INFO:	Scanning clock phase
07:30:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:30:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:30:15:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
07:30:15:setup_element:INFO:	Eye window for uplink 0 : ___________________________________________________XXXXXXX______________________
Clock Delay: 14
07:30:15:setup_element:INFO:	Setting the clock phase to 14 for group 0, downlink 0
07:30:15:setup_element:INFO:	Scanning data phases
07:30:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:30:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:30:20:setup_element:INFO:	Data phase scan results for group 0, downlink 0
07:30:21:setup_element:INFO:	Eye window for uplink 0 : ___XXX__________________________________
Data delay found: 24
07:30:21:setup_element:INFO:	Setting the data phase to 24 for uplink 0
07:30:21:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 14
    Window Length: 73
    Eye Windows:
      Uplink  0: ___________________________________________________XXXXXXX______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 24
      Window Length: 37
      Eye Window: ___XXX__________________________________
]
07:30:21:setup_element:INFO:	Beginning SMX ASICs map scan
07:30:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:30:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:30:21:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
07:30:21:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
07:30:21:uplink:INFO:	Setting uplinks mask [0]
07:30:22:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
07:30:23:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 14
    Window Length: 73
    Eye Windows:
      Uplink  0: ___________________________________________________XXXXXXX______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 24
      Window Length: 37
      Eye Window: ___XXX__________________________________

07:30:23:setup_element:INFO:	Performing Elink synchronization
07:30:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:30:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:30:23:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
07:30:23:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
07:30:23:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
07:30:23:uplink:INFO:	Enabling uplinks [0]
07:30:23:ST3_emu:INFO:	Number of chips: 1
07:30:23:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
07:30:24:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
07:30:28:asictest:WARNING:	Fused ID is not zero 6359364698915454976
07:30:28:asictest:INFO:	 Starting ADC calibration/scan 
07:30:34:asictest:INFO:	0,	0,	0.000000
07:30:40:asictest:INFO:	1,	39,	0.300000
07:30:45:asictest:INFO:	2,	78,	0.600000
07:30:51:asictest:INFO:	3,	122,	0.900000
07:30:57:asictest:INFO:	4,	169,	1.200000
07:31:03:asictest:INFO:	5,	185,	1.300000
07:31:08:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
07:31:09:asictest:INFO:	 17.21 1201.63  804.65    0.00
07:31:10:ST3_smx:INFO:	chip: 0-7 	 17.214122 C 	 1201.631217 mV
07:31:10:ST3_smx:INFO:	# loops 0
07:31:12:ST3_smx:INFO:	# loops 1
07:31:13:ST3_smx:INFO:	# loops 2
07:31:15:ST3_smx:INFO:	# loops 3
07:31:17:ST3_smx:INFO:	# loops 4
07:31:18:ST3_smx:INFO:	Total # of broken channels: 0
07:31:18:ST3_smx:INFO:	List of broken channels: []
07:31:18:ST3_smx:INFO:	Total # of broken channels: 0
07:31:18:ST3_smx:INFO:	List of broken channels: []
07:31:19:asictest:INFO:	 Starting CSA scan -
07:31:20:asictest:INFO:	0,	0.067200
07:31:21:asictest:INFO:	9,	0.154500
07:31:22:asictest:INFO:	18,	0.233500
07:31:22:asictest:INFO:	27,	0.309400
07:31:23:asictest:INFO:	36,	0.382300
07:31:24:asictest:INFO:	45,	0.448700
07:31:25:asictest:INFO:	54,	0.506900
07:31:26:asictest:INFO:	63,	0.547600
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_31-07_30_13
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0093L012-M000 | side-P | index: (6/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-001-064-060-000-00 | FUSED_ID : 6359364698915454976
  IC_TEMP :   10.18 | VDDM : 1107.86 | AUX_INT :    0.00 | CsaBias :  119.54
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 4.22606e-06 / 0
  ADC_P0  : 0.00000e+00 ± 1.00000e+00
  ADC_P1  : 8.05269e-03 ± 2.62260e-02
  ADC_P2  : -5.57663e-06 ± 1.55524e-04
  CSA_Chi2/NDF : 8.09243e-05 / 0
  CSA_P0  : 6.52875e-02 ± 3.38589e-03
  CSA_P1  : 1.02297e-02 ± 2.51070e-04
  CSA_P2  : -3.96899e-05 ± 3.83191e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2319', '1.800', '0.0830', '1.800', '0.1339', '7.000', '0.6880']
VI_after__Init : ['1.200', '0.2334', '1.800', '0.0831', '1.800', '0.1362', '7.000', '0.6889']
VI_at__the_End : ['1.200', '0.5459', '1.800', '0.0736', '1.800', '0.1577', '7.000', '0.6890']
07:31:30:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-001-064-060-000-00//TestDate_2023_08_31-07_30_13/