XA-000-08-002-000-002-026-10 06.02.24 12:57:51
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
12:57:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:57:51:ST3_Shared:INFO: -------------------------Microcable-------------------------
12:57:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:57:53:smx_tester:INFO: Scanning setup
12:57:53:elinks:INFO: Disabling clock on downlink 0
12:57:53:elinks:INFO: Disabling clock on downlink 1
12:57:53:elinks:INFO: Disabling clock on downlink 2
12:57:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:57:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:57:53:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
12:57:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:57:53:elinks:INFO: Disabling clock on downlink 0
12:57:53:elinks:INFO: Disabling clock on downlink 1
12:57:53:elinks:INFO: Disabling clock on downlink 2
12:57:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:57:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:57:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:57:53:elinks:INFO: Disabling clock on downlink 0
12:57:53:elinks:INFO: Disabling clock on downlink 1
12:57:53:elinks:INFO: Disabling clock on downlink 2
12:57:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:57:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:57:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:57:53:setup_element:INFO: Scanning clock phase
12:57:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:57:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:57:53:setup_element:INFO: Clock phase scan results for group 0, downlink 0
12:57:53:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXXXX_____________________
Clock Delay: 15
12:57:53:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0
12:57:53:setup_element:INFO: Scanning data phases
12:57:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:57:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:57:58:setup_element:INFO: Data phase scan results for group 0, downlink 0
12:57:58:setup_element:INFO: Eye window for uplink 0 : ___XXXXX________________________________
Data delay found: 25
12:57:58:setup_element:INFO: Setting the data phase to 25 for uplink 0
12:57:58:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 73
Eye Windows:
Uplink 0: ____________________________________________________XXXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
]
12:57:58:setup_element:INFO: Beginning SMX ASICs map scan
12:57:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:57:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:57:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
12:57:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
12:57:58:uplink:INFO: Setting uplinks mask [0]
12:57:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
12:58:01:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 73
Eye Windows:
Uplink 0: ____________________________________________________XXXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
12:58:01:setup_element:INFO: Performing Elink synchronization
12:58:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:58:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:58:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
12:58:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
12:58:01:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
12:58:01:uplink:INFO: Enabling uplinks [0]
12:58:01:ST3_emu:INFO: Number of chips: 1
addr | upli | dwnli | grp | uplinks | uplinks_map
7 | [0] | 0 | 0 | [0] | [(0, 0)]
12:58:02:ST3_smx:INFO: Configuring SMX
============== Starting SMX ID burn ==============
12:58:06:asictest:WARNING: Fused ID is not zero 6359364699116544426
============== Starting ADC calibration ==============
12:58:12:asictest:INFO: 0, 0, 0.000000
12:58:18:asictest:INFO: 1, 42, 0.300000
12:58:23:asictest:INFO: 2, 88, 0.600000
12:58:29:asictest:INFO: 3, 139, 0.900000
12:58:35:asictest:INFO: 4, 189, 1.200000
12:58:41:asictest:INFO: 5, 207, 1.300000
12:58:47:ST3_smx:INFO: chip: 0-7 28.908467 C 1198.767983 mV
12:58:47:ST3_smx:INFO: Electrons
12:58:47:ST3_smx:INFO: # loops 0
12:58:49:ST3_smx:INFO: # loops 1
12:58:50:ST3_smx:INFO: # loops 2
12:58:52:ST3_smx:INFO: # loops 3
12:58:54:ST3_smx:INFO: # loops 4
12:58:55:ST3_smx:INFO: Total # of broken channels: 0
12:58:55:ST3_smx:INFO: List of broken channels: []
12:58:55:ST3_smx:INFO: Total # of broken channels: 0
12:58:55:ST3_smx:INFO: List of broken channels: []
12:58:56:asictest:INFO: Starting CSA scan -
0 0.0286
12:58:57:asictest:INFO: 0, 0.028600
9 0.1111
12:58:58:asictest:INFO: 9, 0.111100
18 0.1861
12:58:58:asictest:INFO: 18, 0.186100
27 0.2562
12:58:59:asictest:INFO: 27, 0.256200
36 0.324
12:58:59:asictest:INFO: 36, 0.324000
45 0.3926
12:59:00:asictest:INFO: 45, 0.392600
54 0.451
12:59:01:asictest:INFO: 54, 0.451000
63 0.4943
12:59:01:asictest:INFO: 63, 0.494300
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2024_02_06-12_57_51
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0197L014-M000 | side-N | index: (2/8) | Spare
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-002-026-10 | FUSED_ID : 6359364699116544426
IC_TEMP : 35.23 | VDDM : 1050.30 | AUX_INT : 0.00 | CsaBias : 126.11
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 1.31924e-04 / 1
ADC_P0 : 0.00000e+00 ± 1.14858e-02
ADC_P1 : 7.07596e-03 ± 1.83043e-04
ADC_P2 : -3.87976e-06 ± 9.99152e-07
CSA_Chi2/NDF : 7.45201e-05 / 1
CSA_P0 : 2.79292e-02 ± 3.24916e-03
CSA_P1 : 9.38909e-03 ± 2.40931e-04
CSA_P2 : -3.04747e-05 ± 3.67715e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.198', '0.2054', '1.800', '0.0781', '1.801', '0.1162', '6.999', '0.6801']
VI_after__Init : ['1.200', '0.2065', '1.800', '0.0780', '1.800', '0.1559', '7.000', '0.6814']
VI_at__the_End : ['1.200', '0.4962', '1.800', '0.0735', '1.800', '0.1674', '7.000', '0.6826']
12:59:06:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-002-026-10//TestDate_2024_02_06-12_57_51/
12:59:09:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-002-026-10//TestDate_2024_02_06-12_57_51/