XA-000-08-002-000-003-091-02 06.11.23 12:52:31
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
12:52:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:52:31:ST3_Shared:INFO: -------------------------Microcable-------------------------
12:52:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:52:33:smx_tester:INFO: Scanning setup
12:52:33:elinks:INFO: Disabling clock on downlink 0
12:52:33:elinks:INFO: Disabling clock on downlink 1
12:52:33:elinks:INFO: Disabling clock on downlink 2
12:52:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:52:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:52:33:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
12:52:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:52:33:elinks:INFO: Disabling clock on downlink 0
12:52:33:elinks:INFO: Disabling clock on downlink 1
12:52:33:elinks:INFO: Disabling clock on downlink 2
12:52:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:52:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:52:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:52:33:elinks:INFO: Disabling clock on downlink 0
12:52:33:elinks:INFO: Disabling clock on downlink 1
12:52:33:elinks:INFO: Disabling clock on downlink 2
12:52:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:52:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:52:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:52:33:setup_element:INFO: Scanning clock phase
12:52:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:52:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:52:33:setup_element:INFO: Clock phase scan results for group 0, downlink 0
12:52:33:setup_element:INFO: Eye window for uplink 0 : ___________________________________________________XXXXXX_______________________
Clock Delay: 13
12:52:33:setup_element:INFO: Setting the clock phase to 13 for group 0, downlink 0
12:52:33:setup_element:INFO: Scanning data phases
12:52:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:52:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:52:38:setup_element:INFO: Data phase scan results for group 0, downlink 0
12:52:38:setup_element:INFO: Eye window for uplink 0 : ______XXXX______________________________
Data delay found: 27
12:52:38:setup_element:INFO: Setting the data phase to 27 for uplink 0
12:52:38:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 13
Window Length: 74
Eye Windows:
Uplink 0: ___________________________________________________XXXXXX_______________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
]
12:52:38:setup_element:INFO: Beginning SMX ASICs map scan
12:52:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:52:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:52:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
12:52:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
12:52:38:uplink:INFO: Setting uplinks mask [0]
12:52:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
12:52:41:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 13
Window Length: 74
Eye Windows:
Uplink 0: ___________________________________________________XXXXXX_______________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
12:52:41:setup_element:INFO: Performing Elink synchronization
12:52:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:52:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:52:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
12:52:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
12:52:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
12:52:41:uplink:INFO: Enabling uplinks [0]
12:52:41:ST3_emu:INFO: Number of chips: 1
12:52:41:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
12:52:42:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
12:52:45:asictest:WARNING: Fused ID is not zero 6359364699116549554
12:52:46:asictest:INFO: Starting ADC calibration/scan
12:52:52:asictest:INFO: 0, 0, 0.000000
12:52:57:asictest:INFO: 1, 41, 0.300000
12:53:03:asictest:INFO: 2, 80, 0.600000
12:53:09:asictest:INFO: 3, 126, 0.900000
12:53:15:asictest:INFO: 4, 175, 1.200000
12:53:21:asictest:INFO: 5, 192, 1.300000
12:53:26:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
12:53:27:asictest:INFO: 0.55 1201.48 838.86 0.00
12:53:28:ST3_smx:INFO: chip: 0-7 0.553443 C 1201.480162 mV
12:53:28:ST3_smx:INFO: # loops 0
12:53:30:ST3_smx:INFO: # loops 1
12:53:31:ST3_smx:INFO: # loops 2
12:53:33:ST3_smx:INFO: # loops 3
12:53:34:ST3_smx:INFO: # loops 4
12:53:36:ST3_smx:INFO: Total # of broken channels: 0
12:53:36:ST3_smx:INFO: List of broken channels: []
12:53:36:ST3_smx:INFO: Total # of broken channels: 0
12:53:36:ST3_smx:INFO: List of broken channels: []
12:53:37:asictest:INFO: Starting CSA scan -
12:53:38:asictest:INFO: 0, 0.063300
12:53:39:asictest:INFO: 9, 0.142100
12:53:39:asictest:INFO: 18, 0.214500
12:53:40:asictest:INFO: 27, 0.286800
12:53:41:asictest:INFO: 36, 0.353500
12:53:41:asictest:INFO: 45, 0.414800
12:53:42:asictest:INFO: 54, 0.459100
12:53:43:asictest:INFO: 63, 0.482400
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_11_06-12_52_31
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0320L020-M003 | side-P | index: (2/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-003-091-02 | FUSED_ID : 6359364699116549554
IC_TEMP : -9.54 | VDDM : 1071.32 | AUX_INT : 0.00 | CsaBias : 86.71
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 3.07342e-05 / 1
ADC_P0 : 0.00000e+00 ± 5.54384e-03
ADC_P1 : 7.95108e-03 ± 9.41142e-05
ADC_P2 : -6.20273e-06 ± 5.54079e-07
CSA_Chi2/NDF : 2.69734e-04 / 1
CSA_P0 : 5.81208e-02 ± 6.18162e-03
CSA_P1 : 9.95417e-03 ± 4.58378e-04
CSA_P2 : -4.91108e-05 ± 6.99590e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.198', '0.4493', '1.800', '0.1133', '1.800', '0.1672', '7.000', '0.6905']
VI_after__Init : ['1.200', '0.4381', '1.800', '0.1092', '1.800', '0.1651', '7.000', '0.6904']
VI_at__the_End : ['1.200', '0.4826', '1.800', '0.0696', '1.800', '0.1585', '7.000', '0.6904']
12:54:03:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-003-091-02//TestDate_2023_11_06-12_52_31/