XA-000-08-002-000-003-101-11 06.11.23 12:49:49
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
12:49:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:49:49:ST3_Shared:INFO: -------------------------Microcable-------------------------
12:49:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:49:51:smx_tester:INFO: Scanning setup
12:49:51:elinks:INFO: Disabling clock on downlink 0
12:49:51:elinks:INFO: Disabling clock on downlink 1
12:49:51:elinks:INFO: Disabling clock on downlink 2
12:49:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:49:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:49:51:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
12:49:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:49:51:elinks:INFO: Disabling clock on downlink 0
12:49:51:elinks:INFO: Disabling clock on downlink 1
12:49:51:elinks:INFO: Disabling clock on downlink 2
12:49:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:49:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:49:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:49:51:elinks:INFO: Disabling clock on downlink 0
12:49:51:elinks:INFO: Disabling clock on downlink 1
12:49:51:elinks:INFO: Disabling clock on downlink 2
12:49:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:49:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:49:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:49:51:setup_element:INFO: Scanning clock phase
12:49:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:49:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:49:51:setup_element:INFO: Clock phase scan results for group 0, downlink 0
12:49:51:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________XXXXXXX___________________
Clock Delay: 17
12:49:51:setup_element:INFO: Setting the clock phase to 17 for group 0, downlink 0
12:49:51:setup_element:INFO: Scanning data phases
12:49:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:49:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:49:56:setup_element:INFO: Data phase scan results for group 0, downlink 0
12:49:56:setup_element:INFO: Eye window for uplink 0 : ______XXXXX_____________________________
Data delay found: 28
12:49:56:setup_element:INFO: Setting the data phase to 28 for uplink 0
12:49:56:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 17
Window Length: 73
Eye Windows:
Uplink 0: ______________________________________________________XXXXXXX___________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
]
12:49:56:setup_element:INFO: Beginning SMX ASICs map scan
12:49:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:49:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:49:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
12:49:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
12:49:56:uplink:INFO: Setting uplinks mask [0]
12:49:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
12:49:59:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 17
Window Length: 73
Eye Windows:
Uplink 0: ______________________________________________________XXXXXXX___________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
12:49:59:setup_element:INFO: Performing Elink synchronization
12:49:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:49:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:49:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
12:49:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
12:49:59:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
12:49:59:uplink:INFO: Enabling uplinks [0]
12:49:59:ST3_emu:INFO: Number of chips: 1
12:49:59:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
12:50:00:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
12:50:04:asictest:WARNING: Fused ID is not zero 6359364699116549723
12:50:04:asictest:INFO: Starting ADC calibration/scan
12:50:10:asictest:INFO: 0, 0, 0.000000
12:50:16:asictest:INFO: 1, 42, 0.300000
12:50:21:asictest:INFO: 2, 84, 0.600000
12:50:27:asictest:INFO: 3, 132, 0.900000
12:50:33:asictest:INFO: 4, 185, 1.200000
12:50:39:asictest:INFO: 5, 203, 1.300000
12:50:44:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
12:50:45:asictest:INFO: -0.49 1202.85 821.78 0.00
12:50:46:ST3_smx:INFO: chip: 0-7 -0.494771 C 1202.846005 mV
12:50:46:ST3_smx:INFO: # loops 0
12:50:48:ST3_smx:INFO: # loops 1
12:50:49:ST3_smx:INFO: # loops 2
12:50:51:ST3_smx:INFO: # loops 3
12:50:53:ST3_smx:INFO: # loops 4
12:50:54:ST3_smx:INFO: Total # of broken channels: 0
12:50:54:ST3_smx:INFO: List of broken channels: []
12:50:54:ST3_smx:INFO: Total # of broken channels: 0
12:50:54:ST3_smx:INFO: List of broken channels: []
12:50:55:asictest:INFO: Starting CSA scan -
12:50:56:asictest:INFO: 0, 0.064900
12:50:57:asictest:INFO: 9, 0.149900
12:50:57:asictest:INFO: 18, 0.226000
12:50:58:asictest:INFO: 27, 0.301000
12:50:59:asictest:INFO: 36, 0.369300
12:51:00:asictest:INFO: 45, 0.432500
12:51:00:asictest:INFO: 54, 0.482500
12:51:01:asictest:INFO: 63, 0.510900
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_11_06-12_49_49
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0320L020-M003 | side-P | index: (1/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-003-101-11 | FUSED_ID : 6359364699116549723
IC_TEMP : -6.87 | VDDM : 1081.75 | AUX_INT : 0.00 | CsaBias : 98.21
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 1.90820e-05 / 1
ADC_P0 : 0.00000e+00 ± 4.36829e-03
ADC_P1 : 7.63378e-03 ± 6.98194e-05
ADC_P2 : -6.11845e-06 ± 3.88745e-07
CSA_Chi2/NDF : 1.69339e-04 / 1
CSA_P0 : 6.14250e-02 ± 4.89792e-03
CSA_P1 : 1.03132e-02 ± 3.63190e-04
CSA_P2 : -4.87948e-05 ± 5.54311e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2440', '1.800', '0.1005', '1.801', '0.1689', '7.000', '0.6893']
VI_after__Init : ['1.200', '0.2441', '1.800', '0.0990', '1.800', '0.1695', '7.000', '0.6904']
VI_at__the_End : ['1.200', '0.5129', '1.800', '0.0722', '1.800', '0.1916', '7.000', '0.6903']
12:51:23:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-003-101-11//TestDate_2023_11_06-12_49_49/