XA-000-08-002-000-003-193-15 23.08.23 11:13:27
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
11:13:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:13:27:ST3_Shared:INFO: -------------------------Microcable-------------------------
11:13:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:13:29:smx_tester:INFO: Scanning setup
11:13:29:elinks:INFO: Disabling clock on downlink 0
11:13:29:elinks:INFO: Disabling clock on downlink 1
11:13:29:elinks:INFO: Disabling clock on downlink 2
11:13:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:13:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:13:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
11:13:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:13:29:elinks:INFO: Disabling clock on downlink 0
11:13:29:elinks:INFO: Disabling clock on downlink 1
11:13:29:elinks:INFO: Disabling clock on downlink 2
11:13:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:13:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:13:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:13:29:elinks:INFO: Disabling clock on downlink 0
11:13:29:elinks:INFO: Disabling clock on downlink 1
11:13:29:elinks:INFO: Disabling clock on downlink 2
11:13:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:13:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:13:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:13:29:setup_element:INFO: Scanning clock phase
11:13:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:13:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:13:29:setup_element:INFO: Clock phase scan results for group 0, downlink 0
11:13:29:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXXXX_____________________
Clock Delay: 15
11:13:29:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0
11:13:29:setup_element:INFO: Scanning data phases
11:13:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:13:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:13:34:setup_element:INFO: Data phase scan results for group 0, downlink 0
11:13:34:setup_element:INFO: Eye window for uplink 0 : ____XXX_________________________________
Data delay found: 25
11:13:34:setup_element:INFO: Setting the data phase to 25 for uplink 0
11:13:34:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 73
Eye Windows:
Uplink 0: ____________________________________________________XXXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 37
Eye Window: ____XXX_________________________________
]
11:13:34:setup_element:INFO: Beginning SMX ASICs map scan
11:13:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:13:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:13:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
11:13:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
11:13:35:uplink:INFO: Setting uplinks mask [0]
11:13:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
11:13:37:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 73
Eye Windows:
Uplink 0: ____________________________________________________XXXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 37
Eye Window: ____XXX_________________________________
11:13:37:setup_element:INFO: Performing Elink synchronization
11:13:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:13:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:13:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
11:13:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
11:13:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
11:13:37:uplink:INFO: Enabling uplinks [0]
11:13:37:ST3_emu:INFO: Number of chips: 1
11:13:37:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
11:13:38:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
11:13:42:asictest:WARNING: Fused ID is not zero 6359364699116551199
11:13:42:asictest:INFO: Starting ADC calibration/scan
11:13:48:asictest:INFO: 0, 0, 0.000000
11:13:54:asictest:INFO: 1, 40, 0.300000
11:13:59:asictest:INFO: 2, 80, 0.600000
11:14:05:asictest:INFO: 3, 127, 0.900000
11:14:11:asictest:INFO: 4, 174, 1.200000
11:14:17:asictest:INFO: 5, 191, 1.300000
11:14:22:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
11:14:23:asictest:INFO: 15.76 1199.13 823.38 0.00
11:14:24:ST3_smx:INFO: chip: 0-7 15.760181 C 1199.131308 mV
11:14:24:ST3_smx:INFO: # loops 0
11:14:26:ST3_smx:INFO: # loops 1
11:14:27:ST3_smx:INFO: # loops 2
11:14:29:ST3_smx:INFO: # loops 3
11:14:31:ST3_smx:INFO: # loops 4
11:14:32:ST3_smx:INFO: Total # of broken channels: 0
11:14:32:ST3_smx:INFO: List of broken channels: []
11:14:32:ST3_smx:INFO: Total # of broken channels: 0
11:14:32:ST3_smx:INFO: List of broken channels: []
11:14:33:asictest:INFO: Starting CSA scan -
11:14:34:asictest:INFO: 0, 0.063800
11:14:35:asictest:INFO: 9, 0.142800
11:14:35:asictest:INFO: 18, 0.215600
11:14:36:asictest:INFO: 27, 0.285400
11:14:37:asictest:INFO: 36, 0.353900
11:14:37:asictest:INFO: 45, 0.416200
11:14:38:asictest:INFO: 54, 0.470100
11:14:39:asictest:INFO: 63, 0.506600
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_23-11_13_27
OPERATOR : Kerstin S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0000L000-M000 | side-P | index: (8/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-003-193-15 | FUSED_ID : 6359364699116551199
IC_TEMP : 5.55 | VDDM : 1121.09 | AUX_INT : 0.00 | CsaBias : 116.53
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 1.21626e-04 / 1
ADC_P0 : 0.00000e+00 ± 1.10284e-02
ADC_P1 : 7.85163e-03 ± 1.89579e-04
ADC_P2 : -5.51767e-06 ± 1.12210e-06
CSA_Chi2/NDF : 1.03913e-04 / 1
CSA_P0 : 6.12750e-02 ± 3.83680e-03
CSA_P1 : 9.40225e-03 ± 2.84506e-04
CSA_P2 : -3.57290e-05 ± 4.34221e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.4214', '1.800', '0.0736', '1.800', '0.1579', '7.000', '0.6894']
VI_after__Init : ['1.200', '0.4215', '1.800', '0.0732', '1.800', '0.1550', '7.000', '0.6905']
VI_at__the_End : ['1.200', '0.5105', '1.800', '0.0721', '1.800', '0.1669', '7.000', '0.6905']
11:15:01:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-000-003-193-15//TestDate_2023_08_23-11_13_27/
Comment
J038 for test module, Pside