XA-000-08-002-000-003-198-15    23.08.23 11:00:26

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            11:00:26:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:00:26:ST3_Shared:INFO:	-------------------------Microcable-------------------------
11:00:26:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:00:28:smx_tester:INFO:	Scanning setup
11:00:28:elinks:INFO:	Disabling clock on downlink 0
11:00:28:elinks:INFO:	Disabling clock on downlink 1
11:00:28:elinks:INFO:	Disabling clock on downlink 2
11:00:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:00:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:00:28:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
11:00:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:00:28:elinks:INFO:	Disabling clock on downlink 0
11:00:28:elinks:INFO:	Disabling clock on downlink 1
11:00:28:elinks:INFO:	Disabling clock on downlink 2
11:00:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:00:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:00:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:00:28:elinks:INFO:	Disabling clock on downlink 0
11:00:28:elinks:INFO:	Disabling clock on downlink 1
11:00:28:elinks:INFO:	Disabling clock on downlink 2
11:00:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:00:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:00:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:00:28:setup_element:INFO:	Scanning clock phase
11:00:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:00:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:00:28:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
11:00:28:setup_element:INFO:	Eye window for uplink 0 : ___________________________________________________XXXXXX_______________________
Clock Delay: 13
11:00:28:setup_element:INFO:	Setting the clock phase to 13 for group 0, downlink 0
11:00:28:setup_element:INFO:	Scanning data phases
11:00:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:00:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:00:33:setup_element:INFO:	Data phase scan results for group 0, downlink 0
11:00:33:setup_element:INFO:	Eye window for uplink 0 : ____XXX_________________________________
Data delay found: 25
11:00:33:setup_element:INFO:	Setting the data phase to 25 for uplink 0
11:00:33:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 13
    Window Length: 74
    Eye Windows:
      Uplink  0: ___________________________________________________XXXXXX_______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 25
      Window Length: 37
      Eye Window: ____XXX_________________________________
]
11:00:33:setup_element:INFO:	Beginning SMX ASICs map scan
11:00:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:00:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:00:33:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
11:00:33:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
11:00:33:uplink:INFO:	Setting uplinks mask [0]
11:00:35:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
11:00:36:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 13
    Window Length: 74
    Eye Windows:
      Uplink  0: ___________________________________________________XXXXXX_______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 25
      Window Length: 37
      Eye Window: ____XXX_________________________________

11:00:36:setup_element:INFO:	Performing Elink synchronization
11:00:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:00:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:00:36:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
11:00:36:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
11:00:36:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
11:00:36:uplink:INFO:	Enabling uplinks [0]
11:00:36:ST3_emu:INFO:	Number of chips: 1
11:00:36:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
11:00:37:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
11:00:41:asictest:WARNING:	Fused ID is not zero 6359364699116551279
11:00:41:asictest:INFO:	 Starting ADC calibration/scan 
11:00:47:asictest:INFO:	0,	0,	0.000000
11:00:53:asictest:INFO:	1,	39,	0.300000
11:00:58:asictest:INFO:	2,	76,	0.600000
11:01:04:asictest:INFO:	3,	120,	0.900000
11:01:10:asictest:INFO:	4,	167,	1.200000
11:01:16:asictest:INFO:	5,	185,	1.300000
11:01:21:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
11:01:22:asictest:INFO:	  2.21 1208.95  799.93    0.00
11:01:23:ST3_smx:INFO:	chip: 0-7 	 2.213411 C 	 1208.951650 mV
11:01:23:ST3_smx:INFO:	# loops 0
11:01:25:ST3_smx:INFO:	# loops 1
11:01:26:ST3_smx:INFO:	# loops 2
11:01:28:ST3_smx:INFO:	# loops 3
11:01:30:ST3_smx:INFO:	# loops 4
11:01:31:ST3_smx:INFO:	Total # of broken channels: 0
11:01:31:ST3_smx:INFO:	List of broken channels: []
11:01:31:ST3_smx:INFO:	Total # of broken channels: 0
11:01:31:ST3_smx:INFO:	List of broken channels: []
11:01:32:asictest:INFO:	 Starting CSA scan -
11:01:33:asictest:INFO:	0,	0.065100
11:01:34:asictest:INFO:	9,	0.146300
11:01:35:asictest:INFO:	18,	0.221200
11:01:35:asictest:INFO:	27,	0.294900
11:01:36:asictest:INFO:	36,	0.362600
11:01:36:asictest:INFO:	45,	0.425000
11:01:37:asictest:INFO:	54,	0.474300
11:01:38:asictest:INFO:	63,	0.502500
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_23-11_00_26
OPERATOR  : Kerstin S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0000L000-M000 | side-P | index: (3/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-000-003-198-15 | FUSED_ID : 6359364699116551279
  IC_TEMP :   -8.32 | VDDM : 1099.93 | AUX_INT :    0.00 | CsaBias :   91.31
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 1.35165e-05 / 0
  ADC_P0  : 0.00000e+00 ± 1.00000e+00
  ADC_P1  : 8.38088e-03 ± 2.56465e-02
  ADC_P2  : -7.26223e-06 ± 1.52765e-04
  CSA_Chi2/NDF : 1.86424e-04 / 0
  CSA_P0  : 6.09375e-02 ± 5.13908e-03
  CSA_P1  : 1.00449e-02 ± 3.81072e-04
  CSA_P2  : -4.64653e-05 ± 5.81603e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2274', '1.800', '0.0879', '1.800', '0.1461', '7.000', '0.6897']
VI_after__Init : ['1.200', '0.2296', '1.800', '0.0878', '1.800', '0.1444', '7.000', '0.6906']
VI_at__the_End : ['1.200', '0.5005', '1.800', '0.0709', '1.800', '0.1612', '7.000', '0.6905']
11:01:47:ST3_Shared:INFO:	/home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-000-003-198-15//TestDate_2023_08_23-11_00_26/

          
Comment.txt
J038 for test module, Pside